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sh64: update for IRQ flag handling naming changes.
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1da177e4 1/*
18bc8131 2 * arch/sh/mach-cayman/irq.c - SH-5 Cayman Interrupt Support
1da177e4
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3 *
4 * This file handles the board specific parts of the Cayman interrupt system
5 *
6 * Copyright (C) 2002 Stuart Menefy
18bc8131
PM
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
1da177e4 11 */
18bc8131 12#include <linux/io.h>
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13#include <linux/irq.h>
14#include <linux/interrupt.h>
15#include <linux/signal.h>
f15cbe6f 16#include <cpu/irq.h>
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17#include <asm/page.h>
18
19/* Setup for the SMSC FDC37C935 / LAN91C100FD */
20#define SMSC_IRQ IRQ_IRL1
21
22/* Setup for PCI Bus 2, which transmits interrupts via the EPLD */
23#define PCI2_IRQ IRQ_IRL3
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24
25unsigned long epld_virt;
26
27#define EPLD_BASE 0x04002000
28#define EPLD_STATUS_BASE (epld_virt + 0x10)
29#define EPLD_MASK_BASE (epld_virt + 0x20)
30
31/* Note the SMSC SuperIO chip and SMSC LAN chip interrupts are all muxed onto
32 the same SH-5 interrupt */
33
a226d33a 34static irqreturn_t cayman_interrupt_smsc(int irq, void *dev_id)
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35{
36 printk(KERN_INFO "CAYMAN: spurious SMSC interrupt\n");
37 return IRQ_NONE;
38}
39
a226d33a 40static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id)
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41{
42 printk(KERN_INFO "CAYMAN: spurious PCI interrupt, IRQ %d\n", irq);
43 return IRQ_NONE;
44}
45
46static struct irqaction cayman_action_smsc = {
47 .name = "Cayman SMSC Mux",
48 .handler = cayman_interrupt_smsc,
5fb55ae9 49 .flags = IRQF_DISABLED,
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50};
51
52static struct irqaction cayman_action_pci2 = {
53 .name = "Cayman PCI2 Mux",
54 .handler = cayman_interrupt_pci2,
5fb55ae9 55 .flags = IRQF_DISABLED,
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56};
57
58static void enable_cayman_irq(unsigned int irq)
59{
60 unsigned long flags;
61 unsigned long mask;
62 unsigned int reg;
63 unsigned char bit;
64
65 irq -= START_EXT_IRQS;
66 reg = EPLD_MASK_BASE + ((irq / 8) << 2);
67 bit = 1<<(irq % 8);
68 local_irq_save(flags);
9d56dd3b 69 mask = __raw_readl(reg);
1da177e4 70 mask |= bit;
9d56dd3b 71 __raw_writel(mask, reg);
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LT
72 local_irq_restore(flags);
73}
74
75void disable_cayman_irq(unsigned int irq)
76{
77 unsigned long flags;
78 unsigned long mask;
79 unsigned int reg;
80 unsigned char bit;
81
82 irq -= START_EXT_IRQS;
83 reg = EPLD_MASK_BASE + ((irq / 8) << 2);
84 bit = 1<<(irq % 8);
85 local_irq_save(flags);
9d56dd3b 86 mask = __raw_readl(reg);
1da177e4 87 mask &= ~bit;
9d56dd3b 88 __raw_writel(mask, reg);
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89 local_irq_restore(flags);
90}
91
92static void ack_cayman_irq(unsigned int irq)
93{
94 disable_cayman_irq(irq);
95}
96
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97struct irq_chip cayman_irq_type = {
98 .name = "Cayman-IRQ",
99 .unmask = enable_cayman_irq,
100 .mask = disable_cayman_irq,
101 .mask_ack = ack_cayman_irq,
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102};
103
104int cayman_irq_demux(int evt)
105{
106 int irq = intc_evt_to_irq[evt];
107
108 if (irq == SMSC_IRQ) {
109 unsigned long status;
110 int i;
111
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112 status = __raw_readl(EPLD_STATUS_BASE) &
113 __raw_readl(EPLD_MASK_BASE) & 0xff;
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114 if (status == 0) {
115 irq = -1;
116 } else {
117 for (i=0; i<8; i++) {
118 if (status & (1<<i))
119 break;
120 }
121 irq = START_EXT_IRQS + i;
122 }
123 }
124
125 if (irq == PCI2_IRQ) {
126 unsigned long status;
127 int i;
128
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129 status = __raw_readl(EPLD_STATUS_BASE + 3 * sizeof(u32)) &
130 __raw_readl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff;
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131 if (status == 0) {
132 irq = -1;
133 } else {
134 for (i=0; i<8; i++) {
135 if (status & (1<<i))
136 break;
137 }
138 irq = START_EXT_IRQS + (3 * 8) + i;
139 }
140 }
141
142 return irq;
143}
144
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145void init_cayman_irq(void)
146{
147 int i;
148
0fb849b9 149 epld_virt = (unsigned long)ioremap_nocache(EPLD_BASE, 1024);
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150 if (!epld_virt) {
151 printk(KERN_ERR "Cayman IRQ: Unable to remap EPLD\n");
152 return;
153 }
154
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MF
155 for (i = 0; i < NR_EXT_IRQS; i++) {
156 set_irq_chip_and_handler(START_EXT_IRQS + i, &cayman_irq_type,
157 handle_level_irq);
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158 }
159
160 /* Setup the SMSC interrupt */
161 setup_irq(SMSC_IRQ, &cayman_action_smsc);
162 setup_irq(PCI2_IRQ, &cayman_action_pci2);
163}