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aaf9128a | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
18bc8131 | 3 | * arch/sh/mach-cayman/irq.c - SH-5 Cayman Interrupt Support |
1da177e4 LT |
4 | * |
5 | * This file handles the board specific parts of the Cayman interrupt system | |
6 | * | |
7 | * Copyright (C) 2002 Stuart Menefy | |
8 | */ | |
18bc8131 | 9 | #include <linux/io.h> |
1da177e4 LT |
10 | #include <linux/irq.h> |
11 | #include <linux/interrupt.h> | |
12 | #include <linux/signal.h> | |
f15cbe6f | 13 | #include <cpu/irq.h> |
18bc8131 PM |
14 | #include <asm/page.h> |
15 | ||
16 | /* Setup for the SMSC FDC37C935 / LAN91C100FD */ | |
17 | #define SMSC_IRQ IRQ_IRL1 | |
18 | ||
19 | /* Setup for PCI Bus 2, which transmits interrupts via the EPLD */ | |
20 | #define PCI2_IRQ IRQ_IRL3 | |
1da177e4 LT |
21 | |
22 | unsigned long epld_virt; | |
23 | ||
24 | #define EPLD_BASE 0x04002000 | |
25 | #define EPLD_STATUS_BASE (epld_virt + 0x10) | |
26 | #define EPLD_MASK_BASE (epld_virt + 0x20) | |
27 | ||
28 | /* Note the SMSC SuperIO chip and SMSC LAN chip interrupts are all muxed onto | |
29 | the same SH-5 interrupt */ | |
30 | ||
a226d33a | 31 | static irqreturn_t cayman_interrupt_smsc(int irq, void *dev_id) |
1da177e4 LT |
32 | { |
33 | printk(KERN_INFO "CAYMAN: spurious SMSC interrupt\n"); | |
34 | return IRQ_NONE; | |
35 | } | |
36 | ||
a226d33a | 37 | static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id) |
1da177e4 LT |
38 | { |
39 | printk(KERN_INFO "CAYMAN: spurious PCI interrupt, IRQ %d\n", irq); | |
40 | return IRQ_NONE; | |
41 | } | |
42 | ||
43 | static struct irqaction cayman_action_smsc = { | |
44 | .name = "Cayman SMSC Mux", | |
45 | .handler = cayman_interrupt_smsc, | |
1da177e4 LT |
46 | }; |
47 | ||
48 | static struct irqaction cayman_action_pci2 = { | |
49 | .name = "Cayman PCI2 Mux", | |
50 | .handler = cayman_interrupt_pci2, | |
1da177e4 LT |
51 | }; |
52 | ||
815db147 | 53 | static void enable_cayman_irq(struct irq_data *data) |
1da177e4 | 54 | { |
815db147 | 55 | unsigned int irq = data->irq; |
1da177e4 LT |
56 | unsigned long flags; |
57 | unsigned long mask; | |
58 | unsigned int reg; | |
59 | unsigned char bit; | |
60 | ||
61 | irq -= START_EXT_IRQS; | |
62 | reg = EPLD_MASK_BASE + ((irq / 8) << 2); | |
63 | bit = 1<<(irq % 8); | |
64 | local_irq_save(flags); | |
9d56dd3b | 65 | mask = __raw_readl(reg); |
1da177e4 | 66 | mask |= bit; |
9d56dd3b | 67 | __raw_writel(mask, reg); |
1da177e4 LT |
68 | local_irq_restore(flags); |
69 | } | |
70 | ||
815db147 | 71 | static void disable_cayman_irq(struct irq_data *data) |
1da177e4 | 72 | { |
815db147 | 73 | unsigned int irq = data->irq; |
1da177e4 LT |
74 | unsigned long flags; |
75 | unsigned long mask; | |
76 | unsigned int reg; | |
77 | unsigned char bit; | |
78 | ||
79 | irq -= START_EXT_IRQS; | |
80 | reg = EPLD_MASK_BASE + ((irq / 8) << 2); | |
81 | bit = 1<<(irq % 8); | |
82 | local_irq_save(flags); | |
9d56dd3b | 83 | mask = __raw_readl(reg); |
1da177e4 | 84 | mask &= ~bit; |
9d56dd3b | 85 | __raw_writel(mask, reg); |
1da177e4 LT |
86 | local_irq_restore(flags); |
87 | } | |
88 | ||
1a94757f MF |
89 | struct irq_chip cayman_irq_type = { |
90 | .name = "Cayman-IRQ", | |
815db147 PM |
91 | .irq_unmask = enable_cayman_irq, |
92 | .irq_mask = disable_cayman_irq, | |
1da177e4 LT |
93 | }; |
94 | ||
95 | int cayman_irq_demux(int evt) | |
96 | { | |
97 | int irq = intc_evt_to_irq[evt]; | |
98 | ||
99 | if (irq == SMSC_IRQ) { | |
100 | unsigned long status; | |
101 | int i; | |
102 | ||
9d56dd3b PM |
103 | status = __raw_readl(EPLD_STATUS_BASE) & |
104 | __raw_readl(EPLD_MASK_BASE) & 0xff; | |
1da177e4 LT |
105 | if (status == 0) { |
106 | irq = -1; | |
107 | } else { | |
108 | for (i=0; i<8; i++) { | |
109 | if (status & (1<<i)) | |
110 | break; | |
111 | } | |
112 | irq = START_EXT_IRQS + i; | |
113 | } | |
114 | } | |
115 | ||
116 | if (irq == PCI2_IRQ) { | |
117 | unsigned long status; | |
118 | int i; | |
119 | ||
9d56dd3b PM |
120 | status = __raw_readl(EPLD_STATUS_BASE + 3 * sizeof(u32)) & |
121 | __raw_readl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff; | |
1da177e4 LT |
122 | if (status == 0) { |
123 | irq = -1; | |
124 | } else { | |
125 | for (i=0; i<8; i++) { | |
126 | if (status & (1<<i)) | |
127 | break; | |
128 | } | |
129 | irq = START_EXT_IRQS + (3 * 8) + i; | |
130 | } | |
131 | } | |
132 | ||
133 | return irq; | |
134 | } | |
135 | ||
1da177e4 LT |
136 | void init_cayman_irq(void) |
137 | { | |
138 | int i; | |
139 | ||
0fb849b9 | 140 | epld_virt = (unsigned long)ioremap_nocache(EPLD_BASE, 1024); |
1da177e4 LT |
141 | if (!epld_virt) { |
142 | printk(KERN_ERR "Cayman IRQ: Unable to remap EPLD\n"); | |
143 | return; | |
144 | } | |
145 | ||
1a94757f | 146 | for (i = 0; i < NR_EXT_IRQS; i++) { |
fcb8918f TG |
147 | irq_set_chip_and_handler(START_EXT_IRQS + i, |
148 | &cayman_irq_type, handle_level_irq); | |
1da177e4 LT |
149 | } |
150 | ||
151 | /* Setup the SMSC interrupt */ | |
152 | setup_irq(SMSC_IRQ, &cayman_action_smsc); | |
153 | setup_irq(PCI2_IRQ, &cayman_action_pci2); | |
154 | } |