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4138b740 KM |
1 | /* |
2 | * Copyright (C) 2009 Renesas Solutions Corp. | |
3 | * | |
4 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> | |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file "COPYING" in the main directory of this archive | |
8 | * for more details. | |
9 | */ | |
c2f9b05f JM |
10 | #include <asm/clock.h> |
11 | #include <asm/heartbeat.h> | |
12 | #include <asm/suspend.h> | |
13 | #include <cpu/sh7724.h> | |
14 | #include <linux/delay.h> | |
4138b740 | 15 | #include <linux/device.h> |
c2f9b05f JM |
16 | #include <linux/i2c.h> |
17 | #include <linux/io.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/input.h> | |
20 | #include <linux/input/sh_keysc.h> | |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/memblock.h> | |
23 | #include <linux/mfd/tmio.h> | |
1238c684 YG |
24 | #include <linux/mmc/host.h> |
25 | #include <linux/mmc/sh_mmcif.h> | |
4138b740 KM |
26 | #include <linux/mtd/physmap.h> |
27 | #include <linux/gpio.h> | |
c2f9b05f JM |
28 | #include <linux/gpio/machine.h> |
29 | #include <linux/platform_data/gpio_backlight.h> | |
30 | #include <linux/platform_data/tsc2007.h> | |
31 | #include <linux/platform_device.h> | |
d4c191df GL |
32 | #include <linux/regulator/fixed.h> |
33 | #include <linux/regulator/machine.h> | |
cf8e56bf | 34 | #include <linux/sh_eth.h> |
9307d115 | 35 | #include <linux/sh_intc.h> |
c2f9b05f JM |
36 | #include <linux/spi/mmc_spi.h> |
37 | #include <linux/spi/sh_msiof.h> | |
38 | #include <linux/spi/spi.h> | |
39 | #include <linux/usb/r8a66597.h> | |
40 | #include <linux/usb/renesas_usbhs.h> | |
a1ad8033 | 41 | #include <linux/videodev2.h> |
c2f9b05f JM |
42 | |
43 | #include <media/drv-intf/renesas-ceu.h> | |
44 | #include <media/i2c/mt9t112.h> | |
45 | #include <media/i2c/tw9910.h> | |
46 | ||
1980fdc4 | 47 | #include <sound/sh_fsi.h> |
064bfada | 48 | #include <sound/simple_card.h> |
c2f9b05f JM |
49 | |
50 | #include <video/sh_mobile_lcdc.h> | |
4138b740 KM |
51 | |
52 | /* | |
b7056bc1 KM |
53 | * Address Interface BusWidth |
54 | *----------------------------------------- | |
55 | * 0x0000_0000 uboot 16bit | |
56 | * 0x0004_0000 Linux romImage 16bit | |
57 | * 0x0014_0000 MTD for Linux 16bit | |
58 | * 0x0400_0000 Internal I/O 16/32bit | |
59 | * 0x0800_0000 DRAM 32bit | |
60 | * 0x1800_0000 MFI 16bit | |
4138b740 KM |
61 | */ |
62 | ||
9c472c4d KM |
63 | /* SWITCH |
64 | *------------------------------ | |
65 | * DS2[1] = FlashROM write protect ON : write protect | |
66 | * OFF : No write protect | |
67 | * DS2[2] = RMII / TS, SCIF ON : RMII | |
68 | * OFF : TS, SCIF3 | |
69 | * DS2[3] = Camera / Video ON : Camera | |
70 | * OFF : NTSC/PAL (IN) | |
71 | * DS2[5] = NTSC_OUT Clock ON : On board OSC | |
72 | * OFF : SH7724 DV_CLK | |
73 | * DS2[6-7] = MMC / SD ON-OFF : SD | |
74 | * OFF-ON : MMC | |
75 | */ | |
76 | ||
035688d9 KM |
77 | /* |
78 | * FSI - DA7210 | |
79 | * | |
80 | * it needs amixer settings for playing | |
81 | * | |
82 | * amixer set 'HeadPhone' 80 | |
83 | * amixer set 'Out Mixer Left DAC Left' on | |
84 | * amixer set 'Out Mixer Right DAC Right' on | |
85 | */ | |
86 | ||
c2f9b05f JM |
87 | #define CEU_BUFFER_MEMORY_SIZE (4 << 20) |
88 | static phys_addr_t ceu0_dma_membase; | |
89 | static phys_addr_t ceu1_dma_membase; | |
90 | ||
4138b740 KM |
91 | /* Heartbeat */ |
92 | static unsigned char led_pos[] = { 0, 1, 2, 3 }; | |
a09d2831 | 93 | |
4138b740 | 94 | static struct heartbeat_data heartbeat_data = { |
4138b740 KM |
95 | .nr_bits = 4, |
96 | .bit_pos = led_pos, | |
97 | }; | |
98 | ||
a09d2831 PM |
99 | static struct resource heartbeat_resource = { |
100 | .start = 0xA405012C, /* PTG */ | |
101 | .end = 0xA405012E - 1, | |
102 | .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, | |
4138b740 KM |
103 | }; |
104 | ||
105 | static struct platform_device heartbeat_device = { | |
106 | .name = "heartbeat", | |
107 | .id = -1, | |
108 | .dev = { | |
109 | .platform_data = &heartbeat_data, | |
110 | }, | |
a09d2831 PM |
111 | .num_resources = 1, |
112 | .resource = &heartbeat_resource, | |
4138b740 KM |
113 | }; |
114 | ||
115 | /* MTD */ | |
116 | static struct mtd_partition nor_flash_partitions[] = { | |
117 | { | |
b7056bc1 | 118 | .name = "boot loader", |
4138b740 | 119 | .offset = 0, |
b7056bc1 | 120 | .size = (5 * 1024 * 1024), |
d5ce010c | 121 | .mask_flags = MTD_WRITEABLE, /* force read-only */ |
4138b740 KM |
122 | }, { |
123 | .name = "free-area", | |
124 | .offset = MTDPART_OFS_APPEND, | |
125 | .size = MTDPART_SIZ_FULL, | |
126 | }, | |
127 | }; | |
128 | ||
129 | static struct physmap_flash_data nor_flash_data = { | |
130 | .width = 2, | |
131 | .parts = nor_flash_partitions, | |
132 | .nr_parts = ARRAY_SIZE(nor_flash_partitions), | |
133 | }; | |
134 | ||
135 | static struct resource nor_flash_resources[] = { | |
136 | [0] = { | |
137 | .name = "NOR Flash", | |
138 | .start = 0x00000000, | |
139 | .end = 0x03ffffff, | |
140 | .flags = IORESOURCE_MEM, | |
141 | } | |
142 | }; | |
143 | ||
144 | static struct platform_device nor_flash_device = { | |
145 | .name = "physmap-flash", | |
146 | .resource = nor_flash_resources, | |
147 | .num_resources = ARRAY_SIZE(nor_flash_resources), | |
148 | .dev = { | |
149 | .platform_data = &nor_flash_data, | |
150 | }, | |
151 | }; | |
152 | ||
35a35408 KM |
153 | /* SH Eth */ |
154 | #define SH_ETH_ADDR (0xA4600000) | |
35a35408 KM |
155 | static struct resource sh_eth_resources[] = { |
156 | [0] = { | |
157 | .start = SH_ETH_ADDR, | |
158 | .end = SH_ETH_ADDR + 0x1FC, | |
159 | .flags = IORESOURCE_MEM, | |
160 | }, | |
161 | [1] = { | |
9307d115 | 162 | .start = evt2irq(0xd60), |
35a35408 KM |
163 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
164 | }, | |
165 | }; | |
166 | ||
3ce09334 | 167 | static struct sh_eth_plat_data sh_eth_plat = { |
35a35408 | 168 | .phy = 0x1f, /* SMSC LAN8700 */ |
9055f895 | 169 | .phy_interface = PHY_INTERFACE_MODE_MII, |
acf3cc28 | 170 | .ether_link_active_low = 1 |
35a35408 KM |
171 | }; |
172 | ||
173 | static struct platform_device sh_eth_device = { | |
9c3beaab SS |
174 | .name = "sh7724-ether", |
175 | .id = 0, | |
35a35408 KM |
176 | .dev = { |
177 | .platform_data = &sh_eth_plat, | |
178 | }, | |
179 | .num_resources = ARRAY_SIZE(sh_eth_resources), | |
180 | .resource = sh_eth_resources, | |
181 | }; | |
182 | ||
907050a3 | 183 | /* USB0 host */ |
3ce09334 | 184 | static void usb0_port_power(int port, int power) |
907050a3 KM |
185 | { |
186 | gpio_set_value(GPIO_PTB4, power); | |
187 | } | |
188 | ||
189 | static struct r8a66597_platdata usb0_host_data = { | |
190 | .on_chip = 1, | |
191 | .port_power = usb0_port_power, | |
192 | }; | |
193 | ||
194 | static struct resource usb0_host_resources[] = { | |
195 | [0] = { | |
196 | .start = 0xa4d80000, | |
197 | .end = 0xa4d80124 - 1, | |
198 | .flags = IORESOURCE_MEM, | |
199 | }, | |
200 | [1] = { | |
9307d115 PM |
201 | .start = evt2irq(0xa20), |
202 | .end = evt2irq(0xa20), | |
907050a3 KM |
203 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, |
204 | }, | |
205 | }; | |
206 | ||
207 | static struct platform_device usb0_host_device = { | |
208 | .name = "r8a66597_hcd", | |
209 | .id = 0, | |
210 | .dev = { | |
211 | .dma_mask = NULL, /* not use dma */ | |
212 | .coherent_dma_mask = 0xffffffff, | |
213 | .platform_data = &usb0_host_data, | |
214 | }, | |
215 | .num_resources = ARRAY_SIZE(usb0_host_resources), | |
216 | .resource = usb0_host_resources, | |
217 | }; | |
218 | ||
3714a9a0 | 219 | /* USB1 host/function */ |
3ce09334 | 220 | static void usb1_port_power(int port, int power) |
907050a3 | 221 | { |
907050a3 KM |
222 | gpio_set_value(GPIO_PTB5, power); |
223 | } | |
224 | ||
3714a9a0 | 225 | static struct r8a66597_platdata usb1_common_data = { |
907050a3 KM |
226 | .on_chip = 1, |
227 | .port_power = usb1_port_power, | |
228 | }; | |
229 | ||
3714a9a0 | 230 | static struct resource usb1_common_resources[] = { |
907050a3 KM |
231 | [0] = { |
232 | .start = 0xa4d90000, | |
233 | .end = 0xa4d90124 - 1, | |
234 | .flags = IORESOURCE_MEM, | |
235 | }, | |
236 | [1] = { | |
9307d115 PM |
237 | .start = evt2irq(0xa40), |
238 | .end = evt2irq(0xa40), | |
907050a3 KM |
239 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, |
240 | }, | |
241 | }; | |
242 | ||
3714a9a0 KM |
243 | static struct platform_device usb1_common_device = { |
244 | /* .name will be added in arch_setup */ | |
907050a3 KM |
245 | .id = 1, |
246 | .dev = { | |
247 | .dma_mask = NULL, /* not use dma */ | |
248 | .coherent_dma_mask = 0xffffffff, | |
3714a9a0 | 249 | .platform_data = &usb1_common_data, |
907050a3 | 250 | }, |
3714a9a0 KM |
251 | .num_resources = ARRAY_SIZE(usb1_common_resources), |
252 | .resource = usb1_common_resources, | |
907050a3 KM |
253 | }; |
254 | ||
fb2e7394 KM |
255 | /* |
256 | * USBHS | |
257 | */ | |
258 | static int usbhs_get_id(struct platform_device *pdev) | |
259 | { | |
260 | return gpio_get_value(GPIO_PTB3); | |
261 | } | |
262 | ||
225da3e3 | 263 | static int usbhs_phy_reset(struct platform_device *pdev) |
1ca8fe38 KM |
264 | { |
265 | /* enable vbus if HOST */ | |
266 | if (!gpio_get_value(GPIO_PTB3)) | |
267 | gpio_set_value(GPIO_PTB5, 1); | |
225da3e3 KM |
268 | |
269 | return 0; | |
1ca8fe38 KM |
270 | } |
271 | ||
fb2e7394 KM |
272 | static struct renesas_usbhs_platform_info usbhs_info = { |
273 | .platform_callback = { | |
274 | .get_id = usbhs_get_id, | |
1ca8fe38 | 275 | .phy_reset = usbhs_phy_reset, |
fb2e7394 KM |
276 | }, |
277 | .driver_param = { | |
278 | .buswait_bwait = 4, | |
279 | .detection_delay = 5, | |
9f0fa799 KM |
280 | .d0_tx_id = SHDMA_SLAVE_USB1D0_TX, |
281 | .d0_rx_id = SHDMA_SLAVE_USB1D0_RX, | |
282 | .d1_tx_id = SHDMA_SLAVE_USB1D1_TX, | |
283 | .d1_rx_id = SHDMA_SLAVE_USB1D1_RX, | |
fb2e7394 KM |
284 | }, |
285 | }; | |
286 | ||
287 | static struct resource usbhs_resources[] = { | |
288 | [0] = { | |
289 | .start = 0xa4d90000, | |
290 | .end = 0xa4d90124 - 1, | |
291 | .flags = IORESOURCE_MEM, | |
292 | }, | |
293 | [1] = { | |
9307d115 PM |
294 | .start = evt2irq(0xa40), |
295 | .end = evt2irq(0xa40), | |
fb2e7394 KM |
296 | .flags = IORESOURCE_IRQ, |
297 | }, | |
298 | }; | |
299 | ||
300 | static struct platform_device usbhs_device = { | |
301 | .name = "renesas_usbhs", | |
302 | .id = 1, | |
303 | .dev = { | |
304 | .dma_mask = NULL, /* not use dma */ | |
305 | .coherent_dma_mask = 0xffffffff, | |
306 | .platform_data = &usbhs_info, | |
307 | }, | |
308 | .num_resources = ARRAY_SIZE(usbhs_resources), | |
309 | .resource = usbhs_resources, | |
fb2e7394 KM |
310 | }; |
311 | ||
fe79f919 | 312 | /* LCDC and backlight */ |
e04008eb | 313 | static const struct fb_videomode ecovec_lcd_modes[] = { |
44432407 GL |
314 | { |
315 | .name = "Panel", | |
316 | .xres = 800, | |
317 | .yres = 480, | |
318 | .left_margin = 220, | |
319 | .right_margin = 110, | |
320 | .hsync_len = 70, | |
321 | .upper_margin = 20, | |
322 | .lower_margin = 5, | |
323 | .vsync_len = 5, | |
324 | .sync = 0, /* hsync and vsync are active low */ | |
325 | }, | |
326 | }; | |
327 | ||
e04008eb | 328 | static const struct fb_videomode ecovec_dvi_modes[] = { |
44432407 GL |
329 | { |
330 | .name = "DVI", | |
331 | .xres = 1280, | |
332 | .yres = 720, | |
333 | .left_margin = 220, | |
334 | .right_margin = 110, | |
335 | .hsync_len = 40, | |
336 | .upper_margin = 20, | |
337 | .lower_margin = 5, | |
338 | .vsync_len = 5, | |
339 | .sync = 0, /* hsync and vsync are active low */ | |
340 | }, | |
341 | }; | |
342 | ||
fa3ba51b KM |
343 | static struct sh_mobile_lcdc_info lcdc_info = { |
344 | .ch[0] = { | |
345 | .interface_type = RGB18, | |
346 | .chan = LCDC_CHAN_MAINLCD, | |
edd153a3 | 347 | .fourcc = V4L2_PIX_FMT_RGB565, |
afaad83b | 348 | .panel_cfg = { /* 7.0 inch */ |
fa3ba51b KM |
349 | .width = 152, |
350 | .height = 91, | |
351 | }, | |
fa3ba51b KM |
352 | } |
353 | }; | |
354 | ||
355 | static struct resource lcdc_resources[] = { | |
356 | [0] = { | |
357 | .name = "LCDC", | |
358 | .start = 0xfe940000, | |
a6f15ade | 359 | .end = 0xfe942fff, |
fa3ba51b KM |
360 | .flags = IORESOURCE_MEM, |
361 | }, | |
362 | [1] = { | |
9307d115 | 363 | .start = evt2irq(0xf40), |
fa3ba51b KM |
364 | .flags = IORESOURCE_IRQ, |
365 | }, | |
366 | }; | |
367 | ||
368 | static struct platform_device lcdc_device = { | |
369 | .name = "sh_mobile_lcdc_fb", | |
370 | .num_resources = ARRAY_SIZE(lcdc_resources), | |
371 | .resource = lcdc_resources, | |
372 | .dev = { | |
373 | .platform_data = &lcdc_info, | |
374 | }, | |
fa3ba51b KM |
375 | }; |
376 | ||
fe79f919 LP |
377 | static struct gpio_backlight_platform_data gpio_backlight_data = { |
378 | .fbdev = &lcdc_device.dev, | |
379 | .gpio = GPIO_PTR1, | |
380 | .def_value = 1, | |
381 | .name = "backlight", | |
382 | }; | |
383 | ||
384 | static struct platform_device gpio_backlight_device = { | |
385 | .name = "gpio-backlight", | |
386 | .dev = { | |
387 | .platform_data = &gpio_backlight_data, | |
388 | }, | |
389 | }; | |
390 | ||
2153ad32 | 391 | /* CEU0 */ |
c2f9b05f JM |
392 | static struct ceu_platform_data ceu0_pdata = { |
393 | .num_subdevs = 2, | |
394 | .subdevs = { | |
395 | { /* [0] = mt9t112 */ | |
396 | .flags = 0, | |
397 | .bus_width = 8, | |
398 | .bus_shift = 0, | |
399 | .i2c_adapter_id = 0, | |
400 | .i2c_address = 0x3c, | |
401 | }, | |
402 | { /* [1] = tw9910 */ | |
403 | .flags = 0, | |
404 | .bus_width = 8, | |
405 | .bus_shift = 0, | |
406 | .i2c_adapter_id = 0, | |
407 | .i2c_address = 0x45, | |
408 | }, | |
409 | }, | |
2153ad32 KM |
410 | }; |
411 | ||
412 | static struct resource ceu0_resources[] = { | |
413 | [0] = { | |
414 | .name = "CEU0", | |
415 | .start = 0xfe910000, | |
416 | .end = 0xfe91009f, | |
417 | .flags = IORESOURCE_MEM, | |
418 | }, | |
419 | [1] = { | |
9307d115 | 420 | .start = evt2irq(0x880), |
2153ad32 KM |
421 | .flags = IORESOURCE_IRQ, |
422 | }, | |
2153ad32 KM |
423 | }; |
424 | ||
425 | static struct platform_device ceu0_device = { | |
c2f9b05f JM |
426 | .name = "renesas-ceu", |
427 | .id = 0, /* ceu.0 */ | |
2153ad32 KM |
428 | .num_resources = ARRAY_SIZE(ceu0_resources), |
429 | .resource = ceu0_resources, | |
430 | .dev = { | |
c2f9b05f | 431 | .platform_data = &ceu0_pdata, |
2153ad32 | 432 | }, |
2153ad32 KM |
433 | }; |
434 | ||
435 | /* CEU1 */ | |
c2f9b05f JM |
436 | static struct ceu_platform_data ceu1_pdata = { |
437 | .num_subdevs = 1, | |
438 | .subdevs = { | |
439 | { /* [0] = mt9t112 */ | |
440 | .flags = 0, | |
441 | .bus_width = 8, | |
442 | .bus_shift = 0, | |
443 | .i2c_adapter_id = 1, | |
444 | .i2c_address = 0x3c, | |
445 | }, | |
446 | }, | |
2153ad32 KM |
447 | }; |
448 | ||
449 | static struct resource ceu1_resources[] = { | |
450 | [0] = { | |
451 | .name = "CEU1", | |
452 | .start = 0xfe914000, | |
453 | .end = 0xfe91409f, | |
454 | .flags = IORESOURCE_MEM, | |
455 | }, | |
456 | [1] = { | |
9307d115 | 457 | .start = evt2irq(0x9e0), |
2153ad32 KM |
458 | .flags = IORESOURCE_IRQ, |
459 | }, | |
2153ad32 KM |
460 | }; |
461 | ||
462 | static struct platform_device ceu1_device = { | |
c2f9b05f JM |
463 | .name = "renesas-ceu", |
464 | .id = 1, /* ceu.1 */ | |
2153ad32 KM |
465 | .num_resources = ARRAY_SIZE(ceu1_resources), |
466 | .resource = ceu1_resources, | |
467 | .dev = { | |
c2f9b05f JM |
468 | .platform_data = &ceu1_pdata, |
469 | }, | |
470 | }; | |
471 | ||
472 | /* Power up/down GPIOs for camera devices and video decoder */ | |
473 | static struct gpiod_lookup_table tw9910_gpios = { | |
474 | .dev_id = "0-0045", | |
475 | .table = { | |
476 | GPIO_LOOKUP("sh7724_pfc", GPIO_PTU2, "pdn", GPIO_ACTIVE_HIGH), | |
477 | }, | |
478 | }; | |
479 | ||
480 | static struct gpiod_lookup_table mt9t112_0_gpios = { | |
481 | .dev_id = "0-003c", | |
482 | .table = { | |
483 | GPIO_LOOKUP("sh7724_pfc", GPIO_PTA3, "standby", | |
484 | GPIO_ACTIVE_HIGH), | |
485 | }, | |
486 | }; | |
487 | ||
488 | static struct gpiod_lookup_table mt9t112_1_gpios = { | |
489 | .dev_id = "1-003c", | |
490 | .table = { | |
491 | GPIO_LOOKUP("sh7724_pfc", GPIO_PTA4, "standby", | |
492 | GPIO_ACTIVE_HIGH), | |
2153ad32 | 493 | }, |
2153ad32 KM |
494 | }; |
495 | ||
125ecce6 | 496 | /* I2C device */ |
c2f9b05f JM |
497 | static struct tw9910_video_info tw9910_info = { |
498 | .buswidth = 8, | |
499 | .mpout = TW9910_MPO_FIELD, | |
500 | }; | |
501 | ||
502 | static struct mt9t112_platform_data mt9t112_0_pdata = { | |
503 | .flags = MT9T112_FLAG_PCLK_RISING_EDGE, | |
504 | .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ | |
505 | }; | |
506 | ||
507 | static struct mt9t112_platform_data mt9t112_1_pdata = { | |
508 | .flags = MT9T112_FLAG_PCLK_RISING_EDGE, | |
509 | .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ | |
510 | }; | |
511 | ||
1980fdc4 KM |
512 | static struct i2c_board_info i2c0_devices[] = { |
513 | { | |
514 | I2C_BOARD_INFO("da7210", 0x1a), | |
515 | }, | |
c2f9b05f JM |
516 | { |
517 | I2C_BOARD_INFO("tw9910", 0x45), | |
518 | .platform_data = &tw9910_info, | |
519 | }, | |
520 | { | |
521 | /* 1st camera */ | |
522 | I2C_BOARD_INFO("mt9t112", 0x3c), | |
523 | .platform_data = &mt9t112_0_pdata, | |
524 | }, | |
1980fdc4 KM |
525 | }; |
526 | ||
125ecce6 KM |
527 | static struct i2c_board_info i2c1_devices[] = { |
528 | { | |
529 | I2C_BOARD_INFO("r2025sd", 0x32), | |
530 | }, | |
ea440783 NH |
531 | { |
532 | I2C_BOARD_INFO("lis3lv02d", 0x1c), | |
9307d115 | 533 | .irq = evt2irq(0x620), |
c2f9b05f JM |
534 | }, |
535 | { | |
536 | /* 2nd camera */ | |
537 | I2C_BOARD_INFO("mt9t112", 0x3c), | |
538 | .platform_data = &mt9t112_1_pdata, | |
539 | }, | |
125ecce6 KM |
540 | }; |
541 | ||
e9103e74 KM |
542 | /* KEYSC */ |
543 | static struct sh_keysc_info keysc_info = { | |
544 | .mode = SH_KEYSC_MODE_1, | |
545 | .scan_timing = 3, | |
546 | .delay = 50, | |
547 | .kycr2_delay = 100, | |
548 | .keycodes = { KEY_1, 0, 0, 0, 0, | |
549 | KEY_2, 0, 0, 0, 0, | |
550 | KEY_3, 0, 0, 0, 0, | |
551 | KEY_4, 0, 0, 0, 0, | |
552 | KEY_5, 0, 0, 0, 0, | |
553 | KEY_6, 0, 0, 0, 0, }, | |
554 | }; | |
555 | ||
556 | static struct resource keysc_resources[] = { | |
557 | [0] = { | |
558 | .name = "KEYSC", | |
559 | .start = 0x044b0000, | |
560 | .end = 0x044b000f, | |
561 | .flags = IORESOURCE_MEM, | |
562 | }, | |
563 | [1] = { | |
9307d115 | 564 | .start = evt2irq(0xbe0), |
e9103e74 KM |
565 | .flags = IORESOURCE_IRQ, |
566 | }, | |
567 | }; | |
568 | ||
569 | static struct platform_device keysc_device = { | |
570 | .name = "sh_keysc", | |
571 | .id = 0, /* keysc0 clock */ | |
572 | .num_resources = ARRAY_SIZE(keysc_resources), | |
573 | .resource = keysc_resources, | |
574 | .dev = { | |
575 | .platform_data = &keysc_info, | |
576 | }, | |
e9103e74 KM |
577 | }; |
578 | ||
8810e055 | 579 | /* TouchScreen */ |
9307d115 PM |
580 | #define IRQ0 evt2irq(0x600) |
581 | ||
07f9e5cf | 582 | static int ts_get_pendown_state(struct device *dev) |
5d75b3a2 PM |
583 | { |
584 | int val = 0; | |
585 | gpio_free(GPIO_FN_INTC_IRQ0); | |
586 | gpio_request(GPIO_PTZ0, NULL); | |
587 | gpio_direction_input(GPIO_PTZ0); | |
588 | ||
589 | val = gpio_get_value(GPIO_PTZ0); | |
590 | ||
591 | gpio_free(GPIO_PTZ0); | |
592 | gpio_request(GPIO_FN_INTC_IRQ0, NULL); | |
593 | ||
594 | return val ? 0 : 1; | |
595 | } | |
596 | ||
597 | static int ts_init(void) | |
598 | { | |
599 | gpio_request(GPIO_FN_INTC_IRQ0, NULL); | |
600 | return 0; | |
601 | } | |
602 | ||
3ce09334 | 603 | static struct tsc2007_platform_data tsc2007_info = { |
8810e055 | 604 | .model = 2007, |
5d75b3a2 PM |
605 | .x_plate_ohms = 180, |
606 | .get_pendown_state = ts_get_pendown_state, | |
607 | .init_platform_hw = ts_init, | |
8810e055 KM |
608 | }; |
609 | ||
610 | static struct i2c_board_info ts_i2c_clients = { | |
611 | I2C_BOARD_INFO("tsc2007", 0x48), | |
612 | .type = "tsc2007", | |
613 | .platform_data = &tsc2007_info, | |
614 | .irq = IRQ0, | |
615 | }; | |
616 | ||
d4c191df GL |
617 | static struct regulator_consumer_supply cn12_power_consumers[] = |
618 | { | |
619 | REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"), | |
620 | REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"), | |
621 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), | |
622 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), | |
623 | }; | |
624 | ||
625 | static struct regulator_init_data cn12_power_init_data = { | |
626 | .constraints = { | |
627 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
628 | }, | |
629 | .num_consumer_supplies = ARRAY_SIZE(cn12_power_consumers), | |
630 | .consumer_supplies = cn12_power_consumers, | |
631 | }; | |
632 | ||
633 | static struct fixed_voltage_config cn12_power_info = { | |
634 | .supply_name = "CN12 SD/MMC Vdd", | |
635 | .microvolts = 3300000, | |
636 | .gpio = GPIO_PTB7, | |
637 | .enable_high = 1, | |
638 | .init_data = &cn12_power_init_data, | |
639 | }; | |
640 | ||
641 | static struct platform_device cn12_power = { | |
642 | .name = "reg-fixed-voltage", | |
643 | .id = 0, | |
644 | .dev = { | |
645 | .platform_data = &cn12_power_info, | |
646 | }, | |
647 | }; | |
648 | ||
5744c881 | 649 | #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE) |
1238c684 | 650 | /* SDHI0 */ |
d4c191df GL |
651 | static struct regulator_consumer_supply sdhi0_power_consumers[] = |
652 | { | |
653 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), | |
654 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), | |
655 | }; | |
656 | ||
657 | static struct regulator_init_data sdhi0_power_init_data = { | |
658 | .constraints = { | |
659 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
660 | }, | |
661 | .num_consumer_supplies = ARRAY_SIZE(sdhi0_power_consumers), | |
662 | .consumer_supplies = sdhi0_power_consumers, | |
663 | }; | |
664 | ||
665 | static struct fixed_voltage_config sdhi0_power_info = { | |
666 | .supply_name = "CN11 SD/MMC Vdd", | |
667 | .microvolts = 3300000, | |
668 | .gpio = GPIO_PTB6, | |
669 | .enable_high = 1, | |
670 | .init_data = &sdhi0_power_init_data, | |
671 | }; | |
672 | ||
673 | static struct platform_device sdhi0_power = { | |
674 | .name = "reg-fixed-voltage", | |
675 | .id = 1, | |
676 | .dev = { | |
677 | .platform_data = &sdhi0_power_info, | |
678 | }, | |
679 | }; | |
680 | ||
84f11d5b KM |
681 | static struct tmio_mmc_data sdhi0_info = { |
682 | .chan_priv_tx = (void *)SHDMA_SLAVE_SDHI0_TX, | |
683 | .chan_priv_rx = (void *)SHDMA_SLAVE_SDHI0_RX, | |
684 | .capabilities = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD | | |
4eb80146 | 685 | MMC_CAP_NEEDS_POLL, |
84f11d5b | 686 | .flags = TMIO_MMC_USE_GPIO_CD, |
afa2c940 | 687 | .cd_gpio = GPIO_PTY7, |
98779ad8 MD |
688 | }; |
689 | ||
96987d96 KM |
690 | static struct resource sdhi0_resources[] = { |
691 | [0] = { | |
692 | .name = "SDHI0", | |
693 | .start = 0x04ce0000, | |
d80e9221 | 694 | .end = 0x04ce00ff, |
96987d96 KM |
695 | .flags = IORESOURCE_MEM, |
696 | }, | |
697 | [1] = { | |
9307d115 | 698 | .start = evt2irq(0xe80), |
96987d96 KM |
699 | .flags = IORESOURCE_IRQ, |
700 | }, | |
701 | }; | |
702 | ||
703 | static struct platform_device sdhi0_device = { | |
704 | .name = "sh_mobile_sdhi", | |
705 | .num_resources = ARRAY_SIZE(sdhi0_resources), | |
706 | .resource = sdhi0_resources, | |
707 | .id = 0, | |
98779ad8 MD |
708 | .dev = { |
709 | .platform_data = &sdhi0_info, | |
710 | }, | |
96987d96 KM |
711 | }; |
712 | ||
d4c191df GL |
713 | #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) |
714 | /* SDHI1 */ | |
84f11d5b KM |
715 | static struct tmio_mmc_data sdhi1_info = { |
716 | .chan_priv_tx = (void *)SHDMA_SLAVE_SDHI1_TX, | |
717 | .chan_priv_rx = (void *)SHDMA_SLAVE_SDHI1_RX, | |
718 | .capabilities = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD | | |
4eb80146 | 719 | MMC_CAP_NEEDS_POLL, |
84f11d5b | 720 | .flags = TMIO_MMC_USE_GPIO_CD, |
afa2c940 | 721 | .cd_gpio = GPIO_PTW7, |
98779ad8 MD |
722 | }; |
723 | ||
96987d96 KM |
724 | static struct resource sdhi1_resources[] = { |
725 | [0] = { | |
726 | .name = "SDHI1", | |
727 | .start = 0x04cf0000, | |
d80e9221 | 728 | .end = 0x04cf00ff, |
96987d96 KM |
729 | .flags = IORESOURCE_MEM, |
730 | }, | |
731 | [1] = { | |
9307d115 | 732 | .start = evt2irq(0x4e0), |
96987d96 KM |
733 | .flags = IORESOURCE_IRQ, |
734 | }, | |
735 | }; | |
736 | ||
737 | static struct platform_device sdhi1_device = { | |
738 | .name = "sh_mobile_sdhi", | |
739 | .num_resources = ARRAY_SIZE(sdhi1_resources), | |
740 | .resource = sdhi1_resources, | |
741 | .id = 1, | |
98779ad8 MD |
742 | .dev = { |
743 | .platform_data = &sdhi1_info, | |
744 | }, | |
96987d96 | 745 | }; |
1238c684 | 746 | #endif /* CONFIG_MMC_SH_MMCIF */ |
96987d96 | 747 | |
1ce4da7a MD |
748 | #else |
749 | ||
9503e891 | 750 | /* MMC SPI */ |
1ce4da7a MD |
751 | static void mmc_spi_setpower(struct device *dev, unsigned int maskval) |
752 | { | |
753 | gpio_set_value(GPIO_PTB6, maskval ? 1 : 0); | |
754 | } | |
755 | ||
756 | static struct mmc_spi_platform_data mmc_spi_info = { | |
1ce4da7a | 757 | .caps = MMC_CAP_NEEDS_POLL, |
afa2c940 | 758 | .caps2 = MMC_CAP2_RO_ACTIVE_HIGH, |
1ce4da7a MD |
759 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */ |
760 | .setpower = mmc_spi_setpower, | |
afa2c940 LP |
761 | .flags = MMC_SPI_USE_CD_GPIO | MMC_SPI_USE_RO_GPIO, |
762 | .cd_gpio = GPIO_PTY7, | |
763 | .ro_gpio = GPIO_PTY6, | |
1ce4da7a MD |
764 | }; |
765 | ||
766 | static struct spi_board_info spi_bus[] = { | |
767 | { | |
768 | .modalias = "mmc_spi", | |
769 | .platform_data = &mmc_spi_info, | |
770 | .max_speed_hz = 5000000, | |
771 | .mode = SPI_MODE_0, | |
772 | .controller_data = (void *) GPIO_PTM4, | |
773 | }, | |
774 | }; | |
775 | ||
9503e891 | 776 | /* MSIOF0 */ |
1ce4da7a MD |
777 | static struct sh_msiof_spi_info msiof0_data = { |
778 | .num_chipselect = 1, | |
779 | }; | |
780 | ||
781 | static struct resource msiof0_resources[] = { | |
782 | [0] = { | |
783 | .name = "MSIOF0", | |
784 | .start = 0xa4c40000, | |
785 | .end = 0xa4c40063, | |
786 | .flags = IORESOURCE_MEM, | |
787 | }, | |
788 | [1] = { | |
9307d115 | 789 | .start = evt2irq(0xc80), |
1ce4da7a MD |
790 | .flags = IORESOURCE_IRQ, |
791 | }, | |
792 | }; | |
793 | ||
794 | static struct platform_device msiof0_device = { | |
795 | .name = "spi_sh_msiof", | |
796 | .id = 0, /* MSIOF0 */ | |
797 | .dev = { | |
798 | .platform_data = &msiof0_data, | |
799 | }, | |
800 | .num_resources = ARRAY_SIZE(msiof0_resources), | |
801 | .resource = msiof0_resources, | |
1ce4da7a MD |
802 | }; |
803 | ||
804 | #endif | |
805 | ||
1980fdc4 | 806 | /* FSI */ |
1980fdc4 KM |
807 | static struct resource fsi_resources[] = { |
808 | [0] = { | |
809 | .name = "FSI", | |
810 | .start = 0xFE3C0000, | |
811 | .end = 0xFE3C021d, | |
812 | .flags = IORESOURCE_MEM, | |
813 | }, | |
814 | [1] = { | |
9307d115 | 815 | .start = evt2irq(0xf80), |
1980fdc4 KM |
816 | .flags = IORESOURCE_IRQ, |
817 | }, | |
818 | }; | |
819 | ||
820 | static struct platform_device fsi_device = { | |
821 | .name = "sh_fsi", | |
822 | .id = 0, | |
823 | .num_resources = ARRAY_SIZE(fsi_resources), | |
824 | .resource = fsi_resources, | |
1980fdc4 KM |
825 | }; |
826 | ||
064bfada KM |
827 | static struct asoc_simple_card_info fsi_da7210_info = { |
828 | .name = "DA7210", | |
829 | .card = "FSIB-DA7210", | |
064bfada KM |
830 | .codec = "da7210.0-001a", |
831 | .platform = "sh_fsi.0", | |
c7a507ee | 832 | .daifmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM, |
a4a2992c KM |
833 | .cpu_dai = { |
834 | .name = "fsib-dai", | |
a4a2992c KM |
835 | }, |
836 | .codec_dai = { | |
837 | .name = "da7210-hifi", | |
a4a2992c | 838 | }, |
064bfada KM |
839 | }; |
840 | ||
841 | static struct platform_device fsi_da7210_device = { | |
842 | .name = "asoc-simple-card", | |
843 | .dev = { | |
844 | .platform_data = &fsi_da7210_info, | |
ffb83e8c KM |
845 | .coherent_dma_mask = DMA_BIT_MASK(32), |
846 | .dma_mask = &fsi_da7210_device.dev.coherent_dma_mask, | |
064bfada KM |
847 | }, |
848 | }; | |
849 | ||
850 | ||
26365716 KM |
851 | /* IrDA */ |
852 | static struct resource irda_resources[] = { | |
853 | [0] = { | |
854 | .name = "IrDA", | |
855 | .start = 0xA45D0000, | |
856 | .end = 0xA45D0049, | |
857 | .flags = IORESOURCE_MEM, | |
858 | }, | |
859 | [1] = { | |
9307d115 | 860 | .start = evt2irq(0x480), |
26365716 KM |
861 | .flags = IORESOURCE_IRQ, |
862 | }, | |
863 | }; | |
864 | ||
865 | static struct platform_device irda_device = { | |
866 | .name = "sh_sir", | |
867 | .num_resources = ARRAY_SIZE(irda_resources), | |
868 | .resource = irda_resources, | |
869 | }; | |
870 | ||
b5dcee22 | 871 | #include <media/i2c/ak881x.h> |
d647f0b7 | 872 | #include <media/drv-intf/sh_vou.h> |
aee5ab0b | 873 | |
3ce09334 | 874 | static struct ak881x_pdata ak881x_pdata = { |
aee5ab0b GL |
875 | .flags = AK881X_IF_MODE_SLAVE, |
876 | }; | |
877 | ||
878 | static struct i2c_board_info ak8813 = { | |
879 | I2C_BOARD_INFO("ak8813", 0x20), | |
880 | .platform_data = &ak881x_pdata, | |
881 | }; | |
882 | ||
3ce09334 | 883 | static struct sh_vou_pdata sh_vou_pdata = { |
aee5ab0b GL |
884 | .bus_fmt = SH_VOU_BUS_8BIT, |
885 | .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW, | |
886 | .board_info = &ak8813, | |
887 | .i2c_adap = 0, | |
aee5ab0b GL |
888 | }; |
889 | ||
890 | static struct resource sh_vou_resources[] = { | |
891 | [0] = { | |
892 | .start = 0xfe960000, | |
893 | .end = 0xfe962043, | |
894 | .flags = IORESOURCE_MEM, | |
895 | }, | |
896 | [1] = { | |
9307d115 | 897 | .start = evt2irq(0x8e0), |
aee5ab0b GL |
898 | .flags = IORESOURCE_IRQ, |
899 | }, | |
900 | }; | |
901 | ||
902 | static struct platform_device vou_device = { | |
903 | .name = "sh-vou", | |
904 | .id = -1, | |
905 | .num_resources = ARRAY_SIZE(sh_vou_resources), | |
906 | .resource = sh_vou_resources, | |
907 | .dev = { | |
908 | .platform_data = &sh_vou_pdata, | |
909 | }, | |
aee5ab0b GL |
910 | }; |
911 | ||
5744c881 | 912 | #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE) |
1238c684 | 913 | /* SH_MMCIF */ |
1238c684 YG |
914 | static struct resource sh_mmcif_resources[] = { |
915 | [0] = { | |
916 | .name = "SH_MMCIF", | |
917 | .start = 0xA4CA0000, | |
918 | .end = 0xA4CA00FF, | |
919 | .flags = IORESOURCE_MEM, | |
920 | }, | |
921 | [1] = { | |
922 | /* MMC2I */ | |
9307d115 | 923 | .start = evt2irq(0x5a0), |
1238c684 YG |
924 | .flags = IORESOURCE_IRQ, |
925 | }, | |
926 | [2] = { | |
927 | /* MMC3I */ | |
9307d115 | 928 | .start = evt2irq(0x5c0), |
1238c684 YG |
929 | .flags = IORESOURCE_IRQ, |
930 | }, | |
931 | }; | |
932 | ||
3ce09334 | 933 | static struct sh_mmcif_plat_data sh_mmcif_plat = { |
1238c684 YG |
934 | .sup_pclk = 0, /* SH7724: Max Pclk/2 */ |
935 | .caps = MMC_CAP_4_BIT_DATA | | |
936 | MMC_CAP_8_BIT_DATA | | |
937 | MMC_CAP_NEEDS_POLL, | |
938 | .ocr = MMC_VDD_32_33 | MMC_VDD_33_34, | |
939 | }; | |
940 | ||
941 | static struct platform_device sh_mmcif_device = { | |
942 | .name = "sh_mmcif", | |
943 | .id = 0, | |
944 | .dev = { | |
945 | .platform_data = &sh_mmcif_plat, | |
946 | }, | |
947 | .num_resources = ARRAY_SIZE(sh_mmcif_resources), | |
948 | .resource = sh_mmcif_resources, | |
949 | }; | |
950 | #endif | |
951 | ||
c2f9b05f JM |
952 | static struct platform_device *ecovec_ceu_devices[] __initdata = { |
953 | &ceu0_device, | |
954 | &ceu1_device, | |
955 | }; | |
956 | ||
4138b740 KM |
957 | static struct platform_device *ecovec_devices[] __initdata = { |
958 | &heartbeat_device, | |
959 | &nor_flash_device, | |
35a35408 | 960 | &sh_eth_device, |
907050a3 | 961 | &usb0_host_device, |
3714a9a0 | 962 | &usb1_common_device, |
fb2e7394 | 963 | &usbhs_device, |
fa3ba51b | 964 | &lcdc_device, |
fe79f919 | 965 | &gpio_backlight_device, |
e9103e74 | 966 | &keysc_device, |
d4c191df | 967 | &cn12_power, |
5744c881 | 968 | #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE) |
d4c191df | 969 | &sdhi0_power, |
96987d96 | 970 | &sdhi0_device, |
5744c881 | 971 | #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) |
96987d96 | 972 | &sdhi1_device, |
1238c684 | 973 | #endif |
1ce4da7a MD |
974 | #else |
975 | &msiof0_device, | |
976 | #endif | |
1980fdc4 | 977 | &fsi_device, |
064bfada | 978 | &fsi_da7210_device, |
26365716 | 979 | &irda_device, |
aee5ab0b | 980 | &vou_device, |
5744c881 | 981 | #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE) |
1238c684 YG |
982 | &sh_mmcif_device, |
983 | #endif | |
4138b740 KM |
984 | }; |
985 | ||
6b3b5575 | 986 | #ifdef CONFIG_I2C |
4907d57f KM |
987 | #define EEPROM_ADDR 0x50 |
988 | static u8 mac_read(struct i2c_adapter *a, u8 command) | |
989 | { | |
990 | struct i2c_msg msg[2]; | |
991 | u8 buf; | |
992 | int ret; | |
993 | ||
994 | msg[0].addr = EEPROM_ADDR; | |
995 | msg[0].flags = 0; | |
996 | msg[0].len = 1; | |
997 | msg[0].buf = &command; | |
998 | ||
999 | msg[1].addr = EEPROM_ADDR; | |
1000 | msg[1].flags = I2C_M_RD; | |
1001 | msg[1].len = 1; | |
1002 | msg[1].buf = &buf; | |
1003 | ||
1004 | ret = i2c_transfer(a, msg, 2); | |
1005 | if (ret < 0) { | |
1006 | printk(KERN_ERR "error %d\n", ret); | |
1007 | buf = 0xff; | |
1008 | } | |
1009 | ||
1010 | return buf; | |
1011 | } | |
1012 | ||
376abbb4 | 1013 | static void __init sh_eth_init(struct sh_eth_plat_data *pd) |
4907d57f KM |
1014 | { |
1015 | struct i2c_adapter *a = i2c_get_adapter(1); | |
4907d57f KM |
1016 | int i; |
1017 | ||
1018 | if (!a) { | |
1019 | pr_err("can not get I2C 1\n"); | |
1020 | return; | |
1021 | } | |
1022 | ||
25985edc | 1023 | /* read MAC address from EEPROM */ |
376abbb4 MD |
1024 | for (i = 0; i < sizeof(pd->mac_addr); i++) { |
1025 | pd->mac_addr[i] = mac_read(a, 0x10 + i); | |
4907d57f KM |
1026 | msleep(10); |
1027 | } | |
b230eb32 KM |
1028 | |
1029 | i2c_put_adapter(a); | |
4907d57f | 1030 | } |
6b3b5575 MD |
1031 | #else |
1032 | static void __init sh_eth_init(struct sh_eth_plat_data *pd) | |
1033 | { | |
1034 | pr_err("unable to read sh_eth MAC address\n"); | |
1035 | } | |
1036 | #endif | |
4907d57f | 1037 | |
fa3ba51b | 1038 | #define PORT_HIZA 0xA4050158 |
ea15edb2 | 1039 | #define IODRIVEA 0xA405018A |
eb0cd9e8 MD |
1040 | |
1041 | extern char ecovec24_sdram_enter_start; | |
1042 | extern char ecovec24_sdram_enter_end; | |
1043 | extern char ecovec24_sdram_leave_start; | |
1044 | extern char ecovec24_sdram_leave_end; | |
1045 | ||
4907d57f | 1046 | static int __init arch_setup(void) |
4138b740 | 1047 | { |
1980fdc4 | 1048 | struct clk *clk; |
4eb80146 | 1049 | bool cn12_enabled = false; |
1980fdc4 | 1050 | |
eb0cd9e8 | 1051 | /* register board specific self-refresh code */ |
2839bd61 MD |
1052 | sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF | |
1053 | SUSP_SH_RSTANDBY, | |
eb0cd9e8 MD |
1054 | &ecovec24_sdram_enter_start, |
1055 | &ecovec24_sdram_enter_end, | |
1056 | &ecovec24_sdram_leave_start, | |
1057 | &ecovec24_sdram_leave_end); | |
1058 | ||
f78bab30 MD |
1059 | /* enable STATUS0, STATUS2 and PDSTATUS */ |
1060 | gpio_request(GPIO_FN_STATUS0, NULL); | |
1061 | gpio_request(GPIO_FN_STATUS2, NULL); | |
1062 | gpio_request(GPIO_FN_PDSTATUS, NULL); | |
1063 | ||
4138b740 KM |
1064 | /* enable SCIFA0 */ |
1065 | gpio_request(GPIO_FN_SCIF0_TXD, NULL); | |
1066 | gpio_request(GPIO_FN_SCIF0_RXD, NULL); | |
4138b740 KM |
1067 | |
1068 | /* enable debug LED */ | |
1069 | gpio_request(GPIO_PTG0, NULL); | |
1070 | gpio_request(GPIO_PTG1, NULL); | |
1071 | gpio_request(GPIO_PTG2, NULL); | |
1072 | gpio_request(GPIO_PTG3, NULL); | |
b7056bc1 KM |
1073 | gpio_direction_output(GPIO_PTG0, 0); |
1074 | gpio_direction_output(GPIO_PTG1, 0); | |
1075 | gpio_direction_output(GPIO_PTG2, 0); | |
1076 | gpio_direction_output(GPIO_PTG3, 0); | |
9d56dd3b | 1077 | __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); |
4138b740 | 1078 | |
35a35408 KM |
1079 | /* enable SH-Eth */ |
1080 | gpio_request(GPIO_PTA1, NULL); | |
1081 | gpio_direction_output(GPIO_PTA1, 1); | |
1082 | mdelay(20); | |
1083 | ||
1084 | gpio_request(GPIO_FN_RMII_RXD0, NULL); | |
1085 | gpio_request(GPIO_FN_RMII_RXD1, NULL); | |
1086 | gpio_request(GPIO_FN_RMII_TXD0, NULL); | |
1087 | gpio_request(GPIO_FN_RMII_TXD1, NULL); | |
1088 | gpio_request(GPIO_FN_RMII_REF_CLK, NULL); | |
1089 | gpio_request(GPIO_FN_RMII_TX_EN, NULL); | |
1090 | gpio_request(GPIO_FN_RMII_RX_ER, NULL); | |
1091 | gpio_request(GPIO_FN_RMII_CRS_DV, NULL); | |
1092 | gpio_request(GPIO_FN_MDIO, NULL); | |
1093 | gpio_request(GPIO_FN_MDC, NULL); | |
1094 | gpio_request(GPIO_FN_LNKSTA, NULL); | |
1095 | ||
907050a3 | 1096 | /* enable USB */ |
9d56dd3b PM |
1097 | __raw_writew(0x0000, 0xA4D80000); |
1098 | __raw_writew(0x0000, 0xA4D90000); | |
907050a3 KM |
1099 | gpio_request(GPIO_PTB3, NULL); |
1100 | gpio_request(GPIO_PTB4, NULL); | |
1101 | gpio_request(GPIO_PTB5, NULL); | |
1102 | gpio_direction_input(GPIO_PTB3); | |
1103 | gpio_direction_output(GPIO_PTB4, 0); | |
1104 | gpio_direction_output(GPIO_PTB5, 0); | |
9d56dd3b PM |
1105 | __raw_writew(0x0600, 0xa40501d4); |
1106 | __raw_writew(0x0600, 0xa4050192); | |
907050a3 | 1107 | |
3714a9a0 KM |
1108 | if (gpio_get_value(GPIO_PTB3)) { |
1109 | printk(KERN_INFO "USB1 function is selected\n"); | |
1110 | usb1_common_device.name = "r8a66597_udc"; | |
1111 | } else { | |
1112 | printk(KERN_INFO "USB1 host is selected\n"); | |
1113 | usb1_common_device.name = "r8a66597_hcd"; | |
1114 | } | |
1115 | ||
fa3ba51b KM |
1116 | /* enable LCDC */ |
1117 | gpio_request(GPIO_FN_LCDD23, NULL); | |
1118 | gpio_request(GPIO_FN_LCDD22, NULL); | |
1119 | gpio_request(GPIO_FN_LCDD21, NULL); | |
1120 | gpio_request(GPIO_FN_LCDD20, NULL); | |
1121 | gpio_request(GPIO_FN_LCDD19, NULL); | |
1122 | gpio_request(GPIO_FN_LCDD18, NULL); | |
1123 | gpio_request(GPIO_FN_LCDD17, NULL); | |
1124 | gpio_request(GPIO_FN_LCDD16, NULL); | |
1125 | gpio_request(GPIO_FN_LCDD15, NULL); | |
1126 | gpio_request(GPIO_FN_LCDD14, NULL); | |
1127 | gpio_request(GPIO_FN_LCDD13, NULL); | |
1128 | gpio_request(GPIO_FN_LCDD12, NULL); | |
1129 | gpio_request(GPIO_FN_LCDD11, NULL); | |
1130 | gpio_request(GPIO_FN_LCDD10, NULL); | |
1131 | gpio_request(GPIO_FN_LCDD9, NULL); | |
1132 | gpio_request(GPIO_FN_LCDD8, NULL); | |
1133 | gpio_request(GPIO_FN_LCDD7, NULL); | |
1134 | gpio_request(GPIO_FN_LCDD6, NULL); | |
1135 | gpio_request(GPIO_FN_LCDD5, NULL); | |
1136 | gpio_request(GPIO_FN_LCDD4, NULL); | |
1137 | gpio_request(GPIO_FN_LCDD3, NULL); | |
1138 | gpio_request(GPIO_FN_LCDD2, NULL); | |
1139 | gpio_request(GPIO_FN_LCDD1, NULL); | |
1140 | gpio_request(GPIO_FN_LCDD0, NULL); | |
1141 | gpio_request(GPIO_FN_LCDDISP, NULL); | |
1142 | gpio_request(GPIO_FN_LCDHSYN, NULL); | |
1143 | gpio_request(GPIO_FN_LCDDCK, NULL); | |
1144 | gpio_request(GPIO_FN_LCDVSYN, NULL); | |
1145 | gpio_request(GPIO_FN_LCDDON, NULL); | |
1146 | gpio_request(GPIO_FN_LCDLCLK, NULL); | |
9d56dd3b | 1147 | __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); |
fa3ba51b KM |
1148 | |
1149 | gpio_request(GPIO_PTE6, NULL); | |
1150 | gpio_request(GPIO_PTU1, NULL); | |
fa3ba51b KM |
1151 | gpio_request(GPIO_PTA2, NULL); |
1152 | gpio_direction_input(GPIO_PTE6); | |
1153 | gpio_direction_output(GPIO_PTU1, 0); | |
fa3ba51b KM |
1154 | gpio_direction_output(GPIO_PTA2, 0); |
1155 | ||
82b33221 | 1156 | /* I/O buffer drive ability is high */ |
9d56dd3b | 1157 | __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA); |
ea15edb2 | 1158 | |
fa3ba51b KM |
1159 | if (gpio_get_value(GPIO_PTE6)) { |
1160 | /* DVI */ | |
1161 | lcdc_info.clock_source = LCDC_CLK_EXTERNAL; | |
44432407 | 1162 | lcdc_info.ch[0].clock_divider = 1; |
93ff2598 LP |
1163 | lcdc_info.ch[0].lcd_modes = ecovec_dvi_modes; |
1164 | lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_dvi_modes); | |
fa3ba51b | 1165 | |
fe79f919 LP |
1166 | /* No backlight */ |
1167 | gpio_backlight_data.fbdev = NULL; | |
1168 | ||
fa3ba51b KM |
1169 | gpio_set_value(GPIO_PTA2, 1); |
1170 | gpio_set_value(GPIO_PTU1, 1); | |
1171 | } else { | |
1172 | /* Panel */ | |
ea15edb2 | 1173 | lcdc_info.clock_source = LCDC_CLK_PERIPHERAL; |
44432407 | 1174 | lcdc_info.ch[0].clock_divider = 2; |
93ff2598 LP |
1175 | lcdc_info.ch[0].lcd_modes = ecovec_lcd_modes; |
1176 | lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_lcd_modes); | |
ea15edb2 | 1177 | |
ea15edb2 KM |
1178 | /* FIXME |
1179 | * | |
1180 | * LCDDON control is needed for Panel, | |
1181 | * but current sh_mobile_lcdc driver doesn't control it. | |
1182 | * It is temporary correspondence | |
1183 | */ | |
1184 | gpio_request(GPIO_PTF4, NULL); | |
1185 | gpio_direction_output(GPIO_PTF4, 1); | |
8810e055 KM |
1186 | |
1187 | /* enable TouchScreen */ | |
1188 | i2c_register_board_info(0, &ts_i2c_clients, 1); | |
fcb8918f | 1189 | irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW); |
fa3ba51b KM |
1190 | } |
1191 | ||
2153ad32 KM |
1192 | /* enable CEU0 */ |
1193 | gpio_request(GPIO_FN_VIO0_D15, NULL); | |
1194 | gpio_request(GPIO_FN_VIO0_D14, NULL); | |
1195 | gpio_request(GPIO_FN_VIO0_D13, NULL); | |
1196 | gpio_request(GPIO_FN_VIO0_D12, NULL); | |
1197 | gpio_request(GPIO_FN_VIO0_D11, NULL); | |
1198 | gpio_request(GPIO_FN_VIO0_D10, NULL); | |
1199 | gpio_request(GPIO_FN_VIO0_D9, NULL); | |
1200 | gpio_request(GPIO_FN_VIO0_D8, NULL); | |
1201 | gpio_request(GPIO_FN_VIO0_D7, NULL); | |
1202 | gpio_request(GPIO_FN_VIO0_D6, NULL); | |
1203 | gpio_request(GPIO_FN_VIO0_D5, NULL); | |
1204 | gpio_request(GPIO_FN_VIO0_D4, NULL); | |
1205 | gpio_request(GPIO_FN_VIO0_D3, NULL); | |
1206 | gpio_request(GPIO_FN_VIO0_D2, NULL); | |
1207 | gpio_request(GPIO_FN_VIO0_D1, NULL); | |
1208 | gpio_request(GPIO_FN_VIO0_D0, NULL); | |
1209 | gpio_request(GPIO_FN_VIO0_VD, NULL); | |
1210 | gpio_request(GPIO_FN_VIO0_CLK, NULL); | |
1211 | gpio_request(GPIO_FN_VIO0_FLD, NULL); | |
1212 | gpio_request(GPIO_FN_VIO0_HD, NULL); | |
2153ad32 KM |
1213 | |
1214 | /* enable CEU1 */ | |
1215 | gpio_request(GPIO_FN_VIO1_D7, NULL); | |
1216 | gpio_request(GPIO_FN_VIO1_D6, NULL); | |
1217 | gpio_request(GPIO_FN_VIO1_D5, NULL); | |
1218 | gpio_request(GPIO_FN_VIO1_D4, NULL); | |
1219 | gpio_request(GPIO_FN_VIO1_D3, NULL); | |
1220 | gpio_request(GPIO_FN_VIO1_D2, NULL); | |
1221 | gpio_request(GPIO_FN_VIO1_D1, NULL); | |
1222 | gpio_request(GPIO_FN_VIO1_D0, NULL); | |
1223 | gpio_request(GPIO_FN_VIO1_FLD, NULL); | |
1224 | gpio_request(GPIO_FN_VIO1_HD, NULL); | |
1225 | gpio_request(GPIO_FN_VIO1_VD, NULL); | |
1226 | gpio_request(GPIO_FN_VIO1_CLK, NULL); | |
2153ad32 | 1227 | |
e9103e74 KM |
1228 | /* enable KEYSC */ |
1229 | gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); | |
1230 | gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); | |
1231 | gpio_request(GPIO_FN_KEYOUT3, NULL); | |
1232 | gpio_request(GPIO_FN_KEYOUT2, NULL); | |
1233 | gpio_request(GPIO_FN_KEYOUT1, NULL); | |
1234 | gpio_request(GPIO_FN_KEYOUT0, NULL); | |
1235 | gpio_request(GPIO_FN_KEYIN0, NULL); | |
1236 | ||
064a16dc KM |
1237 | /* enable user debug switch */ |
1238 | gpio_request(GPIO_PTR0, NULL); | |
1239 | gpio_request(GPIO_PTR4, NULL); | |
1240 | gpio_request(GPIO_PTR5, NULL); | |
1241 | gpio_request(GPIO_PTR6, NULL); | |
1242 | gpio_direction_input(GPIO_PTR0); | |
1243 | gpio_direction_input(GPIO_PTR4); | |
1244 | gpio_direction_input(GPIO_PTR5); | |
1245 | gpio_direction_input(GPIO_PTR6); | |
1246 | ||
4eb80146 | 1247 | /* SD-card slot CN11 */ |
5744c881 | 1248 | #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE) |
1ce4da7a | 1249 | /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */ |
96987d96 KM |
1250 | gpio_request(GPIO_FN_SDHI0WP, NULL); |
1251 | gpio_request(GPIO_FN_SDHI0CMD, NULL); | |
1252 | gpio_request(GPIO_FN_SDHI0CLK, NULL); | |
1253 | gpio_request(GPIO_FN_SDHI0D3, NULL); | |
1254 | gpio_request(GPIO_FN_SDHI0D2, NULL); | |
1255 | gpio_request(GPIO_FN_SDHI0D1, NULL); | |
1256 | gpio_request(GPIO_FN_SDHI0D0, NULL); | |
1ce4da7a MD |
1257 | #else |
1258 | /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ | |
1259 | gpio_request(GPIO_FN_MSIOF0_TXD, NULL); | |
1260 | gpio_request(GPIO_FN_MSIOF0_RXD, NULL); | |
1261 | gpio_request(GPIO_FN_MSIOF0_TSCK, NULL); | |
1262 | gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */ | |
1263 | gpio_direction_output(GPIO_PTM4, 1); /* active low CS */ | |
1264 | gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */ | |
1265 | gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */ | |
1ce4da7a MD |
1266 | |
1267 | spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); | |
1268 | #endif | |
96987d96 | 1269 | |
4eb80146 GL |
1270 | /* MMC/SD-card slot CN12 */ |
1271 | #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE) | |
1272 | /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */ | |
1273 | gpio_request(GPIO_FN_MMC_D7, NULL); | |
1274 | gpio_request(GPIO_FN_MMC_D6, NULL); | |
1275 | gpio_request(GPIO_FN_MMC_D5, NULL); | |
1276 | gpio_request(GPIO_FN_MMC_D4, NULL); | |
1277 | gpio_request(GPIO_FN_MMC_D3, NULL); | |
1278 | gpio_request(GPIO_FN_MMC_D2, NULL); | |
1279 | gpio_request(GPIO_FN_MMC_D1, NULL); | |
1280 | gpio_request(GPIO_FN_MMC_D0, NULL); | |
1281 | gpio_request(GPIO_FN_MMC_CLK, NULL); | |
1282 | gpio_request(GPIO_FN_MMC_CMD, NULL); | |
4eb80146 GL |
1283 | |
1284 | cn12_enabled = true; | |
1285 | #elif defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE) | |
1286 | /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */ | |
1287 | gpio_request(GPIO_FN_SDHI1WP, NULL); | |
1288 | gpio_request(GPIO_FN_SDHI1CMD, NULL); | |
1289 | gpio_request(GPIO_FN_SDHI1CLK, NULL); | |
1290 | gpio_request(GPIO_FN_SDHI1D3, NULL); | |
1291 | gpio_request(GPIO_FN_SDHI1D2, NULL); | |
1292 | gpio_request(GPIO_FN_SDHI1D1, NULL); | |
1293 | gpio_request(GPIO_FN_SDHI1D0, NULL); | |
4eb80146 | 1294 | |
4eb80146 GL |
1295 | cn12_enabled = true; |
1296 | #endif | |
1297 | ||
1298 | if (cn12_enabled) | |
1299 | /* I/O buffer drive ability is high for CN12 */ | |
1300 | __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000, | |
1301 | IODRIVEA); | |
1302 | ||
1980fdc4 KM |
1303 | /* enable FSI */ |
1304 | gpio_request(GPIO_FN_FSIMCKB, NULL); | |
1305 | gpio_request(GPIO_FN_FSIIBSD, NULL); | |
1306 | gpio_request(GPIO_FN_FSIOBSD, NULL); | |
1307 | gpio_request(GPIO_FN_FSIIBBCK, NULL); | |
1308 | gpio_request(GPIO_FN_FSIIBLRCK, NULL); | |
1309 | gpio_request(GPIO_FN_FSIOBBCK, NULL); | |
1310 | gpio_request(GPIO_FN_FSIOBLRCK, NULL); | |
1311 | gpio_request(GPIO_FN_CLKAUDIOBO, NULL); | |
1312 | ||
16afc9fb KM |
1313 | /* set SPU2 clock to 83.4 MHz */ |
1314 | clk = clk_get(NULL, "spu_clk"); | |
56ea5109 | 1315 | if (!IS_ERR(clk)) { |
10305853 KM |
1316 | clk_set_rate(clk, clk_round_rate(clk, 83333333)); |
1317 | clk_put(clk); | |
1318 | } | |
16afc9fb | 1319 | |
1980fdc4 KM |
1320 | /* change parent of FSI B */ |
1321 | clk = clk_get(NULL, "fsib_clk"); | |
56ea5109 | 1322 | if (!IS_ERR(clk)) { |
4bd5d259 KM |
1323 | /* 48kHz dummy clock was used to make sure 1/1 divide */ |
1324 | clk_set_rate(&sh7724_fsimckb_clk, 48000); | |
1325 | clk_set_parent(clk, &sh7724_fsimckb_clk); | |
1326 | clk_set_rate(clk, 48000); | |
10305853 KM |
1327 | clk_put(clk); |
1328 | } | |
1980fdc4 KM |
1329 | |
1330 | gpio_request(GPIO_PTU0, NULL); | |
1331 | gpio_direction_output(GPIO_PTU0, 0); | |
1332 | mdelay(20); | |
1333 | ||
ea440783 NH |
1334 | /* enable motion sensor */ |
1335 | gpio_request(GPIO_FN_INTC_IRQ1, NULL); | |
1336 | gpio_direction_input(GPIO_FN_INTC_IRQ1); | |
1337 | ||
6f26d19f MD |
1338 | /* set VPU clock to 166 MHz */ |
1339 | clk = clk_get(NULL, "vpu_clk"); | |
56ea5109 | 1340 | if (!IS_ERR(clk)) { |
10305853 KM |
1341 | clk_set_rate(clk, clk_round_rate(clk, 166000000)); |
1342 | clk_put(clk); | |
1343 | } | |
6f26d19f | 1344 | |
26365716 KM |
1345 | /* enable IrDA */ |
1346 | gpio_request(GPIO_FN_IRDA_OUT, NULL); | |
1347 | gpio_request(GPIO_FN_IRDA_IN, NULL); | |
1348 | gpio_request(GPIO_PTU5, NULL); | |
1349 | gpio_direction_output(GPIO_PTU5, 0); | |
1350 | ||
c2f9b05f JM |
1351 | /* Register gpio lookup tables for cameras and video decoder */ |
1352 | gpiod_add_lookup_table(&tw9910_gpios); | |
1353 | gpiod_add_lookup_table(&mt9t112_0_gpios); | |
1354 | gpiod_add_lookup_table(&mt9t112_1_gpios); | |
1355 | ||
125ecce6 | 1356 | /* enable I2C device */ |
1980fdc4 KM |
1357 | i2c_register_board_info(0, i2c0_devices, |
1358 | ARRAY_SIZE(i2c0_devices)); | |
1359 | ||
125ecce6 KM |
1360 | i2c_register_board_info(1, i2c1_devices, |
1361 | ARRAY_SIZE(i2c1_devices)); | |
1362 | ||
92359a70 | 1363 | #if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE) |
aee5ab0b GL |
1364 | /* VOU */ |
1365 | gpio_request(GPIO_FN_DV_D15, NULL); | |
1366 | gpio_request(GPIO_FN_DV_D14, NULL); | |
1367 | gpio_request(GPIO_FN_DV_D13, NULL); | |
1368 | gpio_request(GPIO_FN_DV_D12, NULL); | |
1369 | gpio_request(GPIO_FN_DV_D11, NULL); | |
1370 | gpio_request(GPIO_FN_DV_D10, NULL); | |
1371 | gpio_request(GPIO_FN_DV_D9, NULL); | |
1372 | gpio_request(GPIO_FN_DV_D8, NULL); | |
1373 | gpio_request(GPIO_FN_DV_CLKI, NULL); | |
1374 | gpio_request(GPIO_FN_DV_CLK, NULL); | |
1375 | gpio_request(GPIO_FN_DV_VSYNC, NULL); | |
1376 | gpio_request(GPIO_FN_DV_HSYNC, NULL); | |
1377 | ||
1378 | /* AK8813 power / reset sequence */ | |
1379 | gpio_request(GPIO_PTG4, NULL); | |
1380 | gpio_request(GPIO_PTU3, NULL); | |
1381 | /* Reset */ | |
1382 | gpio_direction_output(GPIO_PTG4, 0); | |
1383 | /* Power down */ | |
1384 | gpio_direction_output(GPIO_PTU3, 1); | |
1385 | ||
1386 | udelay(10); | |
1387 | ||
1388 | /* Power up, reset */ | |
1389 | gpio_set_value(GPIO_PTU3, 0); | |
1390 | ||
1391 | udelay(10); | |
1392 | ||
1393 | /* Remove reset */ | |
1394 | gpio_set_value(GPIO_PTG4, 1); | |
92359a70 | 1395 | #endif |
aee5ab0b | 1396 | |
c2f9b05f JM |
1397 | /* Initialize CEU platform devices separately to map memory first */ |
1398 | device_initialize(&ecovec_ceu_devices[0]->dev); | |
1399 | arch_setup_pdev_archdata(ecovec_ceu_devices[0]); | |
1400 | dma_declare_coherent_memory(&ecovec_ceu_devices[0]->dev, | |
1401 | ceu0_dma_membase, ceu0_dma_membase, | |
1402 | ceu0_dma_membase + | |
1403 | CEU_BUFFER_MEMORY_SIZE - 1, | |
1404 | DMA_MEMORY_EXCLUSIVE); | |
1405 | platform_device_add(ecovec_ceu_devices[0]); | |
1406 | ||
1407 | device_initialize(&ecovec_ceu_devices[1]->dev); | |
1408 | arch_setup_pdev_archdata(ecovec_ceu_devices[1]); | |
1409 | dma_declare_coherent_memory(&ecovec_ceu_devices[1]->dev, | |
1410 | ceu1_dma_membase, ceu1_dma_membase, | |
1411 | ceu1_dma_membase + | |
1412 | CEU_BUFFER_MEMORY_SIZE - 1, | |
1413 | DMA_MEMORY_EXCLUSIVE); | |
1414 | platform_device_add(ecovec_ceu_devices[1]); | |
1415 | ||
4138b740 KM |
1416 | return platform_add_devices(ecovec_devices, |
1417 | ARRAY_SIZE(ecovec_devices)); | |
1418 | } | |
4907d57f KM |
1419 | arch_initcall(arch_setup); |
1420 | ||
1421 | static int __init devices_setup(void) | |
1422 | { | |
376abbb4 | 1423 | sh_eth_init(&sh_eth_plat); |
4907d57f KM |
1424 | return 0; |
1425 | } | |
1426 | device_initcall(devices_setup); | |
1427 | ||
c2f9b05f JM |
1428 | /* Reserve a portion of memory for CEU 0 and CEU 1 buffers */ |
1429 | static void __init ecovec_mv_mem_reserve(void) | |
1430 | { | |
1431 | phys_addr_t phys; | |
1432 | phys_addr_t size = CEU_BUFFER_MEMORY_SIZE; | |
1433 | ||
1434 | phys = memblock_alloc_base(size, PAGE_SIZE, MEMBLOCK_ALLOC_ANYWHERE); | |
1435 | memblock_free(phys, size); | |
1436 | memblock_remove(phys, size); | |
1437 | ceu0_dma_membase = phys; | |
1438 | ||
1439 | phys = memblock_alloc_base(size, PAGE_SIZE, MEMBLOCK_ALLOC_ANYWHERE); | |
1440 | memblock_free(phys, size); | |
1441 | memblock_remove(phys, size); | |
1442 | ceu1_dma_membase = phys; | |
1443 | } | |
1444 | ||
4138b740 KM |
1445 | static struct sh_machine_vector mv_ecovec __initmv = { |
1446 | .mv_name = "R0P7724 (EcoVec)", | |
c2f9b05f | 1447 | .mv_mem_reserve = ecovec_mv_mem_reserve, |
4138b740 | 1448 | }; |