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4138b740 KM |
1 | /* |
2 | * Copyright (C) 2009 Renesas Solutions Corp. | |
3 | * | |
4 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> | |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file "COPYING" in the main directory of this archive | |
8 | * for more details. | |
9 | */ | |
10 | ||
11 | #include <linux/init.h> | |
12 | #include <linux/device.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/mtd/physmap.h> | |
15 | #include <linux/gpio.h> | |
16 | #include <linux/interrupt.h> | |
35a35408 KM |
17 | #include <linux/io.h> |
18 | #include <linux/delay.h> | |
907050a3 | 19 | #include <linux/usb/r8a66597.h> |
4907d57f | 20 | #include <linux/i2c.h> |
fa3ba51b | 21 | #include <video/sh_mobile_lcdc.h> |
2153ad32 | 22 | #include <media/sh_mobile_ceu.h> |
4138b740 | 23 | #include <asm/heartbeat.h> |
35a35408 | 24 | #include <asm/sh_eth.h> |
4138b740 KM |
25 | #include <cpu/sh7724.h> |
26 | ||
27 | /* | |
b7056bc1 KM |
28 | * Address Interface BusWidth |
29 | *----------------------------------------- | |
30 | * 0x0000_0000 uboot 16bit | |
31 | * 0x0004_0000 Linux romImage 16bit | |
32 | * 0x0014_0000 MTD for Linux 16bit | |
33 | * 0x0400_0000 Internal I/O 16/32bit | |
34 | * 0x0800_0000 DRAM 32bit | |
35 | * 0x1800_0000 MFI 16bit | |
4138b740 KM |
36 | */ |
37 | ||
38 | /* Heartbeat */ | |
39 | static unsigned char led_pos[] = { 0, 1, 2, 3 }; | |
40 | static struct heartbeat_data heartbeat_data = { | |
41 | .regsize = 8, | |
42 | .nr_bits = 4, | |
43 | .bit_pos = led_pos, | |
44 | }; | |
45 | ||
46 | static struct resource heartbeat_resources[] = { | |
47 | [0] = { | |
48 | .start = 0xA405012C, /* PTG */ | |
49 | .end = 0xA405012E - 1, | |
50 | .flags = IORESOURCE_MEM, | |
51 | }, | |
52 | }; | |
53 | ||
54 | static struct platform_device heartbeat_device = { | |
55 | .name = "heartbeat", | |
56 | .id = -1, | |
57 | .dev = { | |
58 | .platform_data = &heartbeat_data, | |
59 | }, | |
60 | .num_resources = ARRAY_SIZE(heartbeat_resources), | |
61 | .resource = heartbeat_resources, | |
62 | }; | |
63 | ||
64 | /* MTD */ | |
65 | static struct mtd_partition nor_flash_partitions[] = { | |
66 | { | |
b7056bc1 | 67 | .name = "boot loader", |
4138b740 | 68 | .offset = 0, |
b7056bc1 | 69 | .size = (5 * 1024 * 1024), |
4138b740 | 70 | .mask_flags = MTD_CAP_ROM, |
4138b740 KM |
71 | }, { |
72 | .name = "free-area", | |
73 | .offset = MTDPART_OFS_APPEND, | |
74 | .size = MTDPART_SIZ_FULL, | |
75 | }, | |
76 | }; | |
77 | ||
78 | static struct physmap_flash_data nor_flash_data = { | |
79 | .width = 2, | |
80 | .parts = nor_flash_partitions, | |
81 | .nr_parts = ARRAY_SIZE(nor_flash_partitions), | |
82 | }; | |
83 | ||
84 | static struct resource nor_flash_resources[] = { | |
85 | [0] = { | |
86 | .name = "NOR Flash", | |
87 | .start = 0x00000000, | |
88 | .end = 0x03ffffff, | |
89 | .flags = IORESOURCE_MEM, | |
90 | } | |
91 | }; | |
92 | ||
93 | static struct platform_device nor_flash_device = { | |
94 | .name = "physmap-flash", | |
95 | .resource = nor_flash_resources, | |
96 | .num_resources = ARRAY_SIZE(nor_flash_resources), | |
97 | .dev = { | |
98 | .platform_data = &nor_flash_data, | |
99 | }, | |
100 | }; | |
101 | ||
35a35408 KM |
102 | /* SH Eth */ |
103 | #define SH_ETH_ADDR (0xA4600000) | |
104 | #define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0) | |
105 | #define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8) | |
106 | static struct resource sh_eth_resources[] = { | |
107 | [0] = { | |
108 | .start = SH_ETH_ADDR, | |
109 | .end = SH_ETH_ADDR + 0x1FC, | |
110 | .flags = IORESOURCE_MEM, | |
111 | }, | |
112 | [1] = { | |
113 | .start = 91, | |
114 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
115 | }, | |
116 | }; | |
117 | ||
118 | struct sh_eth_plat_data sh_eth_plat = { | |
119 | .phy = 0x1f, /* SMSC LAN8700 */ | |
120 | .edmac_endian = EDMAC_LITTLE_ENDIAN, | |
121 | }; | |
122 | ||
123 | static struct platform_device sh_eth_device = { | |
124 | .name = "sh-eth", | |
125 | .id = 0, | |
126 | .dev = { | |
127 | .platform_data = &sh_eth_plat, | |
128 | }, | |
129 | .num_resources = ARRAY_SIZE(sh_eth_resources), | |
130 | .resource = sh_eth_resources, | |
131 | }; | |
132 | ||
907050a3 KM |
133 | /* USB0 host */ |
134 | void usb0_port_power(int port, int power) | |
135 | { | |
136 | gpio_set_value(GPIO_PTB4, power); | |
137 | } | |
138 | ||
139 | static struct r8a66597_platdata usb0_host_data = { | |
140 | .on_chip = 1, | |
141 | .port_power = usb0_port_power, | |
142 | }; | |
143 | ||
144 | static struct resource usb0_host_resources[] = { | |
145 | [0] = { | |
146 | .start = 0xa4d80000, | |
147 | .end = 0xa4d80124 - 1, | |
148 | .flags = IORESOURCE_MEM, | |
149 | }, | |
150 | [1] = { | |
151 | .start = 65, | |
152 | .end = 65, | |
153 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | |
154 | }, | |
155 | }; | |
156 | ||
157 | static struct platform_device usb0_host_device = { | |
158 | .name = "r8a66597_hcd", | |
159 | .id = 0, | |
160 | .dev = { | |
161 | .dma_mask = NULL, /* not use dma */ | |
162 | .coherent_dma_mask = 0xffffffff, | |
163 | .platform_data = &usb0_host_data, | |
164 | }, | |
165 | .num_resources = ARRAY_SIZE(usb0_host_resources), | |
166 | .resource = usb0_host_resources, | |
167 | }; | |
168 | ||
169 | /* | |
170 | * USB1 | |
171 | * | |
172 | * CN5 can use both host/function, | |
173 | * and we can determine it by checking PTB[3] | |
174 | * | |
175 | * This time only USB1 host is supported. | |
176 | */ | |
177 | void usb1_port_power(int port, int power) | |
178 | { | |
179 | if (!gpio_get_value(GPIO_PTB3)) { | |
180 | printk(KERN_ERR "USB1 function is not supported\n"); | |
181 | return; | |
182 | } | |
183 | ||
184 | gpio_set_value(GPIO_PTB5, power); | |
185 | } | |
186 | ||
187 | static struct r8a66597_platdata usb1_host_data = { | |
188 | .on_chip = 1, | |
189 | .port_power = usb1_port_power, | |
190 | }; | |
191 | ||
192 | static struct resource usb1_host_resources[] = { | |
193 | [0] = { | |
194 | .start = 0xa4d90000, | |
195 | .end = 0xa4d90124 - 1, | |
196 | .flags = IORESOURCE_MEM, | |
197 | }, | |
198 | [1] = { | |
199 | .start = 66, | |
200 | .end = 66, | |
201 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | |
202 | }, | |
203 | }; | |
204 | ||
205 | static struct platform_device usb1_host_device = { | |
206 | .name = "r8a66597_hcd", | |
207 | .id = 1, | |
208 | .dev = { | |
209 | .dma_mask = NULL, /* not use dma */ | |
210 | .coherent_dma_mask = 0xffffffff, | |
211 | .platform_data = &usb1_host_data, | |
212 | }, | |
213 | .num_resources = ARRAY_SIZE(usb1_host_resources), | |
214 | .resource = usb1_host_resources, | |
215 | }; | |
216 | ||
fa3ba51b KM |
217 | /* LCDC */ |
218 | static struct sh_mobile_lcdc_info lcdc_info = { | |
219 | .ch[0] = { | |
220 | .interface_type = RGB18, | |
221 | .chan = LCDC_CHAN_MAINLCD, | |
222 | .bpp = 16, | |
fa3ba51b KM |
223 | .lcd_cfg = { |
224 | .sync = 0, /* hsync and vsync are active low */ | |
225 | }, | |
226 | .lcd_size_cfg = { /* 7.0 inch */ | |
227 | .width = 152, | |
228 | .height = 91, | |
229 | }, | |
230 | .board_cfg = { | |
231 | }, | |
232 | } | |
233 | }; | |
234 | ||
235 | static struct resource lcdc_resources[] = { | |
236 | [0] = { | |
237 | .name = "LCDC", | |
238 | .start = 0xfe940000, | |
239 | .end = 0xfe941fff, | |
240 | .flags = IORESOURCE_MEM, | |
241 | }, | |
242 | [1] = { | |
243 | .start = 106, | |
244 | .flags = IORESOURCE_IRQ, | |
245 | }, | |
246 | }; | |
247 | ||
248 | static struct platform_device lcdc_device = { | |
249 | .name = "sh_mobile_lcdc_fb", | |
250 | .num_resources = ARRAY_SIZE(lcdc_resources), | |
251 | .resource = lcdc_resources, | |
252 | .dev = { | |
253 | .platform_data = &lcdc_info, | |
254 | }, | |
255 | .archdata = { | |
256 | .hwblk_id = HWBLK_LCDC, | |
257 | }, | |
258 | }; | |
259 | ||
2153ad32 KM |
260 | /* CEU0 */ |
261 | static struct sh_mobile_ceu_info sh_mobile_ceu0_info = { | |
262 | .flags = SH_CEU_FLAG_USE_8BIT_BUS, | |
263 | }; | |
264 | ||
265 | static struct resource ceu0_resources[] = { | |
266 | [0] = { | |
267 | .name = "CEU0", | |
268 | .start = 0xfe910000, | |
269 | .end = 0xfe91009f, | |
270 | .flags = IORESOURCE_MEM, | |
271 | }, | |
272 | [1] = { | |
273 | .start = 52, | |
274 | .flags = IORESOURCE_IRQ, | |
275 | }, | |
276 | [2] = { | |
277 | /* place holder for contiguous memory */ | |
278 | }, | |
279 | }; | |
280 | ||
281 | static struct platform_device ceu0_device = { | |
282 | .name = "sh_mobile_ceu", | |
283 | .id = 0, /* "ceu0" clock */ | |
284 | .num_resources = ARRAY_SIZE(ceu0_resources), | |
285 | .resource = ceu0_resources, | |
286 | .dev = { | |
287 | .platform_data = &sh_mobile_ceu0_info, | |
288 | }, | |
289 | .archdata = { | |
290 | .hwblk_id = HWBLK_CEU0, | |
291 | }, | |
292 | }; | |
293 | ||
294 | /* CEU1 */ | |
295 | static struct sh_mobile_ceu_info sh_mobile_ceu1_info = { | |
296 | .flags = SH_CEU_FLAG_USE_8BIT_BUS, | |
297 | }; | |
298 | ||
299 | static struct resource ceu1_resources[] = { | |
300 | [0] = { | |
301 | .name = "CEU1", | |
302 | .start = 0xfe914000, | |
303 | .end = 0xfe91409f, | |
304 | .flags = IORESOURCE_MEM, | |
305 | }, | |
306 | [1] = { | |
307 | .start = 63, | |
308 | .flags = IORESOURCE_IRQ, | |
309 | }, | |
310 | [2] = { | |
311 | /* place holder for contiguous memory */ | |
312 | }, | |
313 | }; | |
314 | ||
315 | static struct platform_device ceu1_device = { | |
316 | .name = "sh_mobile_ceu", | |
317 | .id = 1, /* "ceu1" clock */ | |
318 | .num_resources = ARRAY_SIZE(ceu1_resources), | |
319 | .resource = ceu1_resources, | |
320 | .dev = { | |
321 | .platform_data = &sh_mobile_ceu1_info, | |
322 | }, | |
323 | .archdata = { | |
324 | .hwblk_id = HWBLK_CEU1, | |
325 | }, | |
326 | }; | |
327 | ||
125ecce6 KM |
328 | /* I2C device */ |
329 | static struct i2c_board_info i2c1_devices[] = { | |
330 | { | |
331 | I2C_BOARD_INFO("r2025sd", 0x32), | |
332 | }, | |
333 | }; | |
334 | ||
4138b740 KM |
335 | static struct platform_device *ecovec_devices[] __initdata = { |
336 | &heartbeat_device, | |
337 | &nor_flash_device, | |
35a35408 | 338 | &sh_eth_device, |
907050a3 KM |
339 | &usb0_host_device, |
340 | &usb1_host_device, /* USB1 host support */ | |
fa3ba51b | 341 | &lcdc_device, |
2153ad32 KM |
342 | &ceu0_device, |
343 | &ceu1_device, | |
4138b740 KM |
344 | }; |
345 | ||
4907d57f KM |
346 | #define EEPROM_ADDR 0x50 |
347 | static u8 mac_read(struct i2c_adapter *a, u8 command) | |
348 | { | |
349 | struct i2c_msg msg[2]; | |
350 | u8 buf; | |
351 | int ret; | |
352 | ||
353 | msg[0].addr = EEPROM_ADDR; | |
354 | msg[0].flags = 0; | |
355 | msg[0].len = 1; | |
356 | msg[0].buf = &command; | |
357 | ||
358 | msg[1].addr = EEPROM_ADDR; | |
359 | msg[1].flags = I2C_M_RD; | |
360 | msg[1].len = 1; | |
361 | msg[1].buf = &buf; | |
362 | ||
363 | ret = i2c_transfer(a, msg, 2); | |
364 | if (ret < 0) { | |
365 | printk(KERN_ERR "error %d\n", ret); | |
366 | buf = 0xff; | |
367 | } | |
368 | ||
369 | return buf; | |
370 | } | |
371 | ||
372 | #define MAC_LEN 6 | |
373 | static void __init sh_eth_init(void) | |
374 | { | |
375 | struct i2c_adapter *a = i2c_get_adapter(1); | |
376 | struct clk *eth_clk; | |
377 | u8 mac[MAC_LEN]; | |
378 | int i; | |
379 | ||
380 | if (!a) { | |
381 | pr_err("can not get I2C 1\n"); | |
382 | return; | |
383 | } | |
384 | ||
385 | eth_clk = clk_get(NULL, "eth0"); | |
386 | if (!eth_clk) { | |
387 | pr_err("can not get eth0 clk\n"); | |
388 | return; | |
389 | } | |
390 | ||
391 | /* read MAC address frome EEPROM */ | |
392 | for (i = 0; i < MAC_LEN; i++) { | |
393 | mac[i] = mac_read(a, 0x10 + i); | |
394 | msleep(10); | |
395 | } | |
396 | ||
397 | /* clock enable */ | |
398 | clk_enable(eth_clk); | |
399 | ||
400 | /* reset sh-eth */ | |
401 | ctrl_outl(0x1, SH_ETH_ADDR + 0x0); | |
402 | ||
403 | /* set MAC addr */ | |
404 | ctrl_outl((mac[0] << 24) | | |
405 | (mac[1] << 16) | | |
406 | (mac[2] << 8) | | |
407 | (mac[3] << 0), SH_ETH_MAHR); | |
408 | ctrl_outl((mac[4] << 8) | | |
409 | (mac[5] << 0), SH_ETH_MALR); | |
410 | ||
411 | clk_put(eth_clk); | |
412 | } | |
413 | ||
fa3ba51b | 414 | #define PORT_HIZA 0xA4050158 |
ea15edb2 | 415 | #define IODRIVEA 0xA405018A |
4907d57f | 416 | static int __init arch_setup(void) |
4138b740 KM |
417 | { |
418 | /* enable SCIFA0 */ | |
419 | gpio_request(GPIO_FN_SCIF0_TXD, NULL); | |
420 | gpio_request(GPIO_FN_SCIF0_RXD, NULL); | |
4138b740 KM |
421 | |
422 | /* enable debug LED */ | |
423 | gpio_request(GPIO_PTG0, NULL); | |
424 | gpio_request(GPIO_PTG1, NULL); | |
425 | gpio_request(GPIO_PTG2, NULL); | |
426 | gpio_request(GPIO_PTG3, NULL); | |
b7056bc1 KM |
427 | gpio_direction_output(GPIO_PTG0, 0); |
428 | gpio_direction_output(GPIO_PTG1, 0); | |
429 | gpio_direction_output(GPIO_PTG2, 0); | |
430 | gpio_direction_output(GPIO_PTG3, 0); | |
643e9d10 | 431 | ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); |
4138b740 | 432 | |
35a35408 KM |
433 | /* enable SH-Eth */ |
434 | gpio_request(GPIO_PTA1, NULL); | |
435 | gpio_direction_output(GPIO_PTA1, 1); | |
436 | mdelay(20); | |
437 | ||
438 | gpio_request(GPIO_FN_RMII_RXD0, NULL); | |
439 | gpio_request(GPIO_FN_RMII_RXD1, NULL); | |
440 | gpio_request(GPIO_FN_RMII_TXD0, NULL); | |
441 | gpio_request(GPIO_FN_RMII_TXD1, NULL); | |
442 | gpio_request(GPIO_FN_RMII_REF_CLK, NULL); | |
443 | gpio_request(GPIO_FN_RMII_TX_EN, NULL); | |
444 | gpio_request(GPIO_FN_RMII_RX_ER, NULL); | |
445 | gpio_request(GPIO_FN_RMII_CRS_DV, NULL); | |
446 | gpio_request(GPIO_FN_MDIO, NULL); | |
447 | gpio_request(GPIO_FN_MDC, NULL); | |
448 | gpio_request(GPIO_FN_LNKSTA, NULL); | |
449 | ||
907050a3 | 450 | /* enable USB */ |
be4ebf99 | 451 | ctrl_outw(0x0000, 0xA4D80000); |
907050a3 KM |
452 | gpio_request(GPIO_PTB3, NULL); |
453 | gpio_request(GPIO_PTB4, NULL); | |
454 | gpio_request(GPIO_PTB5, NULL); | |
455 | gpio_direction_input(GPIO_PTB3); | |
456 | gpio_direction_output(GPIO_PTB4, 0); | |
457 | gpio_direction_output(GPIO_PTB5, 0); | |
458 | ctrl_outw(0x0600, 0xa40501d4); | |
459 | ctrl_outw(0x0600, 0xa4050192); | |
460 | ||
fa3ba51b KM |
461 | /* enable LCDC */ |
462 | gpio_request(GPIO_FN_LCDD23, NULL); | |
463 | gpio_request(GPIO_FN_LCDD22, NULL); | |
464 | gpio_request(GPIO_FN_LCDD21, NULL); | |
465 | gpio_request(GPIO_FN_LCDD20, NULL); | |
466 | gpio_request(GPIO_FN_LCDD19, NULL); | |
467 | gpio_request(GPIO_FN_LCDD18, NULL); | |
468 | gpio_request(GPIO_FN_LCDD17, NULL); | |
469 | gpio_request(GPIO_FN_LCDD16, NULL); | |
470 | gpio_request(GPIO_FN_LCDD15, NULL); | |
471 | gpio_request(GPIO_FN_LCDD14, NULL); | |
472 | gpio_request(GPIO_FN_LCDD13, NULL); | |
473 | gpio_request(GPIO_FN_LCDD12, NULL); | |
474 | gpio_request(GPIO_FN_LCDD11, NULL); | |
475 | gpio_request(GPIO_FN_LCDD10, NULL); | |
476 | gpio_request(GPIO_FN_LCDD9, NULL); | |
477 | gpio_request(GPIO_FN_LCDD8, NULL); | |
478 | gpio_request(GPIO_FN_LCDD7, NULL); | |
479 | gpio_request(GPIO_FN_LCDD6, NULL); | |
480 | gpio_request(GPIO_FN_LCDD5, NULL); | |
481 | gpio_request(GPIO_FN_LCDD4, NULL); | |
482 | gpio_request(GPIO_FN_LCDD3, NULL); | |
483 | gpio_request(GPIO_FN_LCDD2, NULL); | |
484 | gpio_request(GPIO_FN_LCDD1, NULL); | |
485 | gpio_request(GPIO_FN_LCDD0, NULL); | |
486 | gpio_request(GPIO_FN_LCDDISP, NULL); | |
487 | gpio_request(GPIO_FN_LCDHSYN, NULL); | |
488 | gpio_request(GPIO_FN_LCDDCK, NULL); | |
489 | gpio_request(GPIO_FN_LCDVSYN, NULL); | |
490 | gpio_request(GPIO_FN_LCDDON, NULL); | |
491 | gpio_request(GPIO_FN_LCDLCLK, NULL); | |
492 | ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA); | |
493 | ||
494 | gpio_request(GPIO_PTE6, NULL); | |
495 | gpio_request(GPIO_PTU1, NULL); | |
496 | gpio_request(GPIO_PTR1, NULL); | |
497 | gpio_request(GPIO_PTA2, NULL); | |
498 | gpio_direction_input(GPIO_PTE6); | |
499 | gpio_direction_output(GPIO_PTU1, 0); | |
500 | gpio_direction_output(GPIO_PTR1, 0); | |
501 | gpio_direction_output(GPIO_PTA2, 0); | |
502 | ||
ea15edb2 KM |
503 | /* I/O buffer drive ability is low */ |
504 | ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA); | |
505 | ||
fa3ba51b KM |
506 | if (gpio_get_value(GPIO_PTE6)) { |
507 | /* DVI */ | |
508 | lcdc_info.clock_source = LCDC_CLK_EXTERNAL; | |
ea15edb2 | 509 | lcdc_info.ch[0].clock_divider = 1, |
fa3ba51b KM |
510 | lcdc_info.ch[0].lcd_cfg.name = "DVI"; |
511 | lcdc_info.ch[0].lcd_cfg.xres = 1280; | |
512 | lcdc_info.ch[0].lcd_cfg.yres = 720; | |
513 | lcdc_info.ch[0].lcd_cfg.left_margin = 220; | |
514 | lcdc_info.ch[0].lcd_cfg.right_margin = 110; | |
515 | lcdc_info.ch[0].lcd_cfg.hsync_len = 40; | |
516 | lcdc_info.ch[0].lcd_cfg.upper_margin = 20; | |
517 | lcdc_info.ch[0].lcd_cfg.lower_margin = 5; | |
518 | lcdc_info.ch[0].lcd_cfg.vsync_len = 5; | |
519 | ||
520 | gpio_set_value(GPIO_PTA2, 1); | |
521 | gpio_set_value(GPIO_PTU1, 1); | |
522 | } else { | |
523 | /* Panel */ | |
ea15edb2 KM |
524 | |
525 | lcdc_info.clock_source = LCDC_CLK_PERIPHERAL; | |
526 | lcdc_info.ch[0].clock_divider = 2, | |
527 | lcdc_info.ch[0].lcd_cfg.name = "Panel"; | |
528 | lcdc_info.ch[0].lcd_cfg.xres = 800; | |
529 | lcdc_info.ch[0].lcd_cfg.yres = 480; | |
530 | lcdc_info.ch[0].lcd_cfg.left_margin = 220; | |
531 | lcdc_info.ch[0].lcd_cfg.right_margin = 110; | |
532 | lcdc_info.ch[0].lcd_cfg.hsync_len = 70; | |
533 | lcdc_info.ch[0].lcd_cfg.upper_margin = 20; | |
534 | lcdc_info.ch[0].lcd_cfg.lower_margin = 5; | |
535 | lcdc_info.ch[0].lcd_cfg.vsync_len = 5; | |
536 | ||
537 | gpio_set_value(GPIO_PTR1, 1); | |
538 | ||
539 | /* FIXME | |
540 | * | |
541 | * LCDDON control is needed for Panel, | |
542 | * but current sh_mobile_lcdc driver doesn't control it. | |
543 | * It is temporary correspondence | |
544 | */ | |
545 | gpio_request(GPIO_PTF4, NULL); | |
546 | gpio_direction_output(GPIO_PTF4, 1); | |
fa3ba51b KM |
547 | } |
548 | ||
2153ad32 KM |
549 | /* enable CEU0 */ |
550 | gpio_request(GPIO_FN_VIO0_D15, NULL); | |
551 | gpio_request(GPIO_FN_VIO0_D14, NULL); | |
552 | gpio_request(GPIO_FN_VIO0_D13, NULL); | |
553 | gpio_request(GPIO_FN_VIO0_D12, NULL); | |
554 | gpio_request(GPIO_FN_VIO0_D11, NULL); | |
555 | gpio_request(GPIO_FN_VIO0_D10, NULL); | |
556 | gpio_request(GPIO_FN_VIO0_D9, NULL); | |
557 | gpio_request(GPIO_FN_VIO0_D8, NULL); | |
558 | gpio_request(GPIO_FN_VIO0_D7, NULL); | |
559 | gpio_request(GPIO_FN_VIO0_D6, NULL); | |
560 | gpio_request(GPIO_FN_VIO0_D5, NULL); | |
561 | gpio_request(GPIO_FN_VIO0_D4, NULL); | |
562 | gpio_request(GPIO_FN_VIO0_D3, NULL); | |
563 | gpio_request(GPIO_FN_VIO0_D2, NULL); | |
564 | gpio_request(GPIO_FN_VIO0_D1, NULL); | |
565 | gpio_request(GPIO_FN_VIO0_D0, NULL); | |
566 | gpio_request(GPIO_FN_VIO0_VD, NULL); | |
567 | gpio_request(GPIO_FN_VIO0_CLK, NULL); | |
568 | gpio_request(GPIO_FN_VIO0_FLD, NULL); | |
569 | gpio_request(GPIO_FN_VIO0_HD, NULL); | |
570 | platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20); | |
571 | ||
572 | /* enable CEU1 */ | |
573 | gpio_request(GPIO_FN_VIO1_D7, NULL); | |
574 | gpio_request(GPIO_FN_VIO1_D6, NULL); | |
575 | gpio_request(GPIO_FN_VIO1_D5, NULL); | |
576 | gpio_request(GPIO_FN_VIO1_D4, NULL); | |
577 | gpio_request(GPIO_FN_VIO1_D3, NULL); | |
578 | gpio_request(GPIO_FN_VIO1_D2, NULL); | |
579 | gpio_request(GPIO_FN_VIO1_D1, NULL); | |
580 | gpio_request(GPIO_FN_VIO1_D0, NULL); | |
581 | gpio_request(GPIO_FN_VIO1_FLD, NULL); | |
582 | gpio_request(GPIO_FN_VIO1_HD, NULL); | |
583 | gpio_request(GPIO_FN_VIO1_VD, NULL); | |
584 | gpio_request(GPIO_FN_VIO1_CLK, NULL); | |
585 | platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20); | |
586 | ||
125ecce6 KM |
587 | /* enable I2C device */ |
588 | i2c_register_board_info(1, i2c1_devices, | |
589 | ARRAY_SIZE(i2c1_devices)); | |
590 | ||
4138b740 KM |
591 | return platform_add_devices(ecovec_devices, |
592 | ARRAY_SIZE(ecovec_devices)); | |
593 | } | |
4907d57f KM |
594 | arch_initcall(arch_setup); |
595 | ||
596 | static int __init devices_setup(void) | |
597 | { | |
598 | sh_eth_init(); | |
599 | return 0; | |
600 | } | |
601 | device_initcall(devices_setup); | |
602 | ||
4138b740 KM |
603 | |
604 | static struct sh_machine_vector mv_ecovec __initmv = { | |
605 | .mv_name = "R0P7724 (EcoVec)", | |
606 | }; |