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1/*
2 * Copyright (C) 2009 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/device.h>
13#include <linux/platform_device.h>
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14#include <linux/mmc/host.h>
15#include <linux/mmc/sh_mmcif.h>
960b9e7e 16#include <linux/mmc/sh_mobile_sdhi.h>
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17#include <linux/mtd/physmap.h>
18#include <linux/gpio.h>
19#include <linux/interrupt.h>
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20#include <linux/io.h>
21#include <linux/delay.h>
907050a3 22#include <linux/usb/r8a66597.h>
4907d57f 23#include <linux/i2c.h>
8810e055 24#include <linux/i2c/tsc2007.h>
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25#include <linux/spi/spi.h>
26#include <linux/spi/sh_msiof.h>
27#include <linux/spi/mmc_spi.h>
e9103e74 28#include <linux/input.h>
fc1d003d 29#include <linux/input/sh_keysc.h>
fa3ba51b 30#include <video/sh_mobile_lcdc.h>
1980fdc4 31#include <sound/sh_fsi.h>
2153ad32 32#include <media/sh_mobile_ceu.h>
207efd07 33#include <media/tw9910.h>
9aa25d64 34#include <media/mt9t112.h>
4138b740 35#include <asm/heartbeat.h>
35a35408 36#include <asm/sh_eth.h>
a991801a 37#include <asm/clock.h>
eb0cd9e8 38#include <asm/suspend.h>
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39#include <cpu/sh7724.h>
40
41/*
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42 * Address Interface BusWidth
43 *-----------------------------------------
44 * 0x0000_0000 uboot 16bit
45 * 0x0004_0000 Linux romImage 16bit
46 * 0x0014_0000 MTD for Linux 16bit
47 * 0x0400_0000 Internal I/O 16/32bit
48 * 0x0800_0000 DRAM 32bit
49 * 0x1800_0000 MFI 16bit
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50 */
51
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52/* SWITCH
53 *------------------------------
54 * DS2[1] = FlashROM write protect ON : write protect
55 * OFF : No write protect
56 * DS2[2] = RMII / TS, SCIF ON : RMII
57 * OFF : TS, SCIF3
58 * DS2[3] = Camera / Video ON : Camera
59 * OFF : NTSC/PAL (IN)
60 * DS2[5] = NTSC_OUT Clock ON : On board OSC
61 * OFF : SH7724 DV_CLK
62 * DS2[6-7] = MMC / SD ON-OFF : SD
63 * OFF-ON : MMC
64 */
65
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66/* Heartbeat */
67static unsigned char led_pos[] = { 0, 1, 2, 3 };
a09d2831 68
4138b740 69static struct heartbeat_data heartbeat_data = {
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70 .nr_bits = 4,
71 .bit_pos = led_pos,
72};
73
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74static struct resource heartbeat_resource = {
75 .start = 0xA405012C, /* PTG */
76 .end = 0xA405012E - 1,
77 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
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78};
79
80static struct platform_device heartbeat_device = {
81 .name = "heartbeat",
82 .id = -1,
83 .dev = {
84 .platform_data = &heartbeat_data,
85 },
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86 .num_resources = 1,
87 .resource = &heartbeat_resource,
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88};
89
90/* MTD */
91static struct mtd_partition nor_flash_partitions[] = {
92 {
b7056bc1 93 .name = "boot loader",
4138b740 94 .offset = 0,
b7056bc1 95 .size = (5 * 1024 * 1024),
d5ce010c 96 .mask_flags = MTD_WRITEABLE, /* force read-only */
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97 }, {
98 .name = "free-area",
99 .offset = MTDPART_OFS_APPEND,
100 .size = MTDPART_SIZ_FULL,
101 },
102};
103
104static struct physmap_flash_data nor_flash_data = {
105 .width = 2,
106 .parts = nor_flash_partitions,
107 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
108};
109
110static struct resource nor_flash_resources[] = {
111 [0] = {
112 .name = "NOR Flash",
113 .start = 0x00000000,
114 .end = 0x03ffffff,
115 .flags = IORESOURCE_MEM,
116 }
117};
118
119static struct platform_device nor_flash_device = {
120 .name = "physmap-flash",
121 .resource = nor_flash_resources,
122 .num_resources = ARRAY_SIZE(nor_flash_resources),
123 .dev = {
124 .platform_data = &nor_flash_data,
125 },
126};
127
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128/* SH Eth */
129#define SH_ETH_ADDR (0xA4600000)
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130static struct resource sh_eth_resources[] = {
131 [0] = {
132 .start = SH_ETH_ADDR,
133 .end = SH_ETH_ADDR + 0x1FC,
134 .flags = IORESOURCE_MEM,
135 },
136 [1] = {
137 .start = 91,
138 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
139 },
140};
141
3ce09334 142static struct sh_eth_plat_data sh_eth_plat = {
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143 .phy = 0x1f, /* SMSC LAN8700 */
144 .edmac_endian = EDMAC_LITTLE_ENDIAN,
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145 .register_type = SH_ETH_REG_FAST_SH4,
146 .phy_interface = PHY_INTERFACE_MODE_MII,
acf3cc28 147 .ether_link_active_low = 1
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148};
149
150static struct platform_device sh_eth_device = {
151 .name = "sh-eth",
152 .id = 0,
153 .dev = {
154 .platform_data = &sh_eth_plat,
155 },
156 .num_resources = ARRAY_SIZE(sh_eth_resources),
157 .resource = sh_eth_resources,
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158 .archdata = {
159 .hwblk_id = HWBLK_ETHER,
160 },
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161};
162
907050a3 163/* USB0 host */
3ce09334 164static void usb0_port_power(int port, int power)
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165{
166 gpio_set_value(GPIO_PTB4, power);
167}
168
169static struct r8a66597_platdata usb0_host_data = {
170 .on_chip = 1,
171 .port_power = usb0_port_power,
172};
173
174static struct resource usb0_host_resources[] = {
175 [0] = {
176 .start = 0xa4d80000,
177 .end = 0xa4d80124 - 1,
178 .flags = IORESOURCE_MEM,
179 },
180 [1] = {
181 .start = 65,
182 .end = 65,
183 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
184 },
185};
186
187static struct platform_device usb0_host_device = {
188 .name = "r8a66597_hcd",
189 .id = 0,
190 .dev = {
191 .dma_mask = NULL, /* not use dma */
192 .coherent_dma_mask = 0xffffffff,
193 .platform_data = &usb0_host_data,
194 },
195 .num_resources = ARRAY_SIZE(usb0_host_resources),
196 .resource = usb0_host_resources,
197};
198
3714a9a0 199/* USB1 host/function */
3ce09334 200static void usb1_port_power(int port, int power)
907050a3 201{
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202 gpio_set_value(GPIO_PTB5, power);
203}
204
3714a9a0 205static struct r8a66597_platdata usb1_common_data = {
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206 .on_chip = 1,
207 .port_power = usb1_port_power,
208};
209
3714a9a0 210static struct resource usb1_common_resources[] = {
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211 [0] = {
212 .start = 0xa4d90000,
213 .end = 0xa4d90124 - 1,
214 .flags = IORESOURCE_MEM,
215 },
216 [1] = {
217 .start = 66,
218 .end = 66,
219 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
220 },
221};
222
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223static struct platform_device usb1_common_device = {
224 /* .name will be added in arch_setup */
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225 .id = 1,
226 .dev = {
227 .dma_mask = NULL, /* not use dma */
228 .coherent_dma_mask = 0xffffffff,
3714a9a0 229 .platform_data = &usb1_common_data,
907050a3 230 },
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231 .num_resources = ARRAY_SIZE(usb1_common_resources),
232 .resource = usb1_common_resources,
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233};
234
fa3ba51b 235/* LCDC */
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236const static struct fb_videomode ecovec_lcd_modes[] = {
237 {
238 .name = "Panel",
239 .xres = 800,
240 .yres = 480,
241 .left_margin = 220,
242 .right_margin = 110,
243 .hsync_len = 70,
244 .upper_margin = 20,
245 .lower_margin = 5,
246 .vsync_len = 5,
247 .sync = 0, /* hsync and vsync are active low */
248 },
249};
250
251const static struct fb_videomode ecovec_dvi_modes[] = {
252 {
253 .name = "DVI",
254 .xres = 1280,
255 .yres = 720,
256 .left_margin = 220,
257 .right_margin = 110,
258 .hsync_len = 40,
259 .upper_margin = 20,
260 .lower_margin = 5,
261 .vsync_len = 5,
262 .sync = 0, /* hsync and vsync are active low */
263 },
264};
265
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266static int ecovec24_set_brightness(void *board_data, int brightness)
267{
268 gpio_set_value(GPIO_PTR1, brightness);
269
270 return 0;
271}
272
273static int ecovec24_get_brightness(void *board_data)
274{
275 return gpio_get_value(GPIO_PTR1);
276}
277
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278static struct sh_mobile_lcdc_info lcdc_info = {
279 .ch[0] = {
280 .interface_type = RGB18,
281 .chan = LCDC_CHAN_MAINLCD,
282 .bpp = 16,
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283 .lcd_size_cfg = { /* 7.0 inch */
284 .width = 152,
285 .height = 91,
286 },
287 .board_cfg = {
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288 .set_brightness = ecovec24_set_brightness,
289 .get_brightness = ecovec24_get_brightness,
290 },
291 .bl_info = {
292 .name = "sh_mobile_lcdc_bl",
293 .max_brightness = 1,
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294 },
295 }
296};
297
298static struct resource lcdc_resources[] = {
299 [0] = {
300 .name = "LCDC",
301 .start = 0xfe940000,
a6f15ade 302 .end = 0xfe942fff,
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303 .flags = IORESOURCE_MEM,
304 },
305 [1] = {
306 .start = 106,
307 .flags = IORESOURCE_IRQ,
308 },
309};
310
311static struct platform_device lcdc_device = {
312 .name = "sh_mobile_lcdc_fb",
313 .num_resources = ARRAY_SIZE(lcdc_resources),
314 .resource = lcdc_resources,
315 .dev = {
316 .platform_data = &lcdc_info,
317 },
318 .archdata = {
319 .hwblk_id = HWBLK_LCDC,
320 },
321};
322
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323/* CEU0 */
324static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
325 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
326};
327
328static struct resource ceu0_resources[] = {
329 [0] = {
330 .name = "CEU0",
331 .start = 0xfe910000,
332 .end = 0xfe91009f,
333 .flags = IORESOURCE_MEM,
334 },
335 [1] = {
336 .start = 52,
337 .flags = IORESOURCE_IRQ,
338 },
339 [2] = {
340 /* place holder for contiguous memory */
341 },
342};
343
344static struct platform_device ceu0_device = {
345 .name = "sh_mobile_ceu",
346 .id = 0, /* "ceu0" clock */
347 .num_resources = ARRAY_SIZE(ceu0_resources),
348 .resource = ceu0_resources,
349 .dev = {
350 .platform_data = &sh_mobile_ceu0_info,
351 },
352 .archdata = {
353 .hwblk_id = HWBLK_CEU0,
354 },
355};
356
357/* CEU1 */
358static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
359 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
360};
361
362static struct resource ceu1_resources[] = {
363 [0] = {
364 .name = "CEU1",
365 .start = 0xfe914000,
366 .end = 0xfe91409f,
367 .flags = IORESOURCE_MEM,
368 },
369 [1] = {
370 .start = 63,
371 .flags = IORESOURCE_IRQ,
372 },
373 [2] = {
374 /* place holder for contiguous memory */
375 },
376};
377
378static struct platform_device ceu1_device = {
379 .name = "sh_mobile_ceu",
380 .id = 1, /* "ceu1" clock */
381 .num_resources = ARRAY_SIZE(ceu1_resources),
382 .resource = ceu1_resources,
383 .dev = {
384 .platform_data = &sh_mobile_ceu1_info,
385 },
386 .archdata = {
387 .hwblk_id = HWBLK_CEU1,
388 },
389};
390
125ecce6 391/* I2C device */
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392static struct i2c_board_info i2c0_devices[] = {
393 {
394 I2C_BOARD_INFO("da7210", 0x1a),
395 },
396};
397
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398static struct i2c_board_info i2c1_devices[] = {
399 {
400 I2C_BOARD_INFO("r2025sd", 0x32),
401 },
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402 {
403 I2C_BOARD_INFO("lis3lv02d", 0x1c),
404 .irq = 33,
405 }
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406};
407
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408/* KEYSC */
409static struct sh_keysc_info keysc_info = {
410 .mode = SH_KEYSC_MODE_1,
411 .scan_timing = 3,
412 .delay = 50,
413 .kycr2_delay = 100,
414 .keycodes = { KEY_1, 0, 0, 0, 0,
415 KEY_2, 0, 0, 0, 0,
416 KEY_3, 0, 0, 0, 0,
417 KEY_4, 0, 0, 0, 0,
418 KEY_5, 0, 0, 0, 0,
419 KEY_6, 0, 0, 0, 0, },
420};
421
422static struct resource keysc_resources[] = {
423 [0] = {
424 .name = "KEYSC",
425 .start = 0x044b0000,
426 .end = 0x044b000f,
427 .flags = IORESOURCE_MEM,
428 },
429 [1] = {
430 .start = 79,
431 .flags = IORESOURCE_IRQ,
432 },
433};
434
435static struct platform_device keysc_device = {
436 .name = "sh_keysc",
437 .id = 0, /* keysc0 clock */
438 .num_resources = ARRAY_SIZE(keysc_resources),
439 .resource = keysc_resources,
440 .dev = {
441 .platform_data = &keysc_info,
442 },
443 .archdata = {
444 .hwblk_id = HWBLK_KEYSC,
445 },
446};
447
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448/* TouchScreen */
449#define IRQ0 32
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450static int ts_get_pendown_state(void)
451{
452 int val = 0;
453 gpio_free(GPIO_FN_INTC_IRQ0);
454 gpio_request(GPIO_PTZ0, NULL);
455 gpio_direction_input(GPIO_PTZ0);
456
457 val = gpio_get_value(GPIO_PTZ0);
458
459 gpio_free(GPIO_PTZ0);
460 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
461
462 return val ? 0 : 1;
463}
464
465static int ts_init(void)
466{
467 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
468 return 0;
469}
470
3ce09334 471static struct tsc2007_platform_data tsc2007_info = {
8810e055 472 .model = 2007,
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473 .x_plate_ohms = 180,
474 .get_pendown_state = ts_get_pendown_state,
475 .init_platform_hw = ts_init,
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476};
477
478static struct i2c_board_info ts_i2c_clients = {
479 I2C_BOARD_INFO("tsc2007", 0x48),
480 .type = "tsc2007",
481 .platform_data = &tsc2007_info,
482 .irq = IRQ0,
483};
484
5744c881 485#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1238c684 486/* SDHI0 */
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487static void sdhi0_set_pwr(struct platform_device *pdev, int state)
488{
489 gpio_set_value(GPIO_PTB6, state);
490}
491
492static struct sh_mobile_sdhi_info sdhi0_info = {
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493 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
494 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
495 .set_pwr = sdhi0_set_pwr,
e8a50ae3 496 .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
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497};
498
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499static struct resource sdhi0_resources[] = {
500 [0] = {
501 .name = "SDHI0",
502 .start = 0x04ce0000,
d80e9221 503 .end = 0x04ce00ff,
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504 .flags = IORESOURCE_MEM,
505 },
506 [1] = {
3844eadc 507 .start = 100,
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508 .flags = IORESOURCE_IRQ,
509 },
510};
511
512static struct platform_device sdhi0_device = {
513 .name = "sh_mobile_sdhi",
514 .num_resources = ARRAY_SIZE(sdhi0_resources),
515 .resource = sdhi0_resources,
516 .id = 0,
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517 .dev = {
518 .platform_data = &sdhi0_info,
519 },
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520 .archdata = {
521 .hwblk_id = HWBLK_SDHI0,
522 },
523};
524
5744c881 525#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1238c684 526/* SDHI1 */
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527static void sdhi1_set_pwr(struct platform_device *pdev, int state)
528{
529 gpio_set_value(GPIO_PTB7, state);
530}
531
532static struct sh_mobile_sdhi_info sdhi1_info = {
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533 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
534 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
e8a50ae3 535 .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
815f1995 536 .set_pwr = sdhi1_set_pwr,
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537};
538
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539static struct resource sdhi1_resources[] = {
540 [0] = {
541 .name = "SDHI1",
542 .start = 0x04cf0000,
d80e9221 543 .end = 0x04cf00ff,
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544 .flags = IORESOURCE_MEM,
545 },
546 [1] = {
3844eadc 547 .start = 23,
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548 .flags = IORESOURCE_IRQ,
549 },
550};
551
552static struct platform_device sdhi1_device = {
553 .name = "sh_mobile_sdhi",
554 .num_resources = ARRAY_SIZE(sdhi1_resources),
555 .resource = sdhi1_resources,
556 .id = 1,
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557 .dev = {
558 .platform_data = &sdhi1_info,
559 },
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560 .archdata = {
561 .hwblk_id = HWBLK_SDHI1,
562 },
563};
1238c684 564#endif /* CONFIG_MMC_SH_MMCIF */
96987d96 565
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566#else
567
9503e891 568/* MMC SPI */
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569static int mmc_spi_get_ro(struct device *dev)
570{
571 return gpio_get_value(GPIO_PTY6);
572}
573
574static int mmc_spi_get_cd(struct device *dev)
575{
576 return !gpio_get_value(GPIO_PTY7);
577}
578
579static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
580{
581 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
582}
583
584static struct mmc_spi_platform_data mmc_spi_info = {
585 .get_ro = mmc_spi_get_ro,
586 .get_cd = mmc_spi_get_cd,
587 .caps = MMC_CAP_NEEDS_POLL,
588 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
589 .setpower = mmc_spi_setpower,
590};
591
592static struct spi_board_info spi_bus[] = {
593 {
594 .modalias = "mmc_spi",
595 .platform_data = &mmc_spi_info,
596 .max_speed_hz = 5000000,
597 .mode = SPI_MODE_0,
598 .controller_data = (void *) GPIO_PTM4,
599 },
600};
601
9503e891 602/* MSIOF0 */
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603static struct sh_msiof_spi_info msiof0_data = {
604 .num_chipselect = 1,
605};
606
607static struct resource msiof0_resources[] = {
608 [0] = {
609 .name = "MSIOF0",
610 .start = 0xa4c40000,
611 .end = 0xa4c40063,
612 .flags = IORESOURCE_MEM,
613 },
614 [1] = {
615 .start = 84,
616 .flags = IORESOURCE_IRQ,
617 },
618};
619
620static struct platform_device msiof0_device = {
621 .name = "spi_sh_msiof",
622 .id = 0, /* MSIOF0 */
623 .dev = {
624 .platform_data = &msiof0_data,
625 },
626 .num_resources = ARRAY_SIZE(msiof0_resources),
627 .resource = msiof0_resources,
628 .archdata = {
629 .hwblk_id = HWBLK_MSIOF0,
630 },
631};
632
633#endif
634
9aa25d64 635/* I2C Video/Camera */
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636static struct i2c_board_info i2c_camera[] = {
637 {
638 I2C_BOARD_INFO("tw9910", 0x45),
639 },
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640 {
641 /* 1st camera */
642 I2C_BOARD_INFO("mt9t112", 0x3c),
643 },
644 {
645 /* 2nd camera */
646 I2C_BOARD_INFO("mt9t112", 0x3c),
647 },
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648};
649
650/* tw9910 */
651static int tw9910_power(struct device *dev, int mode)
652{
653 int val = mode ? 0 : 1;
654
655 gpio_set_value(GPIO_PTU2, val);
656 if (mode)
657 mdelay(100);
658
659 return 0;
660}
661
662static struct tw9910_video_info tw9910_info = {
663 .buswidth = SOCAM_DATAWIDTH_8,
664 .mpout = TW9910_MPO_FIELD,
665};
666
667static struct soc_camera_link tw9910_link = {
668 .i2c_adapter_id = 0,
669 .bus_id = 1,
670 .power = tw9910_power,
671 .board_info = &i2c_camera[0],
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672 .priv = &tw9910_info,
673};
674
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675/* mt9t112 */
676static int mt9t112_power1(struct device *dev, int mode)
677{
678 gpio_set_value(GPIO_PTA3, mode);
679 if (mode)
680 mdelay(100);
681
682 return 0;
683}
684
685static struct mt9t112_camera_info mt9t112_info1 = {
686 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
687 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
688};
689
690static struct soc_camera_link mt9t112_link1 = {
691 .i2c_adapter_id = 0,
692 .power = mt9t112_power1,
693 .bus_id = 0,
694 .board_info = &i2c_camera[1],
9aa25d64
KM
695 .priv = &mt9t112_info1,
696};
697
698static int mt9t112_power2(struct device *dev, int mode)
699{
700 gpio_set_value(GPIO_PTA4, mode);
701 if (mode)
702 mdelay(100);
703
704 return 0;
705}
706
707static struct mt9t112_camera_info mt9t112_info2 = {
708 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
709 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
710};
711
712static struct soc_camera_link mt9t112_link2 = {
713 .i2c_adapter_id = 1,
714 .power = mt9t112_power2,
715 .bus_id = 1,
716 .board_info = &i2c_camera[2],
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KM
717 .priv = &mt9t112_info2,
718};
207efd07
KM
719
720static struct platform_device camera_devices[] = {
721 {
722 .name = "soc-camera-pdrv",
723 .id = 0,
724 .dev = {
725 .platform_data = &tw9910_link,
726 },
727 },
9aa25d64
KM
728 {
729 .name = "soc-camera-pdrv",
730 .id = 1,
731 .dev = {
732 .platform_data = &mt9t112_link1,
733 },
734 },
735 {
736 .name = "soc-camera-pdrv",
737 .id = 2,
738 .dev = {
739 .platform_data = &mt9t112_link2,
740 },
741 },
207efd07
KM
742};
743
1980fdc4 744/* FSI */
3ce09334 745static struct sh_fsi_platform_info fsi_info = {
f17c13ca 746 .portb_flags = SH_FSI_BRS_INV,
1980fdc4
KM
747};
748
749static struct resource fsi_resources[] = {
750 [0] = {
751 .name = "FSI",
752 .start = 0xFE3C0000,
753 .end = 0xFE3C021d,
754 .flags = IORESOURCE_MEM,
755 },
756 [1] = {
757 .start = 108,
758 .flags = IORESOURCE_IRQ,
759 },
760};
761
762static struct platform_device fsi_device = {
763 .name = "sh_fsi",
764 .id = 0,
765 .num_resources = ARRAY_SIZE(fsi_resources),
766 .resource = fsi_resources,
767 .dev = {
768 .platform_data = &fsi_info,
769 },
770 .archdata = {
771 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
772 },
773};
774
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KM
775/* IrDA */
776static struct resource irda_resources[] = {
777 [0] = {
778 .name = "IrDA",
779 .start = 0xA45D0000,
780 .end = 0xA45D0049,
781 .flags = IORESOURCE_MEM,
782 },
783 [1] = {
784 .start = 20,
785 .flags = IORESOURCE_IRQ,
786 },
787};
788
789static struct platform_device irda_device = {
790 .name = "sh_sir",
791 .num_resources = ARRAY_SIZE(irda_resources),
792 .resource = irda_resources,
793};
794
aee5ab0b
GL
795#include <media/ak881x.h>
796#include <media/sh_vou.h>
797
3ce09334 798static struct ak881x_pdata ak881x_pdata = {
aee5ab0b
GL
799 .flags = AK881X_IF_MODE_SLAVE,
800};
801
802static struct i2c_board_info ak8813 = {
803 I2C_BOARD_INFO("ak8813", 0x20),
804 .platform_data = &ak881x_pdata,
805};
806
3ce09334 807static struct sh_vou_pdata sh_vou_pdata = {
aee5ab0b
GL
808 .bus_fmt = SH_VOU_BUS_8BIT,
809 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
810 .board_info = &ak8813,
811 .i2c_adap = 0,
aee5ab0b
GL
812};
813
814static struct resource sh_vou_resources[] = {
815 [0] = {
816 .start = 0xfe960000,
817 .end = 0xfe962043,
818 .flags = IORESOURCE_MEM,
819 },
820 [1] = {
821 .start = 55,
822 .flags = IORESOURCE_IRQ,
823 },
824};
825
826static struct platform_device vou_device = {
827 .name = "sh-vou",
828 .id = -1,
829 .num_resources = ARRAY_SIZE(sh_vou_resources),
830 .resource = sh_vou_resources,
831 .dev = {
832 .platform_data = &sh_vou_pdata,
833 },
834 .archdata = {
835 .hwblk_id = HWBLK_VOU,
836 },
837};
838
5744c881 839#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
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YG
840/* SH_MMCIF */
841static void mmcif_set_pwr(struct platform_device *pdev, int state)
842{
843 gpio_set_value(GPIO_PTB7, state);
844}
845
846static void mmcif_down_pwr(struct platform_device *pdev)
847{
848 gpio_set_value(GPIO_PTB7, 0);
849}
850
851static struct resource sh_mmcif_resources[] = {
852 [0] = {
853 .name = "SH_MMCIF",
854 .start = 0xA4CA0000,
855 .end = 0xA4CA00FF,
856 .flags = IORESOURCE_MEM,
857 },
858 [1] = {
859 /* MMC2I */
860 .start = 29,
861 .flags = IORESOURCE_IRQ,
862 },
863 [2] = {
864 /* MMC3I */
865 .start = 30,
866 .flags = IORESOURCE_IRQ,
867 },
868};
869
3ce09334 870static struct sh_mmcif_plat_data sh_mmcif_plat = {
1238c684
YG
871 .set_pwr = mmcif_set_pwr,
872 .down_pwr = mmcif_down_pwr,
873 .sup_pclk = 0, /* SH7724: Max Pclk/2 */
874 .caps = MMC_CAP_4_BIT_DATA |
875 MMC_CAP_8_BIT_DATA |
876 MMC_CAP_NEEDS_POLL,
877 .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
878};
879
880static struct platform_device sh_mmcif_device = {
881 .name = "sh_mmcif",
882 .id = 0,
883 .dev = {
884 .platform_data = &sh_mmcif_plat,
885 },
886 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
887 .resource = sh_mmcif_resources,
52b96c25
GL
888 .archdata = {
889 .hwblk_id = HWBLK_MMC,
890 },
1238c684
YG
891};
892#endif
893
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KM
894static struct platform_device *ecovec_devices[] __initdata = {
895 &heartbeat_device,
896 &nor_flash_device,
35a35408 897 &sh_eth_device,
907050a3 898 &usb0_host_device,
3714a9a0 899 &usb1_common_device,
fa3ba51b 900 &lcdc_device,
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KM
901 &ceu0_device,
902 &ceu1_device,
e9103e74 903 &keysc_device,
5744c881 904#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
96987d96 905 &sdhi0_device,
5744c881 906#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
96987d96 907 &sdhi1_device,
1238c684 908#endif
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MD
909#else
910 &msiof0_device,
911#endif
207efd07 912 &camera_devices[0],
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KM
913 &camera_devices[1],
914 &camera_devices[2],
1980fdc4 915 &fsi_device,
26365716 916 &irda_device,
aee5ab0b 917 &vou_device,
5744c881 918#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
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YG
919 &sh_mmcif_device,
920#endif
4138b740
KM
921};
922
6b3b5575 923#ifdef CONFIG_I2C
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KM
924#define EEPROM_ADDR 0x50
925static u8 mac_read(struct i2c_adapter *a, u8 command)
926{
927 struct i2c_msg msg[2];
928 u8 buf;
929 int ret;
930
931 msg[0].addr = EEPROM_ADDR;
932 msg[0].flags = 0;
933 msg[0].len = 1;
934 msg[0].buf = &command;
935
936 msg[1].addr = EEPROM_ADDR;
937 msg[1].flags = I2C_M_RD;
938 msg[1].len = 1;
939 msg[1].buf = &buf;
940
941 ret = i2c_transfer(a, msg, 2);
942 if (ret < 0) {
943 printk(KERN_ERR "error %d\n", ret);
944 buf = 0xff;
945 }
946
947 return buf;
948}
949
376abbb4 950static void __init sh_eth_init(struct sh_eth_plat_data *pd)
4907d57f
KM
951{
952 struct i2c_adapter *a = i2c_get_adapter(1);
4907d57f
KM
953 int i;
954
955 if (!a) {
956 pr_err("can not get I2C 1\n");
957 return;
958 }
959
25985edc 960 /* read MAC address from EEPROM */
376abbb4
MD
961 for (i = 0; i < sizeof(pd->mac_addr); i++) {
962 pd->mac_addr[i] = mac_read(a, 0x10 + i);
4907d57f
KM
963 msleep(10);
964 }
b230eb32
KM
965
966 i2c_put_adapter(a);
4907d57f 967}
6b3b5575
MD
968#else
969static void __init sh_eth_init(struct sh_eth_plat_data *pd)
970{
971 pr_err("unable to read sh_eth MAC address\n");
972}
973#endif
4907d57f 974
fa3ba51b 975#define PORT_HIZA 0xA4050158
ea15edb2 976#define IODRIVEA 0xA405018A
eb0cd9e8
MD
977
978extern char ecovec24_sdram_enter_start;
979extern char ecovec24_sdram_enter_end;
980extern char ecovec24_sdram_leave_start;
981extern char ecovec24_sdram_leave_end;
982
4907d57f 983static int __init arch_setup(void)
4138b740 984{
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KM
985 struct clk *clk;
986
eb0cd9e8 987 /* register board specific self-refresh code */
2839bd61
MD
988 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
989 SUSP_SH_RSTANDBY,
eb0cd9e8
MD
990 &ecovec24_sdram_enter_start,
991 &ecovec24_sdram_enter_end,
992 &ecovec24_sdram_leave_start,
993 &ecovec24_sdram_leave_end);
994
f78bab30
MD
995 /* enable STATUS0, STATUS2 and PDSTATUS */
996 gpio_request(GPIO_FN_STATUS0, NULL);
997 gpio_request(GPIO_FN_STATUS2, NULL);
998 gpio_request(GPIO_FN_PDSTATUS, NULL);
999
4138b740
KM
1000 /* enable SCIFA0 */
1001 gpio_request(GPIO_FN_SCIF0_TXD, NULL);
1002 gpio_request(GPIO_FN_SCIF0_RXD, NULL);
4138b740
KM
1003
1004 /* enable debug LED */
1005 gpio_request(GPIO_PTG0, NULL);
1006 gpio_request(GPIO_PTG1, NULL);
1007 gpio_request(GPIO_PTG2, NULL);
1008 gpio_request(GPIO_PTG3, NULL);
b7056bc1
KM
1009 gpio_direction_output(GPIO_PTG0, 0);
1010 gpio_direction_output(GPIO_PTG1, 0);
1011 gpio_direction_output(GPIO_PTG2, 0);
1012 gpio_direction_output(GPIO_PTG3, 0);
9d56dd3b 1013 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
4138b740 1014
35a35408
KM
1015 /* enable SH-Eth */
1016 gpio_request(GPIO_PTA1, NULL);
1017 gpio_direction_output(GPIO_PTA1, 1);
1018 mdelay(20);
1019
1020 gpio_request(GPIO_FN_RMII_RXD0, NULL);
1021 gpio_request(GPIO_FN_RMII_RXD1, NULL);
1022 gpio_request(GPIO_FN_RMII_TXD0, NULL);
1023 gpio_request(GPIO_FN_RMII_TXD1, NULL);
1024 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
1025 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
1026 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
1027 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
1028 gpio_request(GPIO_FN_MDIO, NULL);
1029 gpio_request(GPIO_FN_MDC, NULL);
1030 gpio_request(GPIO_FN_LNKSTA, NULL);
1031
907050a3 1032 /* enable USB */
9d56dd3b
PM
1033 __raw_writew(0x0000, 0xA4D80000);
1034 __raw_writew(0x0000, 0xA4D90000);
907050a3
KM
1035 gpio_request(GPIO_PTB3, NULL);
1036 gpio_request(GPIO_PTB4, NULL);
1037 gpio_request(GPIO_PTB5, NULL);
1038 gpio_direction_input(GPIO_PTB3);
1039 gpio_direction_output(GPIO_PTB4, 0);
1040 gpio_direction_output(GPIO_PTB5, 0);
9d56dd3b
PM
1041 __raw_writew(0x0600, 0xa40501d4);
1042 __raw_writew(0x0600, 0xa4050192);
907050a3 1043
3714a9a0
KM
1044 if (gpio_get_value(GPIO_PTB3)) {
1045 printk(KERN_INFO "USB1 function is selected\n");
1046 usb1_common_device.name = "r8a66597_udc";
1047 } else {
1048 printk(KERN_INFO "USB1 host is selected\n");
1049 usb1_common_device.name = "r8a66597_hcd";
1050 }
1051
fa3ba51b
KM
1052 /* enable LCDC */
1053 gpio_request(GPIO_FN_LCDD23, NULL);
1054 gpio_request(GPIO_FN_LCDD22, NULL);
1055 gpio_request(GPIO_FN_LCDD21, NULL);
1056 gpio_request(GPIO_FN_LCDD20, NULL);
1057 gpio_request(GPIO_FN_LCDD19, NULL);
1058 gpio_request(GPIO_FN_LCDD18, NULL);
1059 gpio_request(GPIO_FN_LCDD17, NULL);
1060 gpio_request(GPIO_FN_LCDD16, NULL);
1061 gpio_request(GPIO_FN_LCDD15, NULL);
1062 gpio_request(GPIO_FN_LCDD14, NULL);
1063 gpio_request(GPIO_FN_LCDD13, NULL);
1064 gpio_request(GPIO_FN_LCDD12, NULL);
1065 gpio_request(GPIO_FN_LCDD11, NULL);
1066 gpio_request(GPIO_FN_LCDD10, NULL);
1067 gpio_request(GPIO_FN_LCDD9, NULL);
1068 gpio_request(GPIO_FN_LCDD8, NULL);
1069 gpio_request(GPIO_FN_LCDD7, NULL);
1070 gpio_request(GPIO_FN_LCDD6, NULL);
1071 gpio_request(GPIO_FN_LCDD5, NULL);
1072 gpio_request(GPIO_FN_LCDD4, NULL);
1073 gpio_request(GPIO_FN_LCDD3, NULL);
1074 gpio_request(GPIO_FN_LCDD2, NULL);
1075 gpio_request(GPIO_FN_LCDD1, NULL);
1076 gpio_request(GPIO_FN_LCDD0, NULL);
1077 gpio_request(GPIO_FN_LCDDISP, NULL);
1078 gpio_request(GPIO_FN_LCDHSYN, NULL);
1079 gpio_request(GPIO_FN_LCDDCK, NULL);
1080 gpio_request(GPIO_FN_LCDVSYN, NULL);
1081 gpio_request(GPIO_FN_LCDDON, NULL);
1082 gpio_request(GPIO_FN_LCDLCLK, NULL);
9d56dd3b 1083 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
fa3ba51b
KM
1084
1085 gpio_request(GPIO_PTE6, NULL);
1086 gpio_request(GPIO_PTU1, NULL);
1087 gpio_request(GPIO_PTR1, NULL);
1088 gpio_request(GPIO_PTA2, NULL);
1089 gpio_direction_input(GPIO_PTE6);
1090 gpio_direction_output(GPIO_PTU1, 0);
1091 gpio_direction_output(GPIO_PTR1, 0);
1092 gpio_direction_output(GPIO_PTA2, 0);
1093
82b33221 1094 /* I/O buffer drive ability is high */
9d56dd3b 1095 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
ea15edb2 1096
fa3ba51b
KM
1097 if (gpio_get_value(GPIO_PTE6)) {
1098 /* DVI */
1099 lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
44432407
GL
1100 lcdc_info.ch[0].clock_divider = 1;
1101 lcdc_info.ch[0].lcd_cfg = ecovec_dvi_modes;
1102 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_dvi_modes);
fa3ba51b
KM
1103
1104 gpio_set_value(GPIO_PTA2, 1);
1105 gpio_set_value(GPIO_PTU1, 1);
1106 } else {
1107 /* Panel */
ea15edb2 1108 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
44432407
GL
1109 lcdc_info.ch[0].clock_divider = 2;
1110 lcdc_info.ch[0].lcd_cfg = ecovec_lcd_modes;
1111 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_lcd_modes);
ea15edb2
KM
1112
1113 gpio_set_value(GPIO_PTR1, 1);
1114
1115 /* FIXME
1116 *
1117 * LCDDON control is needed for Panel,
1118 * but current sh_mobile_lcdc driver doesn't control it.
1119 * It is temporary correspondence
1120 */
1121 gpio_request(GPIO_PTF4, NULL);
1122 gpio_direction_output(GPIO_PTF4, 1);
8810e055
KM
1123
1124 /* enable TouchScreen */
1125 i2c_register_board_info(0, &ts_i2c_clients, 1);
fcb8918f 1126 irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
fa3ba51b
KM
1127 }
1128
2153ad32
KM
1129 /* enable CEU0 */
1130 gpio_request(GPIO_FN_VIO0_D15, NULL);
1131 gpio_request(GPIO_FN_VIO0_D14, NULL);
1132 gpio_request(GPIO_FN_VIO0_D13, NULL);
1133 gpio_request(GPIO_FN_VIO0_D12, NULL);
1134 gpio_request(GPIO_FN_VIO0_D11, NULL);
1135 gpio_request(GPIO_FN_VIO0_D10, NULL);
1136 gpio_request(GPIO_FN_VIO0_D9, NULL);
1137 gpio_request(GPIO_FN_VIO0_D8, NULL);
1138 gpio_request(GPIO_FN_VIO0_D7, NULL);
1139 gpio_request(GPIO_FN_VIO0_D6, NULL);
1140 gpio_request(GPIO_FN_VIO0_D5, NULL);
1141 gpio_request(GPIO_FN_VIO0_D4, NULL);
1142 gpio_request(GPIO_FN_VIO0_D3, NULL);
1143 gpio_request(GPIO_FN_VIO0_D2, NULL);
1144 gpio_request(GPIO_FN_VIO0_D1, NULL);
1145 gpio_request(GPIO_FN_VIO0_D0, NULL);
1146 gpio_request(GPIO_FN_VIO0_VD, NULL);
1147 gpio_request(GPIO_FN_VIO0_CLK, NULL);
1148 gpio_request(GPIO_FN_VIO0_FLD, NULL);
1149 gpio_request(GPIO_FN_VIO0_HD, NULL);
1150 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
1151
1152 /* enable CEU1 */
1153 gpio_request(GPIO_FN_VIO1_D7, NULL);
1154 gpio_request(GPIO_FN_VIO1_D6, NULL);
1155 gpio_request(GPIO_FN_VIO1_D5, NULL);
1156 gpio_request(GPIO_FN_VIO1_D4, NULL);
1157 gpio_request(GPIO_FN_VIO1_D3, NULL);
1158 gpio_request(GPIO_FN_VIO1_D2, NULL);
1159 gpio_request(GPIO_FN_VIO1_D1, NULL);
1160 gpio_request(GPIO_FN_VIO1_D0, NULL);
1161 gpio_request(GPIO_FN_VIO1_FLD, NULL);
1162 gpio_request(GPIO_FN_VIO1_HD, NULL);
1163 gpio_request(GPIO_FN_VIO1_VD, NULL);
1164 gpio_request(GPIO_FN_VIO1_CLK, NULL);
1165 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
1166
e9103e74
KM
1167 /* enable KEYSC */
1168 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
1169 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
1170 gpio_request(GPIO_FN_KEYOUT3, NULL);
1171 gpio_request(GPIO_FN_KEYOUT2, NULL);
1172 gpio_request(GPIO_FN_KEYOUT1, NULL);
1173 gpio_request(GPIO_FN_KEYOUT0, NULL);
1174 gpio_request(GPIO_FN_KEYIN0, NULL);
1175
064a16dc
KM
1176 /* enable user debug switch */
1177 gpio_request(GPIO_PTR0, NULL);
1178 gpio_request(GPIO_PTR4, NULL);
1179 gpio_request(GPIO_PTR5, NULL);
1180 gpio_request(GPIO_PTR6, NULL);
1181 gpio_direction_input(GPIO_PTR0);
1182 gpio_direction_input(GPIO_PTR4);
1183 gpio_direction_input(GPIO_PTR5);
1184 gpio_direction_input(GPIO_PTR6);
1185
5744c881 1186#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1ce4da7a 1187 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
96987d96
KM
1188 gpio_request(GPIO_FN_SDHI0CD, NULL);
1189 gpio_request(GPIO_FN_SDHI0WP, NULL);
1190 gpio_request(GPIO_FN_SDHI0CMD, NULL);
1191 gpio_request(GPIO_FN_SDHI0CLK, NULL);
1192 gpio_request(GPIO_FN_SDHI0D3, NULL);
1193 gpio_request(GPIO_FN_SDHI0D2, NULL);
1194 gpio_request(GPIO_FN_SDHI0D1, NULL);
1195 gpio_request(GPIO_FN_SDHI0D0, NULL);
98779ad8
MD
1196 gpio_request(GPIO_PTB6, NULL);
1197 gpio_direction_output(GPIO_PTB6, 0);
96987d96 1198
5744c881 1199#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1ce4da7a 1200 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
96987d96
KM
1201 gpio_request(GPIO_FN_SDHI1CD, NULL);
1202 gpio_request(GPIO_FN_SDHI1WP, NULL);
1203 gpio_request(GPIO_FN_SDHI1CMD, NULL);
1204 gpio_request(GPIO_FN_SDHI1CLK, NULL);
1205 gpio_request(GPIO_FN_SDHI1D3, NULL);
1206 gpio_request(GPIO_FN_SDHI1D2, NULL);
1207 gpio_request(GPIO_FN_SDHI1D1, NULL);
1208 gpio_request(GPIO_FN_SDHI1D0, NULL);
96987d96 1209 gpio_request(GPIO_PTB7, NULL);
98779ad8 1210 gpio_direction_output(GPIO_PTB7, 0);
96987d96
KM
1211
1212 /* I/O buffer drive ability is high for SDHI1 */
9d56dd3b 1213 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1238c684 1214#endif /* CONFIG_MMC_SH_MMCIF */
1ce4da7a
MD
1215#else
1216 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1217 gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1218 gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1219 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1220 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
1221 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
1222 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1223 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1224 gpio_request(GPIO_PTY6, NULL); /* write protect */
1225 gpio_direction_input(GPIO_PTY6);
1226 gpio_request(GPIO_PTY7, NULL); /* card detect */
1227 gpio_direction_input(GPIO_PTY7);
1228
1229 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1230#endif
96987d96 1231
207efd07
KM
1232 /* enable Video */
1233 gpio_request(GPIO_PTU2, NULL);
1234 gpio_direction_output(GPIO_PTU2, 1);
1235
9aa25d64
KM
1236 /* enable Camera */
1237 gpio_request(GPIO_PTA3, NULL);
1238 gpio_request(GPIO_PTA4, NULL);
1239 gpio_direction_output(GPIO_PTA3, 0);
1240 gpio_direction_output(GPIO_PTA4, 0);
1241
1980fdc4
KM
1242 /* enable FSI */
1243 gpio_request(GPIO_FN_FSIMCKB, NULL);
1244 gpio_request(GPIO_FN_FSIIBSD, NULL);
1245 gpio_request(GPIO_FN_FSIOBSD, NULL);
1246 gpio_request(GPIO_FN_FSIIBBCK, NULL);
1247 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
1248 gpio_request(GPIO_FN_FSIOBBCK, NULL);
1249 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
1250 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1251
16afc9fb
KM
1252 /* set SPU2 clock to 83.4 MHz */
1253 clk = clk_get(NULL, "spu_clk");
56ea5109 1254 if (!IS_ERR(clk)) {
10305853
KM
1255 clk_set_rate(clk, clk_round_rate(clk, 83333333));
1256 clk_put(clk);
1257 }
16afc9fb 1258
1980fdc4
KM
1259 /* change parent of FSI B */
1260 clk = clk_get(NULL, "fsib_clk");
56ea5109 1261 if (!IS_ERR(clk)) {
4bd5d259
KM
1262 /* 48kHz dummy clock was used to make sure 1/1 divide */
1263 clk_set_rate(&sh7724_fsimckb_clk, 48000);
1264 clk_set_parent(clk, &sh7724_fsimckb_clk);
1265 clk_set_rate(clk, 48000);
10305853
KM
1266 clk_put(clk);
1267 }
1980fdc4
KM
1268
1269 gpio_request(GPIO_PTU0, NULL);
1270 gpio_direction_output(GPIO_PTU0, 0);
1271 mdelay(20);
1272
ea440783
NH
1273 /* enable motion sensor */
1274 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1275 gpio_direction_input(GPIO_FN_INTC_IRQ1);
1276
6f26d19f
MD
1277 /* set VPU clock to 166 MHz */
1278 clk = clk_get(NULL, "vpu_clk");
56ea5109 1279 if (!IS_ERR(clk)) {
10305853
KM
1280 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1281 clk_put(clk);
1282 }
6f26d19f 1283
26365716
KM
1284 /* enable IrDA */
1285 gpio_request(GPIO_FN_IRDA_OUT, NULL);
1286 gpio_request(GPIO_FN_IRDA_IN, NULL);
1287 gpio_request(GPIO_PTU5, NULL);
1288 gpio_direction_output(GPIO_PTU5, 0);
1289
5744c881 1290#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1238c684
YG
1291 /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
1292 gpio_request(GPIO_FN_MMC_D7, NULL);
1293 gpio_request(GPIO_FN_MMC_D6, NULL);
1294 gpio_request(GPIO_FN_MMC_D5, NULL);
1295 gpio_request(GPIO_FN_MMC_D4, NULL);
1296 gpio_request(GPIO_FN_MMC_D3, NULL);
1297 gpio_request(GPIO_FN_MMC_D2, NULL);
1298 gpio_request(GPIO_FN_MMC_D1, NULL);
1299 gpio_request(GPIO_FN_MMC_D0, NULL);
1300 gpio_request(GPIO_FN_MMC_CLK, NULL);
1301 gpio_request(GPIO_FN_MMC_CMD, NULL);
1302 gpio_request(GPIO_PTB7, NULL);
1303 gpio_direction_output(GPIO_PTB7, 0);
1304
1305 /* I/O buffer drive ability is high for MMCIF */
1306 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1307#endif
1308
125ecce6 1309 /* enable I2C device */
1980fdc4
KM
1310 i2c_register_board_info(0, i2c0_devices,
1311 ARRAY_SIZE(i2c0_devices));
1312
125ecce6
KM
1313 i2c_register_board_info(1, i2c1_devices,
1314 ARRAY_SIZE(i2c1_devices));
1315
92359a70 1316#if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
aee5ab0b
GL
1317 /* VOU */
1318 gpio_request(GPIO_FN_DV_D15, NULL);
1319 gpio_request(GPIO_FN_DV_D14, NULL);
1320 gpio_request(GPIO_FN_DV_D13, NULL);
1321 gpio_request(GPIO_FN_DV_D12, NULL);
1322 gpio_request(GPIO_FN_DV_D11, NULL);
1323 gpio_request(GPIO_FN_DV_D10, NULL);
1324 gpio_request(GPIO_FN_DV_D9, NULL);
1325 gpio_request(GPIO_FN_DV_D8, NULL);
1326 gpio_request(GPIO_FN_DV_CLKI, NULL);
1327 gpio_request(GPIO_FN_DV_CLK, NULL);
1328 gpio_request(GPIO_FN_DV_VSYNC, NULL);
1329 gpio_request(GPIO_FN_DV_HSYNC, NULL);
1330
1331 /* AK8813 power / reset sequence */
1332 gpio_request(GPIO_PTG4, NULL);
1333 gpio_request(GPIO_PTU3, NULL);
1334 /* Reset */
1335 gpio_direction_output(GPIO_PTG4, 0);
1336 /* Power down */
1337 gpio_direction_output(GPIO_PTU3, 1);
1338
1339 udelay(10);
1340
1341 /* Power up, reset */
1342 gpio_set_value(GPIO_PTU3, 0);
1343
1344 udelay(10);
1345
1346 /* Remove reset */
1347 gpio_set_value(GPIO_PTG4, 1);
92359a70 1348#endif
aee5ab0b 1349
4138b740
KM
1350 return platform_add_devices(ecovec_devices,
1351 ARRAY_SIZE(ecovec_devices));
1352}
4907d57f
KM
1353arch_initcall(arch_setup);
1354
1355static int __init devices_setup(void)
1356{
376abbb4 1357 sh_eth_init(&sh_eth_plat);
4907d57f
KM
1358 return 0;
1359}
1360device_initcall(devices_setup);
1361
4138b740
KM
1362static struct sh_machine_vector mv_ecovec __initmv = {
1363 .mv_name = "R0P7724 (EcoVec)",
1364};