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4138b740 KM |
1 | /* |
2 | * Copyright (C) 2009 Renesas Solutions Corp. | |
3 | * | |
4 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> | |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file "COPYING" in the main directory of this archive | |
8 | * for more details. | |
9 | */ | |
10 | ||
11 | #include <linux/init.h> | |
12 | #include <linux/device.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/mtd/physmap.h> | |
15 | #include <linux/gpio.h> | |
16 | #include <linux/interrupt.h> | |
35a35408 KM |
17 | #include <linux/io.h> |
18 | #include <linux/delay.h> | |
907050a3 | 19 | #include <linux/usb/r8a66597.h> |
fa3ba51b | 20 | #include <video/sh_mobile_lcdc.h> |
2153ad32 | 21 | #include <media/sh_mobile_ceu.h> |
4138b740 | 22 | #include <asm/heartbeat.h> |
35a35408 | 23 | #include <asm/sh_eth.h> |
4138b740 KM |
24 | #include <cpu/sh7724.h> |
25 | ||
26 | /* | |
b7056bc1 KM |
27 | * Address Interface BusWidth |
28 | *----------------------------------------- | |
29 | * 0x0000_0000 uboot 16bit | |
30 | * 0x0004_0000 Linux romImage 16bit | |
31 | * 0x0014_0000 MTD for Linux 16bit | |
32 | * 0x0400_0000 Internal I/O 16/32bit | |
33 | * 0x0800_0000 DRAM 32bit | |
34 | * 0x1800_0000 MFI 16bit | |
4138b740 KM |
35 | */ |
36 | ||
37 | /* Heartbeat */ | |
38 | static unsigned char led_pos[] = { 0, 1, 2, 3 }; | |
39 | static struct heartbeat_data heartbeat_data = { | |
40 | .regsize = 8, | |
41 | .nr_bits = 4, | |
42 | .bit_pos = led_pos, | |
43 | }; | |
44 | ||
45 | static struct resource heartbeat_resources[] = { | |
46 | [0] = { | |
47 | .start = 0xA405012C, /* PTG */ | |
48 | .end = 0xA405012E - 1, | |
49 | .flags = IORESOURCE_MEM, | |
50 | }, | |
51 | }; | |
52 | ||
53 | static struct platform_device heartbeat_device = { | |
54 | .name = "heartbeat", | |
55 | .id = -1, | |
56 | .dev = { | |
57 | .platform_data = &heartbeat_data, | |
58 | }, | |
59 | .num_resources = ARRAY_SIZE(heartbeat_resources), | |
60 | .resource = heartbeat_resources, | |
61 | }; | |
62 | ||
63 | /* MTD */ | |
64 | static struct mtd_partition nor_flash_partitions[] = { | |
65 | { | |
b7056bc1 | 66 | .name = "boot loader", |
4138b740 | 67 | .offset = 0, |
b7056bc1 | 68 | .size = (5 * 1024 * 1024), |
4138b740 | 69 | .mask_flags = MTD_CAP_ROM, |
4138b740 KM |
70 | }, { |
71 | .name = "free-area", | |
72 | .offset = MTDPART_OFS_APPEND, | |
73 | .size = MTDPART_SIZ_FULL, | |
74 | }, | |
75 | }; | |
76 | ||
77 | static struct physmap_flash_data nor_flash_data = { | |
78 | .width = 2, | |
79 | .parts = nor_flash_partitions, | |
80 | .nr_parts = ARRAY_SIZE(nor_flash_partitions), | |
81 | }; | |
82 | ||
83 | static struct resource nor_flash_resources[] = { | |
84 | [0] = { | |
85 | .name = "NOR Flash", | |
86 | .start = 0x00000000, | |
87 | .end = 0x03ffffff, | |
88 | .flags = IORESOURCE_MEM, | |
89 | } | |
90 | }; | |
91 | ||
92 | static struct platform_device nor_flash_device = { | |
93 | .name = "physmap-flash", | |
94 | .resource = nor_flash_resources, | |
95 | .num_resources = ARRAY_SIZE(nor_flash_resources), | |
96 | .dev = { | |
97 | .platform_data = &nor_flash_data, | |
98 | }, | |
99 | }; | |
100 | ||
35a35408 KM |
101 | /* SH Eth */ |
102 | #define SH_ETH_ADDR (0xA4600000) | |
103 | #define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0) | |
104 | #define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8) | |
105 | static struct resource sh_eth_resources[] = { | |
106 | [0] = { | |
107 | .start = SH_ETH_ADDR, | |
108 | .end = SH_ETH_ADDR + 0x1FC, | |
109 | .flags = IORESOURCE_MEM, | |
110 | }, | |
111 | [1] = { | |
112 | .start = 91, | |
113 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
114 | }, | |
115 | }; | |
116 | ||
117 | struct sh_eth_plat_data sh_eth_plat = { | |
118 | .phy = 0x1f, /* SMSC LAN8700 */ | |
119 | .edmac_endian = EDMAC_LITTLE_ENDIAN, | |
120 | }; | |
121 | ||
122 | static struct platform_device sh_eth_device = { | |
123 | .name = "sh-eth", | |
124 | .id = 0, | |
125 | .dev = { | |
126 | .platform_data = &sh_eth_plat, | |
127 | }, | |
128 | .num_resources = ARRAY_SIZE(sh_eth_resources), | |
129 | .resource = sh_eth_resources, | |
130 | }; | |
131 | ||
907050a3 KM |
132 | /* USB0 host */ |
133 | void usb0_port_power(int port, int power) | |
134 | { | |
135 | gpio_set_value(GPIO_PTB4, power); | |
136 | } | |
137 | ||
138 | static struct r8a66597_platdata usb0_host_data = { | |
139 | .on_chip = 1, | |
140 | .port_power = usb0_port_power, | |
141 | }; | |
142 | ||
143 | static struct resource usb0_host_resources[] = { | |
144 | [0] = { | |
145 | .start = 0xa4d80000, | |
146 | .end = 0xa4d80124 - 1, | |
147 | .flags = IORESOURCE_MEM, | |
148 | }, | |
149 | [1] = { | |
150 | .start = 65, | |
151 | .end = 65, | |
152 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | |
153 | }, | |
154 | }; | |
155 | ||
156 | static struct platform_device usb0_host_device = { | |
157 | .name = "r8a66597_hcd", | |
158 | .id = 0, | |
159 | .dev = { | |
160 | .dma_mask = NULL, /* not use dma */ | |
161 | .coherent_dma_mask = 0xffffffff, | |
162 | .platform_data = &usb0_host_data, | |
163 | }, | |
164 | .num_resources = ARRAY_SIZE(usb0_host_resources), | |
165 | .resource = usb0_host_resources, | |
166 | }; | |
167 | ||
168 | /* | |
169 | * USB1 | |
170 | * | |
171 | * CN5 can use both host/function, | |
172 | * and we can determine it by checking PTB[3] | |
173 | * | |
174 | * This time only USB1 host is supported. | |
175 | */ | |
176 | void usb1_port_power(int port, int power) | |
177 | { | |
178 | if (!gpio_get_value(GPIO_PTB3)) { | |
179 | printk(KERN_ERR "USB1 function is not supported\n"); | |
180 | return; | |
181 | } | |
182 | ||
183 | gpio_set_value(GPIO_PTB5, power); | |
184 | } | |
185 | ||
186 | static struct r8a66597_platdata usb1_host_data = { | |
187 | .on_chip = 1, | |
188 | .port_power = usb1_port_power, | |
189 | }; | |
190 | ||
191 | static struct resource usb1_host_resources[] = { | |
192 | [0] = { | |
193 | .start = 0xa4d90000, | |
194 | .end = 0xa4d90124 - 1, | |
195 | .flags = IORESOURCE_MEM, | |
196 | }, | |
197 | [1] = { | |
198 | .start = 66, | |
199 | .end = 66, | |
200 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | |
201 | }, | |
202 | }; | |
203 | ||
204 | static struct platform_device usb1_host_device = { | |
205 | .name = "r8a66597_hcd", | |
206 | .id = 1, | |
207 | .dev = { | |
208 | .dma_mask = NULL, /* not use dma */ | |
209 | .coherent_dma_mask = 0xffffffff, | |
210 | .platform_data = &usb1_host_data, | |
211 | }, | |
212 | .num_resources = ARRAY_SIZE(usb1_host_resources), | |
213 | .resource = usb1_host_resources, | |
214 | }; | |
215 | ||
fa3ba51b KM |
216 | /* LCDC */ |
217 | static struct sh_mobile_lcdc_info lcdc_info = { | |
218 | .ch[0] = { | |
219 | .interface_type = RGB18, | |
220 | .chan = LCDC_CHAN_MAINLCD, | |
221 | .bpp = 16, | |
fa3ba51b KM |
222 | .lcd_cfg = { |
223 | .sync = 0, /* hsync and vsync are active low */ | |
224 | }, | |
225 | .lcd_size_cfg = { /* 7.0 inch */ | |
226 | .width = 152, | |
227 | .height = 91, | |
228 | }, | |
229 | .board_cfg = { | |
230 | }, | |
231 | } | |
232 | }; | |
233 | ||
234 | static struct resource lcdc_resources[] = { | |
235 | [0] = { | |
236 | .name = "LCDC", | |
237 | .start = 0xfe940000, | |
238 | .end = 0xfe941fff, | |
239 | .flags = IORESOURCE_MEM, | |
240 | }, | |
241 | [1] = { | |
242 | .start = 106, | |
243 | .flags = IORESOURCE_IRQ, | |
244 | }, | |
245 | }; | |
246 | ||
247 | static struct platform_device lcdc_device = { | |
248 | .name = "sh_mobile_lcdc_fb", | |
249 | .num_resources = ARRAY_SIZE(lcdc_resources), | |
250 | .resource = lcdc_resources, | |
251 | .dev = { | |
252 | .platform_data = &lcdc_info, | |
253 | }, | |
254 | .archdata = { | |
255 | .hwblk_id = HWBLK_LCDC, | |
256 | }, | |
257 | }; | |
258 | ||
2153ad32 KM |
259 | /* CEU0 */ |
260 | static struct sh_mobile_ceu_info sh_mobile_ceu0_info = { | |
261 | .flags = SH_CEU_FLAG_USE_8BIT_BUS, | |
262 | }; | |
263 | ||
264 | static struct resource ceu0_resources[] = { | |
265 | [0] = { | |
266 | .name = "CEU0", | |
267 | .start = 0xfe910000, | |
268 | .end = 0xfe91009f, | |
269 | .flags = IORESOURCE_MEM, | |
270 | }, | |
271 | [1] = { | |
272 | .start = 52, | |
273 | .flags = IORESOURCE_IRQ, | |
274 | }, | |
275 | [2] = { | |
276 | /* place holder for contiguous memory */ | |
277 | }, | |
278 | }; | |
279 | ||
280 | static struct platform_device ceu0_device = { | |
281 | .name = "sh_mobile_ceu", | |
282 | .id = 0, /* "ceu0" clock */ | |
283 | .num_resources = ARRAY_SIZE(ceu0_resources), | |
284 | .resource = ceu0_resources, | |
285 | .dev = { | |
286 | .platform_data = &sh_mobile_ceu0_info, | |
287 | }, | |
288 | .archdata = { | |
289 | .hwblk_id = HWBLK_CEU0, | |
290 | }, | |
291 | }; | |
292 | ||
293 | /* CEU1 */ | |
294 | static struct sh_mobile_ceu_info sh_mobile_ceu1_info = { | |
295 | .flags = SH_CEU_FLAG_USE_8BIT_BUS, | |
296 | }; | |
297 | ||
298 | static struct resource ceu1_resources[] = { | |
299 | [0] = { | |
300 | .name = "CEU1", | |
301 | .start = 0xfe914000, | |
302 | .end = 0xfe91409f, | |
303 | .flags = IORESOURCE_MEM, | |
304 | }, | |
305 | [1] = { | |
306 | .start = 63, | |
307 | .flags = IORESOURCE_IRQ, | |
308 | }, | |
309 | [2] = { | |
310 | /* place holder for contiguous memory */ | |
311 | }, | |
312 | }; | |
313 | ||
314 | static struct platform_device ceu1_device = { | |
315 | .name = "sh_mobile_ceu", | |
316 | .id = 1, /* "ceu1" clock */ | |
317 | .num_resources = ARRAY_SIZE(ceu1_resources), | |
318 | .resource = ceu1_resources, | |
319 | .dev = { | |
320 | .platform_data = &sh_mobile_ceu1_info, | |
321 | }, | |
322 | .archdata = { | |
323 | .hwblk_id = HWBLK_CEU1, | |
324 | }, | |
325 | }; | |
326 | ||
4138b740 KM |
327 | static struct platform_device *ecovec_devices[] __initdata = { |
328 | &heartbeat_device, | |
329 | &nor_flash_device, | |
35a35408 | 330 | &sh_eth_device, |
907050a3 KM |
331 | &usb0_host_device, |
332 | &usb1_host_device, /* USB1 host support */ | |
fa3ba51b | 333 | &lcdc_device, |
2153ad32 KM |
334 | &ceu0_device, |
335 | &ceu1_device, | |
4138b740 KM |
336 | }; |
337 | ||
fa3ba51b | 338 | #define PORT_HIZA 0xA4050158 |
ea15edb2 | 339 | #define IODRIVEA 0xA405018A |
4138b740 KM |
340 | static int __init devices_setup(void) |
341 | { | |
342 | /* enable SCIFA0 */ | |
343 | gpio_request(GPIO_FN_SCIF0_TXD, NULL); | |
344 | gpio_request(GPIO_FN_SCIF0_RXD, NULL); | |
4138b740 KM |
345 | |
346 | /* enable debug LED */ | |
347 | gpio_request(GPIO_PTG0, NULL); | |
348 | gpio_request(GPIO_PTG1, NULL); | |
349 | gpio_request(GPIO_PTG2, NULL); | |
350 | gpio_request(GPIO_PTG3, NULL); | |
b7056bc1 KM |
351 | gpio_direction_output(GPIO_PTG0, 0); |
352 | gpio_direction_output(GPIO_PTG1, 0); | |
353 | gpio_direction_output(GPIO_PTG2, 0); | |
354 | gpio_direction_output(GPIO_PTG3, 0); | |
4138b740 | 355 | |
35a35408 KM |
356 | /* enable SH-Eth */ |
357 | gpio_request(GPIO_PTA1, NULL); | |
358 | gpio_direction_output(GPIO_PTA1, 1); | |
359 | mdelay(20); | |
360 | ||
361 | gpio_request(GPIO_FN_RMII_RXD0, NULL); | |
362 | gpio_request(GPIO_FN_RMII_RXD1, NULL); | |
363 | gpio_request(GPIO_FN_RMII_TXD0, NULL); | |
364 | gpio_request(GPIO_FN_RMII_TXD1, NULL); | |
365 | gpio_request(GPIO_FN_RMII_REF_CLK, NULL); | |
366 | gpio_request(GPIO_FN_RMII_TX_EN, NULL); | |
367 | gpio_request(GPIO_FN_RMII_RX_ER, NULL); | |
368 | gpio_request(GPIO_FN_RMII_CRS_DV, NULL); | |
369 | gpio_request(GPIO_FN_MDIO, NULL); | |
370 | gpio_request(GPIO_FN_MDC, NULL); | |
371 | gpio_request(GPIO_FN_LNKSTA, NULL); | |
372 | ||
907050a3 KM |
373 | /* enable USB */ |
374 | gpio_request(GPIO_PTB3, NULL); | |
375 | gpio_request(GPIO_PTB4, NULL); | |
376 | gpio_request(GPIO_PTB5, NULL); | |
377 | gpio_direction_input(GPIO_PTB3); | |
378 | gpio_direction_output(GPIO_PTB4, 0); | |
379 | gpio_direction_output(GPIO_PTB5, 0); | |
380 | ctrl_outw(0x0600, 0xa40501d4); | |
381 | ctrl_outw(0x0600, 0xa4050192); | |
382 | ||
fa3ba51b KM |
383 | /* enable LCDC */ |
384 | gpio_request(GPIO_FN_LCDD23, NULL); | |
385 | gpio_request(GPIO_FN_LCDD22, NULL); | |
386 | gpio_request(GPIO_FN_LCDD21, NULL); | |
387 | gpio_request(GPIO_FN_LCDD20, NULL); | |
388 | gpio_request(GPIO_FN_LCDD19, NULL); | |
389 | gpio_request(GPIO_FN_LCDD18, NULL); | |
390 | gpio_request(GPIO_FN_LCDD17, NULL); | |
391 | gpio_request(GPIO_FN_LCDD16, NULL); | |
392 | gpio_request(GPIO_FN_LCDD15, NULL); | |
393 | gpio_request(GPIO_FN_LCDD14, NULL); | |
394 | gpio_request(GPIO_FN_LCDD13, NULL); | |
395 | gpio_request(GPIO_FN_LCDD12, NULL); | |
396 | gpio_request(GPIO_FN_LCDD11, NULL); | |
397 | gpio_request(GPIO_FN_LCDD10, NULL); | |
398 | gpio_request(GPIO_FN_LCDD9, NULL); | |
399 | gpio_request(GPIO_FN_LCDD8, NULL); | |
400 | gpio_request(GPIO_FN_LCDD7, NULL); | |
401 | gpio_request(GPIO_FN_LCDD6, NULL); | |
402 | gpio_request(GPIO_FN_LCDD5, NULL); | |
403 | gpio_request(GPIO_FN_LCDD4, NULL); | |
404 | gpio_request(GPIO_FN_LCDD3, NULL); | |
405 | gpio_request(GPIO_FN_LCDD2, NULL); | |
406 | gpio_request(GPIO_FN_LCDD1, NULL); | |
407 | gpio_request(GPIO_FN_LCDD0, NULL); | |
408 | gpio_request(GPIO_FN_LCDDISP, NULL); | |
409 | gpio_request(GPIO_FN_LCDHSYN, NULL); | |
410 | gpio_request(GPIO_FN_LCDDCK, NULL); | |
411 | gpio_request(GPIO_FN_LCDVSYN, NULL); | |
412 | gpio_request(GPIO_FN_LCDDON, NULL); | |
413 | gpio_request(GPIO_FN_LCDLCLK, NULL); | |
414 | ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA); | |
415 | ||
416 | gpio_request(GPIO_PTE6, NULL); | |
417 | gpio_request(GPIO_PTU1, NULL); | |
418 | gpio_request(GPIO_PTR1, NULL); | |
419 | gpio_request(GPIO_PTA2, NULL); | |
420 | gpio_direction_input(GPIO_PTE6); | |
421 | gpio_direction_output(GPIO_PTU1, 0); | |
422 | gpio_direction_output(GPIO_PTR1, 0); | |
423 | gpio_direction_output(GPIO_PTA2, 0); | |
424 | ||
ea15edb2 KM |
425 | /* I/O buffer drive ability is low */ |
426 | ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA); | |
427 | ||
fa3ba51b KM |
428 | if (gpio_get_value(GPIO_PTE6)) { |
429 | /* DVI */ | |
430 | lcdc_info.clock_source = LCDC_CLK_EXTERNAL; | |
ea15edb2 | 431 | lcdc_info.ch[0].clock_divider = 1, |
fa3ba51b KM |
432 | lcdc_info.ch[0].lcd_cfg.name = "DVI"; |
433 | lcdc_info.ch[0].lcd_cfg.xres = 1280; | |
434 | lcdc_info.ch[0].lcd_cfg.yres = 720; | |
435 | lcdc_info.ch[0].lcd_cfg.left_margin = 220; | |
436 | lcdc_info.ch[0].lcd_cfg.right_margin = 110; | |
437 | lcdc_info.ch[0].lcd_cfg.hsync_len = 40; | |
438 | lcdc_info.ch[0].lcd_cfg.upper_margin = 20; | |
439 | lcdc_info.ch[0].lcd_cfg.lower_margin = 5; | |
440 | lcdc_info.ch[0].lcd_cfg.vsync_len = 5; | |
441 | ||
442 | gpio_set_value(GPIO_PTA2, 1); | |
443 | gpio_set_value(GPIO_PTU1, 1); | |
444 | } else { | |
445 | /* Panel */ | |
ea15edb2 KM |
446 | |
447 | lcdc_info.clock_source = LCDC_CLK_PERIPHERAL; | |
448 | lcdc_info.ch[0].clock_divider = 2, | |
449 | lcdc_info.ch[0].lcd_cfg.name = "Panel"; | |
450 | lcdc_info.ch[0].lcd_cfg.xres = 800; | |
451 | lcdc_info.ch[0].lcd_cfg.yres = 480; | |
452 | lcdc_info.ch[0].lcd_cfg.left_margin = 220; | |
453 | lcdc_info.ch[0].lcd_cfg.right_margin = 110; | |
454 | lcdc_info.ch[0].lcd_cfg.hsync_len = 70; | |
455 | lcdc_info.ch[0].lcd_cfg.upper_margin = 20; | |
456 | lcdc_info.ch[0].lcd_cfg.lower_margin = 5; | |
457 | lcdc_info.ch[0].lcd_cfg.vsync_len = 5; | |
458 | ||
459 | gpio_set_value(GPIO_PTR1, 1); | |
460 | ||
461 | /* FIXME | |
462 | * | |
463 | * LCDDON control is needed for Panel, | |
464 | * but current sh_mobile_lcdc driver doesn't control it. | |
465 | * It is temporary correspondence | |
466 | */ | |
467 | gpio_request(GPIO_PTF4, NULL); | |
468 | gpio_direction_output(GPIO_PTF4, 1); | |
fa3ba51b KM |
469 | } |
470 | ||
2153ad32 KM |
471 | /* enable CEU0 */ |
472 | gpio_request(GPIO_FN_VIO0_D15, NULL); | |
473 | gpio_request(GPIO_FN_VIO0_D14, NULL); | |
474 | gpio_request(GPIO_FN_VIO0_D13, NULL); | |
475 | gpio_request(GPIO_FN_VIO0_D12, NULL); | |
476 | gpio_request(GPIO_FN_VIO0_D11, NULL); | |
477 | gpio_request(GPIO_FN_VIO0_D10, NULL); | |
478 | gpio_request(GPIO_FN_VIO0_D9, NULL); | |
479 | gpio_request(GPIO_FN_VIO0_D8, NULL); | |
480 | gpio_request(GPIO_FN_VIO0_D7, NULL); | |
481 | gpio_request(GPIO_FN_VIO0_D6, NULL); | |
482 | gpio_request(GPIO_FN_VIO0_D5, NULL); | |
483 | gpio_request(GPIO_FN_VIO0_D4, NULL); | |
484 | gpio_request(GPIO_FN_VIO0_D3, NULL); | |
485 | gpio_request(GPIO_FN_VIO0_D2, NULL); | |
486 | gpio_request(GPIO_FN_VIO0_D1, NULL); | |
487 | gpio_request(GPIO_FN_VIO0_D0, NULL); | |
488 | gpio_request(GPIO_FN_VIO0_VD, NULL); | |
489 | gpio_request(GPIO_FN_VIO0_CLK, NULL); | |
490 | gpio_request(GPIO_FN_VIO0_FLD, NULL); | |
491 | gpio_request(GPIO_FN_VIO0_HD, NULL); | |
492 | platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20); | |
493 | ||
494 | /* enable CEU1 */ | |
495 | gpio_request(GPIO_FN_VIO1_D7, NULL); | |
496 | gpio_request(GPIO_FN_VIO1_D6, NULL); | |
497 | gpio_request(GPIO_FN_VIO1_D5, NULL); | |
498 | gpio_request(GPIO_FN_VIO1_D4, NULL); | |
499 | gpio_request(GPIO_FN_VIO1_D3, NULL); | |
500 | gpio_request(GPIO_FN_VIO1_D2, NULL); | |
501 | gpio_request(GPIO_FN_VIO1_D1, NULL); | |
502 | gpio_request(GPIO_FN_VIO1_D0, NULL); | |
503 | gpio_request(GPIO_FN_VIO1_FLD, NULL); | |
504 | gpio_request(GPIO_FN_VIO1_HD, NULL); | |
505 | gpio_request(GPIO_FN_VIO1_VD, NULL); | |
506 | gpio_request(GPIO_FN_VIO1_CLK, NULL); | |
507 | platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20); | |
508 | ||
4138b740 KM |
509 | return platform_add_devices(ecovec_devices, |
510 | ARRAY_SIZE(ecovec_devices)); | |
511 | } | |
512 | device_initcall(devices_setup); | |
513 | ||
514 | static struct sh_machine_vector mv_ecovec __initmv = { | |
515 | .mv_name = "R0P7724 (EcoVec)", | |
516 | }; |