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sh: sh7724: fixup renesas_usbhs clock settings
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1/*
2 * Copyright (C) 2009 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/device.h>
13#include <linux/platform_device.h>
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14#include <linux/mmc/host.h>
15#include <linux/mmc/sh_mmcif.h>
960b9e7e 16#include <linux/mmc/sh_mobile_sdhi.h>
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17#include <linux/mtd/physmap.h>
18#include <linux/gpio.h>
19#include <linux/interrupt.h>
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20#include <linux/io.h>
21#include <linux/delay.h>
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22#include <linux/regulator/fixed.h>
23#include <linux/regulator/machine.h>
907050a3 24#include <linux/usb/r8a66597.h>
fb2e7394 25#include <linux/usb/renesas_usbhs.h>
4907d57f 26#include <linux/i2c.h>
8810e055 27#include <linux/i2c/tsc2007.h>
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28#include <linux/spi/spi.h>
29#include <linux/spi/sh_msiof.h>
30#include <linux/spi/mmc_spi.h>
e9103e74 31#include <linux/input.h>
fc1d003d 32#include <linux/input/sh_keysc.h>
cf8e56bf 33#include <linux/sh_eth.h>
9307d115 34#include <linux/sh_intc.h>
a1ad8033 35#include <linux/videodev2.h>
fa3ba51b 36#include <video/sh_mobile_lcdc.h>
1980fdc4 37#include <sound/sh_fsi.h>
064bfada 38#include <sound/simple_card.h>
2153ad32 39#include <media/sh_mobile_ceu.h>
a1ad8033 40#include <media/soc_camera.h>
207efd07 41#include <media/tw9910.h>
9aa25d64 42#include <media/mt9t112.h>
4138b740 43#include <asm/heartbeat.h>
a991801a 44#include <asm/clock.h>
eb0cd9e8 45#include <asm/suspend.h>
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46#include <cpu/sh7724.h>
47
48/*
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49 * Address Interface BusWidth
50 *-----------------------------------------
51 * 0x0000_0000 uboot 16bit
52 * 0x0004_0000 Linux romImage 16bit
53 * 0x0014_0000 MTD for Linux 16bit
54 * 0x0400_0000 Internal I/O 16/32bit
55 * 0x0800_0000 DRAM 32bit
56 * 0x1800_0000 MFI 16bit
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57 */
58
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59/* SWITCH
60 *------------------------------
61 * DS2[1] = FlashROM write protect ON : write protect
62 * OFF : No write protect
63 * DS2[2] = RMII / TS, SCIF ON : RMII
64 * OFF : TS, SCIF3
65 * DS2[3] = Camera / Video ON : Camera
66 * OFF : NTSC/PAL (IN)
67 * DS2[5] = NTSC_OUT Clock ON : On board OSC
68 * OFF : SH7724 DV_CLK
69 * DS2[6-7] = MMC / SD ON-OFF : SD
70 * OFF-ON : MMC
71 */
72
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73/* Heartbeat */
74static unsigned char led_pos[] = { 0, 1, 2, 3 };
a09d2831 75
4138b740 76static struct heartbeat_data heartbeat_data = {
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77 .nr_bits = 4,
78 .bit_pos = led_pos,
79};
80
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81static struct resource heartbeat_resource = {
82 .start = 0xA405012C, /* PTG */
83 .end = 0xA405012E - 1,
84 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
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85};
86
87static struct platform_device heartbeat_device = {
88 .name = "heartbeat",
89 .id = -1,
90 .dev = {
91 .platform_data = &heartbeat_data,
92 },
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93 .num_resources = 1,
94 .resource = &heartbeat_resource,
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95};
96
97/* MTD */
98static struct mtd_partition nor_flash_partitions[] = {
99 {
b7056bc1 100 .name = "boot loader",
4138b740 101 .offset = 0,
b7056bc1 102 .size = (5 * 1024 * 1024),
d5ce010c 103 .mask_flags = MTD_WRITEABLE, /* force read-only */
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104 }, {
105 .name = "free-area",
106 .offset = MTDPART_OFS_APPEND,
107 .size = MTDPART_SIZ_FULL,
108 },
109};
110
111static struct physmap_flash_data nor_flash_data = {
112 .width = 2,
113 .parts = nor_flash_partitions,
114 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
115};
116
117static struct resource nor_flash_resources[] = {
118 [0] = {
119 .name = "NOR Flash",
120 .start = 0x00000000,
121 .end = 0x03ffffff,
122 .flags = IORESOURCE_MEM,
123 }
124};
125
126static struct platform_device nor_flash_device = {
127 .name = "physmap-flash",
128 .resource = nor_flash_resources,
129 .num_resources = ARRAY_SIZE(nor_flash_resources),
130 .dev = {
131 .platform_data = &nor_flash_data,
132 },
133};
134
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135/* SH Eth */
136#define SH_ETH_ADDR (0xA4600000)
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137static struct resource sh_eth_resources[] = {
138 [0] = {
139 .start = SH_ETH_ADDR,
140 .end = SH_ETH_ADDR + 0x1FC,
141 .flags = IORESOURCE_MEM,
142 },
143 [1] = {
9307d115 144 .start = evt2irq(0xd60),
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145 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
146 },
147};
148
3ce09334 149static struct sh_eth_plat_data sh_eth_plat = {
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150 .phy = 0x1f, /* SMSC LAN8700 */
151 .edmac_endian = EDMAC_LITTLE_ENDIAN,
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152 .register_type = SH_ETH_REG_FAST_SH4,
153 .phy_interface = PHY_INTERFACE_MODE_MII,
acf3cc28 154 .ether_link_active_low = 1
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155};
156
157static struct platform_device sh_eth_device = {
158 .name = "sh-eth",
159 .id = 0,
160 .dev = {
161 .platform_data = &sh_eth_plat,
162 },
163 .num_resources = ARRAY_SIZE(sh_eth_resources),
164 .resource = sh_eth_resources,
165};
166
907050a3 167/* USB0 host */
3ce09334 168static void usb0_port_power(int port, int power)
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169{
170 gpio_set_value(GPIO_PTB4, power);
171}
172
173static struct r8a66597_platdata usb0_host_data = {
174 .on_chip = 1,
175 .port_power = usb0_port_power,
176};
177
178static struct resource usb0_host_resources[] = {
179 [0] = {
180 .start = 0xa4d80000,
181 .end = 0xa4d80124 - 1,
182 .flags = IORESOURCE_MEM,
183 },
184 [1] = {
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185 .start = evt2irq(0xa20),
186 .end = evt2irq(0xa20),
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187 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
188 },
189};
190
191static struct platform_device usb0_host_device = {
192 .name = "r8a66597_hcd",
193 .id = 0,
194 .dev = {
195 .dma_mask = NULL, /* not use dma */
196 .coherent_dma_mask = 0xffffffff,
197 .platform_data = &usb0_host_data,
198 },
199 .num_resources = ARRAY_SIZE(usb0_host_resources),
200 .resource = usb0_host_resources,
201};
202
3714a9a0 203/* USB1 host/function */
3ce09334 204static void usb1_port_power(int port, int power)
907050a3 205{
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206 gpio_set_value(GPIO_PTB5, power);
207}
208
3714a9a0 209static struct r8a66597_platdata usb1_common_data = {
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210 .on_chip = 1,
211 .port_power = usb1_port_power,
212};
213
3714a9a0 214static struct resource usb1_common_resources[] = {
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215 [0] = {
216 .start = 0xa4d90000,
217 .end = 0xa4d90124 - 1,
218 .flags = IORESOURCE_MEM,
219 },
220 [1] = {
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221 .start = evt2irq(0xa40),
222 .end = evt2irq(0xa40),
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223 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
224 },
225};
226
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227static struct platform_device usb1_common_device = {
228 /* .name will be added in arch_setup */
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229 .id = 1,
230 .dev = {
231 .dma_mask = NULL, /* not use dma */
232 .coherent_dma_mask = 0xffffffff,
3714a9a0 233 .platform_data = &usb1_common_data,
907050a3 234 },
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235 .num_resources = ARRAY_SIZE(usb1_common_resources),
236 .resource = usb1_common_resources,
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237};
238
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239/*
240 * USBHS
241 */
242static int usbhs_get_id(struct platform_device *pdev)
243{
244 return gpio_get_value(GPIO_PTB3);
245}
246
247static struct renesas_usbhs_platform_info usbhs_info = {
248 .platform_callback = {
249 .get_id = usbhs_get_id,
250 },
251 .driver_param = {
252 .buswait_bwait = 4,
253 .detection_delay = 5,
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254 .d0_tx_id = SHDMA_SLAVE_USB1D0_TX,
255 .d0_rx_id = SHDMA_SLAVE_USB1D0_RX,
256 .d1_tx_id = SHDMA_SLAVE_USB1D1_TX,
257 .d1_rx_id = SHDMA_SLAVE_USB1D1_RX,
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258 },
259};
260
261static struct resource usbhs_resources[] = {
262 [0] = {
263 .start = 0xa4d90000,
264 .end = 0xa4d90124 - 1,
265 .flags = IORESOURCE_MEM,
266 },
267 [1] = {
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268 .start = evt2irq(0xa40),
269 .end = evt2irq(0xa40),
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270 .flags = IORESOURCE_IRQ,
271 },
272};
273
274static struct platform_device usbhs_device = {
275 .name = "renesas_usbhs",
276 .id = 1,
277 .dev = {
278 .dma_mask = NULL, /* not use dma */
279 .coherent_dma_mask = 0xffffffff,
280 .platform_data = &usbhs_info,
281 },
282 .num_resources = ARRAY_SIZE(usbhs_resources),
283 .resource = usbhs_resources,
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284};
285
fa3ba51b 286/* LCDC */
e04008eb 287static const struct fb_videomode ecovec_lcd_modes[] = {
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288 {
289 .name = "Panel",
290 .xres = 800,
291 .yres = 480,
292 .left_margin = 220,
293 .right_margin = 110,
294 .hsync_len = 70,
295 .upper_margin = 20,
296 .lower_margin = 5,
297 .vsync_len = 5,
298 .sync = 0, /* hsync and vsync are active low */
299 },
300};
301
e04008eb 302static const struct fb_videomode ecovec_dvi_modes[] = {
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303 {
304 .name = "DVI",
305 .xres = 1280,
306 .yres = 720,
307 .left_margin = 220,
308 .right_margin = 110,
309 .hsync_len = 40,
310 .upper_margin = 20,
311 .lower_margin = 5,
312 .vsync_len = 5,
313 .sync = 0, /* hsync and vsync are active low */
314 },
315};
316
018882aa 317static int ecovec24_set_brightness(int brightness)
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318{
319 gpio_set_value(GPIO_PTR1, brightness);
320
321 return 0;
322}
323
018882aa 324static int ecovec24_get_brightness(void)
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325{
326 return gpio_get_value(GPIO_PTR1);
327}
328
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329static struct sh_mobile_lcdc_info lcdc_info = {
330 .ch[0] = {
331 .interface_type = RGB18,
332 .chan = LCDC_CHAN_MAINLCD,
edd153a3 333 .fourcc = V4L2_PIX_FMT_RGB565,
afaad83b 334 .panel_cfg = { /* 7.0 inch */
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335 .width = 152,
336 .height = 91,
337 },
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338 .bl_info = {
339 .name = "sh_mobile_lcdc_bl",
340 .max_brightness = 1,
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341 .set_brightness = ecovec24_set_brightness,
342 .get_brightness = ecovec24_get_brightness,
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343 },
344 }
345};
346
347static struct resource lcdc_resources[] = {
348 [0] = {
349 .name = "LCDC",
350 .start = 0xfe940000,
a6f15ade 351 .end = 0xfe942fff,
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352 .flags = IORESOURCE_MEM,
353 },
354 [1] = {
9307d115 355 .start = evt2irq(0xf40),
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356 .flags = IORESOURCE_IRQ,
357 },
358};
359
360static struct platform_device lcdc_device = {
361 .name = "sh_mobile_lcdc_fb",
362 .num_resources = ARRAY_SIZE(lcdc_resources),
363 .resource = lcdc_resources,
364 .dev = {
365 .platform_data = &lcdc_info,
366 },
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367};
368
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369/* CEU0 */
370static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
371 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
372};
373
374static struct resource ceu0_resources[] = {
375 [0] = {
376 .name = "CEU0",
377 .start = 0xfe910000,
378 .end = 0xfe91009f,
379 .flags = IORESOURCE_MEM,
380 },
381 [1] = {
9307d115 382 .start = evt2irq(0x880),
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383 .flags = IORESOURCE_IRQ,
384 },
385 [2] = {
386 /* place holder for contiguous memory */
387 },
388};
389
390static struct platform_device ceu0_device = {
391 .name = "sh_mobile_ceu",
392 .id = 0, /* "ceu0" clock */
393 .num_resources = ARRAY_SIZE(ceu0_resources),
394 .resource = ceu0_resources,
395 .dev = {
396 .platform_data = &sh_mobile_ceu0_info,
397 },
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398};
399
400/* CEU1 */
401static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
402 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
403};
404
405static struct resource ceu1_resources[] = {
406 [0] = {
407 .name = "CEU1",
408 .start = 0xfe914000,
409 .end = 0xfe91409f,
410 .flags = IORESOURCE_MEM,
411 },
412 [1] = {
9307d115 413 .start = evt2irq(0x9e0),
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414 .flags = IORESOURCE_IRQ,
415 },
416 [2] = {
417 /* place holder for contiguous memory */
418 },
419};
420
421static struct platform_device ceu1_device = {
422 .name = "sh_mobile_ceu",
423 .id = 1, /* "ceu1" clock */
424 .num_resources = ARRAY_SIZE(ceu1_resources),
425 .resource = ceu1_resources,
426 .dev = {
427 .platform_data = &sh_mobile_ceu1_info,
428 },
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429};
430
125ecce6 431/* I2C device */
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432static struct i2c_board_info i2c0_devices[] = {
433 {
434 I2C_BOARD_INFO("da7210", 0x1a),
435 },
436};
437
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438static struct i2c_board_info i2c1_devices[] = {
439 {
440 I2C_BOARD_INFO("r2025sd", 0x32),
441 },
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442 {
443 I2C_BOARD_INFO("lis3lv02d", 0x1c),
9307d115 444 .irq = evt2irq(0x620),
ea440783 445 }
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446};
447
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448/* KEYSC */
449static struct sh_keysc_info keysc_info = {
450 .mode = SH_KEYSC_MODE_1,
451 .scan_timing = 3,
452 .delay = 50,
453 .kycr2_delay = 100,
454 .keycodes = { KEY_1, 0, 0, 0, 0,
455 KEY_2, 0, 0, 0, 0,
456 KEY_3, 0, 0, 0, 0,
457 KEY_4, 0, 0, 0, 0,
458 KEY_5, 0, 0, 0, 0,
459 KEY_6, 0, 0, 0, 0, },
460};
461
462static struct resource keysc_resources[] = {
463 [0] = {
464 .name = "KEYSC",
465 .start = 0x044b0000,
466 .end = 0x044b000f,
467 .flags = IORESOURCE_MEM,
468 },
469 [1] = {
9307d115 470 .start = evt2irq(0xbe0),
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471 .flags = IORESOURCE_IRQ,
472 },
473};
474
475static struct platform_device keysc_device = {
476 .name = "sh_keysc",
477 .id = 0, /* keysc0 clock */
478 .num_resources = ARRAY_SIZE(keysc_resources),
479 .resource = keysc_resources,
480 .dev = {
481 .platform_data = &keysc_info,
482 },
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483};
484
8810e055 485/* TouchScreen */
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486#define IRQ0 evt2irq(0x600)
487
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488static int ts_get_pendown_state(void)
489{
490 int val = 0;
491 gpio_free(GPIO_FN_INTC_IRQ0);
492 gpio_request(GPIO_PTZ0, NULL);
493 gpio_direction_input(GPIO_PTZ0);
494
495 val = gpio_get_value(GPIO_PTZ0);
496
497 gpio_free(GPIO_PTZ0);
498 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
499
500 return val ? 0 : 1;
501}
502
503static int ts_init(void)
504{
505 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
506 return 0;
507}
508
3ce09334 509static struct tsc2007_platform_data tsc2007_info = {
8810e055 510 .model = 2007,
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511 .x_plate_ohms = 180,
512 .get_pendown_state = ts_get_pendown_state,
513 .init_platform_hw = ts_init,
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514};
515
516static struct i2c_board_info ts_i2c_clients = {
517 I2C_BOARD_INFO("tsc2007", 0x48),
518 .type = "tsc2007",
519 .platform_data = &tsc2007_info,
520 .irq = IRQ0,
521};
522
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523static struct regulator_consumer_supply cn12_power_consumers[] =
524{
525 REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
526 REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
527 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
528 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
529};
530
531static struct regulator_init_data cn12_power_init_data = {
532 .constraints = {
533 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
534 },
535 .num_consumer_supplies = ARRAY_SIZE(cn12_power_consumers),
536 .consumer_supplies = cn12_power_consumers,
537};
538
539static struct fixed_voltage_config cn12_power_info = {
540 .supply_name = "CN12 SD/MMC Vdd",
541 .microvolts = 3300000,
542 .gpio = GPIO_PTB7,
543 .enable_high = 1,
544 .init_data = &cn12_power_init_data,
545};
546
547static struct platform_device cn12_power = {
548 .name = "reg-fixed-voltage",
549 .id = 0,
550 .dev = {
551 .platform_data = &cn12_power_info,
552 },
553};
554
5744c881 555#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1238c684 556/* SDHI0 */
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557static struct regulator_consumer_supply sdhi0_power_consumers[] =
558{
559 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
560 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
561};
562
563static struct regulator_init_data sdhi0_power_init_data = {
564 .constraints = {
565 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
566 },
567 .num_consumer_supplies = ARRAY_SIZE(sdhi0_power_consumers),
568 .consumer_supplies = sdhi0_power_consumers,
569};
570
571static struct fixed_voltage_config sdhi0_power_info = {
572 .supply_name = "CN11 SD/MMC Vdd",
573 .microvolts = 3300000,
574 .gpio = GPIO_PTB6,
575 .enable_high = 1,
576 .init_data = &sdhi0_power_init_data,
577};
578
579static struct platform_device sdhi0_power = {
580 .name = "reg-fixed-voltage",
581 .id = 1,
582 .dev = {
583 .platform_data = &sdhi0_power_info,
584 },
585};
586
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587static void sdhi0_set_pwr(struct platform_device *pdev, int state)
588{
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589 static int power_gpio = -EINVAL;
590
591 if (power_gpio < 0) {
592 int ret = gpio_request(GPIO_PTB6, NULL);
593 if (!ret) {
594 power_gpio = GPIO_PTB6;
595 gpio_direction_output(power_gpio, 0);
596 }
597 }
598
599 /*
600 * Toggle the GPIO regardless, whether we managed to grab it above or
601 * the fixed regulator driver did.
602 */
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603 gpio_set_value(GPIO_PTB6, state);
604}
605
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606static int sdhi0_get_cd(struct platform_device *pdev)
607{
608 return !gpio_get_value(GPIO_PTY7);
609}
610
98779ad8 611static struct sh_mobile_sdhi_info sdhi0_info = {
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612 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
613 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
614 .set_pwr = sdhi0_set_pwr,
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GL
615 .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
616 MMC_CAP_NEEDS_POLL,
617 .get_cd = sdhi0_get_cd,
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618};
619
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620static struct resource sdhi0_resources[] = {
621 [0] = {
622 .name = "SDHI0",
623 .start = 0x04ce0000,
d80e9221 624 .end = 0x04ce00ff,
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625 .flags = IORESOURCE_MEM,
626 },
627 [1] = {
9307d115 628 .start = evt2irq(0xe80),
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629 .flags = IORESOURCE_IRQ,
630 },
631};
632
633static struct platform_device sdhi0_device = {
634 .name = "sh_mobile_sdhi",
635 .num_resources = ARRAY_SIZE(sdhi0_resources),
636 .resource = sdhi0_resources,
637 .id = 0,
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638 .dev = {
639 .platform_data = &sdhi0_info,
640 },
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641};
642
d4c191df 643static void cn12_set_pwr(struct platform_device *pdev, int state)
98779ad8 644{
d4c191df
GL
645 static int power_gpio = -EINVAL;
646
647 if (power_gpio < 0) {
648 int ret = gpio_request(GPIO_PTB7, NULL);
649 if (!ret) {
650 power_gpio = GPIO_PTB7;
651 gpio_direction_output(power_gpio, 0);
652 }
653 }
654
655 /*
656 * Toggle the GPIO regardless, whether we managed to grab it above or
657 * the fixed regulator driver did.
658 */
98779ad8
MD
659 gpio_set_value(GPIO_PTB7, state);
660}
661
d4c191df
GL
662#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
663/* SDHI1 */
4eb80146
GL
664static int sdhi1_get_cd(struct platform_device *pdev)
665{
666 return !gpio_get_value(GPIO_PTW7);
667}
668
98779ad8 669static struct sh_mobile_sdhi_info sdhi1_info = {
815f1995
GL
670 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
671 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
4eb80146
GL
672 .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
673 MMC_CAP_NEEDS_POLL,
d4c191df 674 .set_pwr = cn12_set_pwr,
4eb80146 675 .get_cd = sdhi1_get_cd,
98779ad8
MD
676};
677
96987d96
KM
678static struct resource sdhi1_resources[] = {
679 [0] = {
680 .name = "SDHI1",
681 .start = 0x04cf0000,
d80e9221 682 .end = 0x04cf00ff,
96987d96
KM
683 .flags = IORESOURCE_MEM,
684 },
685 [1] = {
9307d115 686 .start = evt2irq(0x4e0),
96987d96
KM
687 .flags = IORESOURCE_IRQ,
688 },
689};
690
691static struct platform_device sdhi1_device = {
692 .name = "sh_mobile_sdhi",
693 .num_resources = ARRAY_SIZE(sdhi1_resources),
694 .resource = sdhi1_resources,
695 .id = 1,
98779ad8
MD
696 .dev = {
697 .platform_data = &sdhi1_info,
698 },
96987d96 699};
1238c684 700#endif /* CONFIG_MMC_SH_MMCIF */
96987d96 701
1ce4da7a
MD
702#else
703
9503e891 704/* MMC SPI */
1ce4da7a
MD
705static int mmc_spi_get_ro(struct device *dev)
706{
707 return gpio_get_value(GPIO_PTY6);
708}
709
710static int mmc_spi_get_cd(struct device *dev)
711{
712 return !gpio_get_value(GPIO_PTY7);
713}
714
715static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
716{
717 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
718}
719
720static struct mmc_spi_platform_data mmc_spi_info = {
721 .get_ro = mmc_spi_get_ro,
722 .get_cd = mmc_spi_get_cd,
723 .caps = MMC_CAP_NEEDS_POLL,
724 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
725 .setpower = mmc_spi_setpower,
726};
727
728static struct spi_board_info spi_bus[] = {
729 {
730 .modalias = "mmc_spi",
731 .platform_data = &mmc_spi_info,
732 .max_speed_hz = 5000000,
733 .mode = SPI_MODE_0,
734 .controller_data = (void *) GPIO_PTM4,
735 },
736};
737
9503e891 738/* MSIOF0 */
1ce4da7a
MD
739static struct sh_msiof_spi_info msiof0_data = {
740 .num_chipselect = 1,
741};
742
743static struct resource msiof0_resources[] = {
744 [0] = {
745 .name = "MSIOF0",
746 .start = 0xa4c40000,
747 .end = 0xa4c40063,
748 .flags = IORESOURCE_MEM,
749 },
750 [1] = {
9307d115 751 .start = evt2irq(0xc80),
1ce4da7a
MD
752 .flags = IORESOURCE_IRQ,
753 },
754};
755
756static struct platform_device msiof0_device = {
757 .name = "spi_sh_msiof",
758 .id = 0, /* MSIOF0 */
759 .dev = {
760 .platform_data = &msiof0_data,
761 },
762 .num_resources = ARRAY_SIZE(msiof0_resources),
763 .resource = msiof0_resources,
1ce4da7a
MD
764};
765
766#endif
767
9aa25d64 768/* I2C Video/Camera */
207efd07
KM
769static struct i2c_board_info i2c_camera[] = {
770 {
771 I2C_BOARD_INFO("tw9910", 0x45),
772 },
9aa25d64
KM
773 {
774 /* 1st camera */
775 I2C_BOARD_INFO("mt9t112", 0x3c),
776 },
777 {
778 /* 2nd camera */
779 I2C_BOARD_INFO("mt9t112", 0x3c),
780 },
207efd07
KM
781};
782
783/* tw9910 */
784static int tw9910_power(struct device *dev, int mode)
785{
786 int val = mode ? 0 : 1;
787
788 gpio_set_value(GPIO_PTU2, val);
789 if (mode)
790 mdelay(100);
791
792 return 0;
793}
794
795static struct tw9910_video_info tw9910_info = {
796 .buswidth = SOCAM_DATAWIDTH_8,
797 .mpout = TW9910_MPO_FIELD,
798};
799
800static struct soc_camera_link tw9910_link = {
801 .i2c_adapter_id = 0,
802 .bus_id = 1,
803 .power = tw9910_power,
804 .board_info = &i2c_camera[0],
207efd07
KM
805 .priv = &tw9910_info,
806};
807
9aa25d64
KM
808/* mt9t112 */
809static int mt9t112_power1(struct device *dev, int mode)
810{
811 gpio_set_value(GPIO_PTA3, mode);
812 if (mode)
813 mdelay(100);
814
815 return 0;
816}
817
818static struct mt9t112_camera_info mt9t112_info1 = {
819 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
820 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
821};
822
823static struct soc_camera_link mt9t112_link1 = {
824 .i2c_adapter_id = 0,
825 .power = mt9t112_power1,
826 .bus_id = 0,
827 .board_info = &i2c_camera[1],
9aa25d64
KM
828 .priv = &mt9t112_info1,
829};
830
831static int mt9t112_power2(struct device *dev, int mode)
832{
833 gpio_set_value(GPIO_PTA4, mode);
834 if (mode)
835 mdelay(100);
836
837 return 0;
838}
839
840static struct mt9t112_camera_info mt9t112_info2 = {
841 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
842 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
843};
844
845static struct soc_camera_link mt9t112_link2 = {
846 .i2c_adapter_id = 1,
847 .power = mt9t112_power2,
848 .bus_id = 1,
849 .board_info = &i2c_camera[2],
9aa25d64
KM
850 .priv = &mt9t112_info2,
851};
207efd07
KM
852
853static struct platform_device camera_devices[] = {
854 {
855 .name = "soc-camera-pdrv",
856 .id = 0,
857 .dev = {
858 .platform_data = &tw9910_link,
859 },
860 },
9aa25d64
KM
861 {
862 .name = "soc-camera-pdrv",
863 .id = 1,
864 .dev = {
865 .platform_data = &mt9t112_link1,
866 },
867 },
868 {
869 .name = "soc-camera-pdrv",
870 .id = 2,
871 .dev = {
872 .platform_data = &mt9t112_link2,
873 },
874 },
207efd07
KM
875};
876
1980fdc4 877/* FSI */
3ce09334 878static struct sh_fsi_platform_info fsi_info = {
fec691e7
KM
879 .port_b = {
880 .flags = SH_FSI_BRS_INV,
881 },
1980fdc4
KM
882};
883
884static struct resource fsi_resources[] = {
885 [0] = {
886 .name = "FSI",
887 .start = 0xFE3C0000,
888 .end = 0xFE3C021d,
889 .flags = IORESOURCE_MEM,
890 },
891 [1] = {
9307d115 892 .start = evt2irq(0xf80),
1980fdc4
KM
893 .flags = IORESOURCE_IRQ,
894 },
895};
896
897static struct platform_device fsi_device = {
898 .name = "sh_fsi",
899 .id = 0,
900 .num_resources = ARRAY_SIZE(fsi_resources),
901 .resource = fsi_resources,
902 .dev = {
903 .platform_data = &fsi_info,
904 },
1980fdc4
KM
905};
906
064bfada
KM
907static struct asoc_simple_dai_init_info fsi_da7210_init_info = {
908 .fmt = SND_SOC_DAIFMT_I2S,
909 .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
910 .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
911};
912
913static struct asoc_simple_card_info fsi_da7210_info = {
914 .name = "DA7210",
915 .card = "FSIB-DA7210",
916 .cpu_dai = "fsib-dai",
917 .codec = "da7210.0-001a",
918 .platform = "sh_fsi.0",
919 .codec_dai = "da7210-hifi",
920 .init = &fsi_da7210_init_info,
921};
922
923static struct platform_device fsi_da7210_device = {
924 .name = "asoc-simple-card",
925 .dev = {
926 .platform_data = &fsi_da7210_info,
927 },
928};
929
930
26365716
KM
931/* IrDA */
932static struct resource irda_resources[] = {
933 [0] = {
934 .name = "IrDA",
935 .start = 0xA45D0000,
936 .end = 0xA45D0049,
937 .flags = IORESOURCE_MEM,
938 },
939 [1] = {
9307d115 940 .start = evt2irq(0x480),
26365716
KM
941 .flags = IORESOURCE_IRQ,
942 },
943};
944
945static struct platform_device irda_device = {
946 .name = "sh_sir",
947 .num_resources = ARRAY_SIZE(irda_resources),
948 .resource = irda_resources,
949};
950
aee5ab0b
GL
951#include <media/ak881x.h>
952#include <media/sh_vou.h>
953
3ce09334 954static struct ak881x_pdata ak881x_pdata = {
aee5ab0b
GL
955 .flags = AK881X_IF_MODE_SLAVE,
956};
957
958static struct i2c_board_info ak8813 = {
959 I2C_BOARD_INFO("ak8813", 0x20),
960 .platform_data = &ak881x_pdata,
961};
962
3ce09334 963static struct sh_vou_pdata sh_vou_pdata = {
aee5ab0b
GL
964 .bus_fmt = SH_VOU_BUS_8BIT,
965 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
966 .board_info = &ak8813,
967 .i2c_adap = 0,
aee5ab0b
GL
968};
969
970static struct resource sh_vou_resources[] = {
971 [0] = {
972 .start = 0xfe960000,
973 .end = 0xfe962043,
974 .flags = IORESOURCE_MEM,
975 },
976 [1] = {
9307d115 977 .start = evt2irq(0x8e0),
aee5ab0b
GL
978 .flags = IORESOURCE_IRQ,
979 },
980};
981
982static struct platform_device vou_device = {
983 .name = "sh-vou",
984 .id = -1,
985 .num_resources = ARRAY_SIZE(sh_vou_resources),
986 .resource = sh_vou_resources,
987 .dev = {
988 .platform_data = &sh_vou_pdata,
989 },
aee5ab0b
GL
990};
991
5744c881 992#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1238c684 993/* SH_MMCIF */
1238c684
YG
994static void mmcif_down_pwr(struct platform_device *pdev)
995{
d4c191df 996 cn12_set_pwr(pdev, 0);
1238c684
YG
997}
998
999static struct resource sh_mmcif_resources[] = {
1000 [0] = {
1001 .name = "SH_MMCIF",
1002 .start = 0xA4CA0000,
1003 .end = 0xA4CA00FF,
1004 .flags = IORESOURCE_MEM,
1005 },
1006 [1] = {
1007 /* MMC2I */
9307d115 1008 .start = evt2irq(0x5a0),
1238c684
YG
1009 .flags = IORESOURCE_IRQ,
1010 },
1011 [2] = {
1012 /* MMC3I */
9307d115 1013 .start = evt2irq(0x5c0),
1238c684
YG
1014 .flags = IORESOURCE_IRQ,
1015 },
1016};
1017
3ce09334 1018static struct sh_mmcif_plat_data sh_mmcif_plat = {
d4c191df 1019 .set_pwr = cn12_set_pwr,
1238c684
YG
1020 .down_pwr = mmcif_down_pwr,
1021 .sup_pclk = 0, /* SH7724: Max Pclk/2 */
1022 .caps = MMC_CAP_4_BIT_DATA |
1023 MMC_CAP_8_BIT_DATA |
1024 MMC_CAP_NEEDS_POLL,
1025 .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
1026};
1027
1028static struct platform_device sh_mmcif_device = {
1029 .name = "sh_mmcif",
1030 .id = 0,
1031 .dev = {
1032 .platform_data = &sh_mmcif_plat,
1033 },
1034 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
1035 .resource = sh_mmcif_resources,
1036};
1037#endif
1038
4138b740
KM
1039static struct platform_device *ecovec_devices[] __initdata = {
1040 &heartbeat_device,
1041 &nor_flash_device,
35a35408 1042 &sh_eth_device,
907050a3 1043 &usb0_host_device,
3714a9a0 1044 &usb1_common_device,
fb2e7394 1045 &usbhs_device,
fa3ba51b 1046 &lcdc_device,
2153ad32
KM
1047 &ceu0_device,
1048 &ceu1_device,
e9103e74 1049 &keysc_device,
d4c191df 1050 &cn12_power,
5744c881 1051#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
d4c191df 1052 &sdhi0_power,
96987d96 1053 &sdhi0_device,
5744c881 1054#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
96987d96 1055 &sdhi1_device,
1238c684 1056#endif
1ce4da7a
MD
1057#else
1058 &msiof0_device,
1059#endif
207efd07 1060 &camera_devices[0],
9aa25d64
KM
1061 &camera_devices[1],
1062 &camera_devices[2],
1980fdc4 1063 &fsi_device,
064bfada 1064 &fsi_da7210_device,
26365716 1065 &irda_device,
aee5ab0b 1066 &vou_device,
5744c881 1067#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1238c684
YG
1068 &sh_mmcif_device,
1069#endif
4138b740
KM
1070};
1071
6b3b5575 1072#ifdef CONFIG_I2C
4907d57f
KM
1073#define EEPROM_ADDR 0x50
1074static u8 mac_read(struct i2c_adapter *a, u8 command)
1075{
1076 struct i2c_msg msg[2];
1077 u8 buf;
1078 int ret;
1079
1080 msg[0].addr = EEPROM_ADDR;
1081 msg[0].flags = 0;
1082 msg[0].len = 1;
1083 msg[0].buf = &command;
1084
1085 msg[1].addr = EEPROM_ADDR;
1086 msg[1].flags = I2C_M_RD;
1087 msg[1].len = 1;
1088 msg[1].buf = &buf;
1089
1090 ret = i2c_transfer(a, msg, 2);
1091 if (ret < 0) {
1092 printk(KERN_ERR "error %d\n", ret);
1093 buf = 0xff;
1094 }
1095
1096 return buf;
1097}
1098
376abbb4 1099static void __init sh_eth_init(struct sh_eth_plat_data *pd)
4907d57f
KM
1100{
1101 struct i2c_adapter *a = i2c_get_adapter(1);
4907d57f
KM
1102 int i;
1103
1104 if (!a) {
1105 pr_err("can not get I2C 1\n");
1106 return;
1107 }
1108
25985edc 1109 /* read MAC address from EEPROM */
376abbb4
MD
1110 for (i = 0; i < sizeof(pd->mac_addr); i++) {
1111 pd->mac_addr[i] = mac_read(a, 0x10 + i);
4907d57f
KM
1112 msleep(10);
1113 }
b230eb32
KM
1114
1115 i2c_put_adapter(a);
4907d57f 1116}
6b3b5575
MD
1117#else
1118static void __init sh_eth_init(struct sh_eth_plat_data *pd)
1119{
1120 pr_err("unable to read sh_eth MAC address\n");
1121}
1122#endif
4907d57f 1123
fa3ba51b 1124#define PORT_HIZA 0xA4050158
ea15edb2 1125#define IODRIVEA 0xA405018A
eb0cd9e8
MD
1126
1127extern char ecovec24_sdram_enter_start;
1128extern char ecovec24_sdram_enter_end;
1129extern char ecovec24_sdram_leave_start;
1130extern char ecovec24_sdram_leave_end;
1131
4907d57f 1132static int __init arch_setup(void)
4138b740 1133{
1980fdc4 1134 struct clk *clk;
4eb80146 1135 bool cn12_enabled = false;
1980fdc4 1136
eb0cd9e8 1137 /* register board specific self-refresh code */
2839bd61
MD
1138 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
1139 SUSP_SH_RSTANDBY,
eb0cd9e8
MD
1140 &ecovec24_sdram_enter_start,
1141 &ecovec24_sdram_enter_end,
1142 &ecovec24_sdram_leave_start,
1143 &ecovec24_sdram_leave_end);
1144
f78bab30
MD
1145 /* enable STATUS0, STATUS2 and PDSTATUS */
1146 gpio_request(GPIO_FN_STATUS0, NULL);
1147 gpio_request(GPIO_FN_STATUS2, NULL);
1148 gpio_request(GPIO_FN_PDSTATUS, NULL);
1149
4138b740
KM
1150 /* enable SCIFA0 */
1151 gpio_request(GPIO_FN_SCIF0_TXD, NULL);
1152 gpio_request(GPIO_FN_SCIF0_RXD, NULL);
4138b740
KM
1153
1154 /* enable debug LED */
1155 gpio_request(GPIO_PTG0, NULL);
1156 gpio_request(GPIO_PTG1, NULL);
1157 gpio_request(GPIO_PTG2, NULL);
1158 gpio_request(GPIO_PTG3, NULL);
b7056bc1
KM
1159 gpio_direction_output(GPIO_PTG0, 0);
1160 gpio_direction_output(GPIO_PTG1, 0);
1161 gpio_direction_output(GPIO_PTG2, 0);
1162 gpio_direction_output(GPIO_PTG3, 0);
9d56dd3b 1163 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
4138b740 1164
35a35408
KM
1165 /* enable SH-Eth */
1166 gpio_request(GPIO_PTA1, NULL);
1167 gpio_direction_output(GPIO_PTA1, 1);
1168 mdelay(20);
1169
1170 gpio_request(GPIO_FN_RMII_RXD0, NULL);
1171 gpio_request(GPIO_FN_RMII_RXD1, NULL);
1172 gpio_request(GPIO_FN_RMII_TXD0, NULL);
1173 gpio_request(GPIO_FN_RMII_TXD1, NULL);
1174 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
1175 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
1176 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
1177 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
1178 gpio_request(GPIO_FN_MDIO, NULL);
1179 gpio_request(GPIO_FN_MDC, NULL);
1180 gpio_request(GPIO_FN_LNKSTA, NULL);
1181
907050a3 1182 /* enable USB */
9d56dd3b
PM
1183 __raw_writew(0x0000, 0xA4D80000);
1184 __raw_writew(0x0000, 0xA4D90000);
907050a3
KM
1185 gpio_request(GPIO_PTB3, NULL);
1186 gpio_request(GPIO_PTB4, NULL);
1187 gpio_request(GPIO_PTB5, NULL);
1188 gpio_direction_input(GPIO_PTB3);
1189 gpio_direction_output(GPIO_PTB4, 0);
1190 gpio_direction_output(GPIO_PTB5, 0);
9d56dd3b
PM
1191 __raw_writew(0x0600, 0xa40501d4);
1192 __raw_writew(0x0600, 0xa4050192);
907050a3 1193
3714a9a0
KM
1194 if (gpio_get_value(GPIO_PTB3)) {
1195 printk(KERN_INFO "USB1 function is selected\n");
1196 usb1_common_device.name = "r8a66597_udc";
1197 } else {
1198 printk(KERN_INFO "USB1 host is selected\n");
1199 usb1_common_device.name = "r8a66597_hcd";
1200 }
1201
fa3ba51b
KM
1202 /* enable LCDC */
1203 gpio_request(GPIO_FN_LCDD23, NULL);
1204 gpio_request(GPIO_FN_LCDD22, NULL);
1205 gpio_request(GPIO_FN_LCDD21, NULL);
1206 gpio_request(GPIO_FN_LCDD20, NULL);
1207 gpio_request(GPIO_FN_LCDD19, NULL);
1208 gpio_request(GPIO_FN_LCDD18, NULL);
1209 gpio_request(GPIO_FN_LCDD17, NULL);
1210 gpio_request(GPIO_FN_LCDD16, NULL);
1211 gpio_request(GPIO_FN_LCDD15, NULL);
1212 gpio_request(GPIO_FN_LCDD14, NULL);
1213 gpio_request(GPIO_FN_LCDD13, NULL);
1214 gpio_request(GPIO_FN_LCDD12, NULL);
1215 gpio_request(GPIO_FN_LCDD11, NULL);
1216 gpio_request(GPIO_FN_LCDD10, NULL);
1217 gpio_request(GPIO_FN_LCDD9, NULL);
1218 gpio_request(GPIO_FN_LCDD8, NULL);
1219 gpio_request(GPIO_FN_LCDD7, NULL);
1220 gpio_request(GPIO_FN_LCDD6, NULL);
1221 gpio_request(GPIO_FN_LCDD5, NULL);
1222 gpio_request(GPIO_FN_LCDD4, NULL);
1223 gpio_request(GPIO_FN_LCDD3, NULL);
1224 gpio_request(GPIO_FN_LCDD2, NULL);
1225 gpio_request(GPIO_FN_LCDD1, NULL);
1226 gpio_request(GPIO_FN_LCDD0, NULL);
1227 gpio_request(GPIO_FN_LCDDISP, NULL);
1228 gpio_request(GPIO_FN_LCDHSYN, NULL);
1229 gpio_request(GPIO_FN_LCDDCK, NULL);
1230 gpio_request(GPIO_FN_LCDVSYN, NULL);
1231 gpio_request(GPIO_FN_LCDDON, NULL);
1232 gpio_request(GPIO_FN_LCDLCLK, NULL);
9d56dd3b 1233 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
fa3ba51b
KM
1234
1235 gpio_request(GPIO_PTE6, NULL);
1236 gpio_request(GPIO_PTU1, NULL);
1237 gpio_request(GPIO_PTR1, NULL);
1238 gpio_request(GPIO_PTA2, NULL);
1239 gpio_direction_input(GPIO_PTE6);
1240 gpio_direction_output(GPIO_PTU1, 0);
1241 gpio_direction_output(GPIO_PTR1, 0);
1242 gpio_direction_output(GPIO_PTA2, 0);
1243
82b33221 1244 /* I/O buffer drive ability is high */
9d56dd3b 1245 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
ea15edb2 1246
fa3ba51b
KM
1247 if (gpio_get_value(GPIO_PTE6)) {
1248 /* DVI */
1249 lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
44432407 1250 lcdc_info.ch[0].clock_divider = 1;
93ff2598
LP
1251 lcdc_info.ch[0].lcd_modes = ecovec_dvi_modes;
1252 lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_dvi_modes);
fa3ba51b
KM
1253
1254 gpio_set_value(GPIO_PTA2, 1);
1255 gpio_set_value(GPIO_PTU1, 1);
1256 } else {
1257 /* Panel */
ea15edb2 1258 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
44432407 1259 lcdc_info.ch[0].clock_divider = 2;
93ff2598
LP
1260 lcdc_info.ch[0].lcd_modes = ecovec_lcd_modes;
1261 lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_lcd_modes);
ea15edb2
KM
1262
1263 gpio_set_value(GPIO_PTR1, 1);
1264
1265 /* FIXME
1266 *
1267 * LCDDON control is needed for Panel,
1268 * but current sh_mobile_lcdc driver doesn't control it.
1269 * It is temporary correspondence
1270 */
1271 gpio_request(GPIO_PTF4, NULL);
1272 gpio_direction_output(GPIO_PTF4, 1);
8810e055
KM
1273
1274 /* enable TouchScreen */
1275 i2c_register_board_info(0, &ts_i2c_clients, 1);
fcb8918f 1276 irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
fa3ba51b
KM
1277 }
1278
2153ad32
KM
1279 /* enable CEU0 */
1280 gpio_request(GPIO_FN_VIO0_D15, NULL);
1281 gpio_request(GPIO_FN_VIO0_D14, NULL);
1282 gpio_request(GPIO_FN_VIO0_D13, NULL);
1283 gpio_request(GPIO_FN_VIO0_D12, NULL);
1284 gpio_request(GPIO_FN_VIO0_D11, NULL);
1285 gpio_request(GPIO_FN_VIO0_D10, NULL);
1286 gpio_request(GPIO_FN_VIO0_D9, NULL);
1287 gpio_request(GPIO_FN_VIO0_D8, NULL);
1288 gpio_request(GPIO_FN_VIO0_D7, NULL);
1289 gpio_request(GPIO_FN_VIO0_D6, NULL);
1290 gpio_request(GPIO_FN_VIO0_D5, NULL);
1291 gpio_request(GPIO_FN_VIO0_D4, NULL);
1292 gpio_request(GPIO_FN_VIO0_D3, NULL);
1293 gpio_request(GPIO_FN_VIO0_D2, NULL);
1294 gpio_request(GPIO_FN_VIO0_D1, NULL);
1295 gpio_request(GPIO_FN_VIO0_D0, NULL);
1296 gpio_request(GPIO_FN_VIO0_VD, NULL);
1297 gpio_request(GPIO_FN_VIO0_CLK, NULL);
1298 gpio_request(GPIO_FN_VIO0_FLD, NULL);
1299 gpio_request(GPIO_FN_VIO0_HD, NULL);
1300 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
1301
1302 /* enable CEU1 */
1303 gpio_request(GPIO_FN_VIO1_D7, NULL);
1304 gpio_request(GPIO_FN_VIO1_D6, NULL);
1305 gpio_request(GPIO_FN_VIO1_D5, NULL);
1306 gpio_request(GPIO_FN_VIO1_D4, NULL);
1307 gpio_request(GPIO_FN_VIO1_D3, NULL);
1308 gpio_request(GPIO_FN_VIO1_D2, NULL);
1309 gpio_request(GPIO_FN_VIO1_D1, NULL);
1310 gpio_request(GPIO_FN_VIO1_D0, NULL);
1311 gpio_request(GPIO_FN_VIO1_FLD, NULL);
1312 gpio_request(GPIO_FN_VIO1_HD, NULL);
1313 gpio_request(GPIO_FN_VIO1_VD, NULL);
1314 gpio_request(GPIO_FN_VIO1_CLK, NULL);
1315 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
1316
e9103e74
KM
1317 /* enable KEYSC */
1318 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
1319 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
1320 gpio_request(GPIO_FN_KEYOUT3, NULL);
1321 gpio_request(GPIO_FN_KEYOUT2, NULL);
1322 gpio_request(GPIO_FN_KEYOUT1, NULL);
1323 gpio_request(GPIO_FN_KEYOUT0, NULL);
1324 gpio_request(GPIO_FN_KEYIN0, NULL);
1325
064a16dc
KM
1326 /* enable user debug switch */
1327 gpio_request(GPIO_PTR0, NULL);
1328 gpio_request(GPIO_PTR4, NULL);
1329 gpio_request(GPIO_PTR5, NULL);
1330 gpio_request(GPIO_PTR6, NULL);
1331 gpio_direction_input(GPIO_PTR0);
1332 gpio_direction_input(GPIO_PTR4);
1333 gpio_direction_input(GPIO_PTR5);
1334 gpio_direction_input(GPIO_PTR6);
1335
4eb80146
GL
1336 /* SD-card slot CN11 */
1337 /* Card-detect, used on CN11, either with SDHI0 or with SPI */
1338 gpio_request(GPIO_PTY7, NULL);
1339 gpio_direction_input(GPIO_PTY7);
1340
5744c881 1341#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1ce4da7a 1342 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
96987d96
KM
1343 gpio_request(GPIO_FN_SDHI0WP, NULL);
1344 gpio_request(GPIO_FN_SDHI0CMD, NULL);
1345 gpio_request(GPIO_FN_SDHI0CLK, NULL);
1346 gpio_request(GPIO_FN_SDHI0D3, NULL);
1347 gpio_request(GPIO_FN_SDHI0D2, NULL);
1348 gpio_request(GPIO_FN_SDHI0D1, NULL);
1349 gpio_request(GPIO_FN_SDHI0D0, NULL);
1ce4da7a
MD
1350#else
1351 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1352 gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1353 gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1354 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1355 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
1356 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
1357 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1358 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1359 gpio_request(GPIO_PTY6, NULL); /* write protect */
1360 gpio_direction_input(GPIO_PTY6);
1ce4da7a
MD
1361
1362 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1363#endif
96987d96 1364
4eb80146
GL
1365 /* MMC/SD-card slot CN12 */
1366#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1367 /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
1368 gpio_request(GPIO_FN_MMC_D7, NULL);
1369 gpio_request(GPIO_FN_MMC_D6, NULL);
1370 gpio_request(GPIO_FN_MMC_D5, NULL);
1371 gpio_request(GPIO_FN_MMC_D4, NULL);
1372 gpio_request(GPIO_FN_MMC_D3, NULL);
1373 gpio_request(GPIO_FN_MMC_D2, NULL);
1374 gpio_request(GPIO_FN_MMC_D1, NULL);
1375 gpio_request(GPIO_FN_MMC_D0, NULL);
1376 gpio_request(GPIO_FN_MMC_CLK, NULL);
1377 gpio_request(GPIO_FN_MMC_CMD, NULL);
4eb80146
GL
1378
1379 cn12_enabled = true;
1380#elif defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1381 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
1382 gpio_request(GPIO_FN_SDHI1WP, NULL);
1383 gpio_request(GPIO_FN_SDHI1CMD, NULL);
1384 gpio_request(GPIO_FN_SDHI1CLK, NULL);
1385 gpio_request(GPIO_FN_SDHI1D3, NULL);
1386 gpio_request(GPIO_FN_SDHI1D2, NULL);
1387 gpio_request(GPIO_FN_SDHI1D1, NULL);
1388 gpio_request(GPIO_FN_SDHI1D0, NULL);
4eb80146
GL
1389
1390 /* Card-detect, used on CN12 with SDHI1 */
1391 gpio_request(GPIO_PTW7, NULL);
1392 gpio_direction_input(GPIO_PTW7);
1393
1394 cn12_enabled = true;
1395#endif
1396
1397 if (cn12_enabled)
1398 /* I/O buffer drive ability is high for CN12 */
1399 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000,
1400 IODRIVEA);
1401
207efd07
KM
1402 /* enable Video */
1403 gpio_request(GPIO_PTU2, NULL);
1404 gpio_direction_output(GPIO_PTU2, 1);
1405
9aa25d64
KM
1406 /* enable Camera */
1407 gpio_request(GPIO_PTA3, NULL);
1408 gpio_request(GPIO_PTA4, NULL);
1409 gpio_direction_output(GPIO_PTA3, 0);
1410 gpio_direction_output(GPIO_PTA4, 0);
1411
1980fdc4
KM
1412 /* enable FSI */
1413 gpio_request(GPIO_FN_FSIMCKB, NULL);
1414 gpio_request(GPIO_FN_FSIIBSD, NULL);
1415 gpio_request(GPIO_FN_FSIOBSD, NULL);
1416 gpio_request(GPIO_FN_FSIIBBCK, NULL);
1417 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
1418 gpio_request(GPIO_FN_FSIOBBCK, NULL);
1419 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
1420 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1421
16afc9fb
KM
1422 /* set SPU2 clock to 83.4 MHz */
1423 clk = clk_get(NULL, "spu_clk");
56ea5109 1424 if (!IS_ERR(clk)) {
10305853
KM
1425 clk_set_rate(clk, clk_round_rate(clk, 83333333));
1426 clk_put(clk);
1427 }
16afc9fb 1428
1980fdc4
KM
1429 /* change parent of FSI B */
1430 clk = clk_get(NULL, "fsib_clk");
56ea5109 1431 if (!IS_ERR(clk)) {
4bd5d259
KM
1432 /* 48kHz dummy clock was used to make sure 1/1 divide */
1433 clk_set_rate(&sh7724_fsimckb_clk, 48000);
1434 clk_set_parent(clk, &sh7724_fsimckb_clk);
1435 clk_set_rate(clk, 48000);
10305853
KM
1436 clk_put(clk);
1437 }
1980fdc4
KM
1438
1439 gpio_request(GPIO_PTU0, NULL);
1440 gpio_direction_output(GPIO_PTU0, 0);
1441 mdelay(20);
1442
ea440783
NH
1443 /* enable motion sensor */
1444 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1445 gpio_direction_input(GPIO_FN_INTC_IRQ1);
1446
6f26d19f
MD
1447 /* set VPU clock to 166 MHz */
1448 clk = clk_get(NULL, "vpu_clk");
56ea5109 1449 if (!IS_ERR(clk)) {
10305853
KM
1450 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1451 clk_put(clk);
1452 }
6f26d19f 1453
26365716
KM
1454 /* enable IrDA */
1455 gpio_request(GPIO_FN_IRDA_OUT, NULL);
1456 gpio_request(GPIO_FN_IRDA_IN, NULL);
1457 gpio_request(GPIO_PTU5, NULL);
1458 gpio_direction_output(GPIO_PTU5, 0);
1459
125ecce6 1460 /* enable I2C device */
1980fdc4
KM
1461 i2c_register_board_info(0, i2c0_devices,
1462 ARRAY_SIZE(i2c0_devices));
1463
125ecce6
KM
1464 i2c_register_board_info(1, i2c1_devices,
1465 ARRAY_SIZE(i2c1_devices));
1466
92359a70 1467#if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
aee5ab0b
GL
1468 /* VOU */
1469 gpio_request(GPIO_FN_DV_D15, NULL);
1470 gpio_request(GPIO_FN_DV_D14, NULL);
1471 gpio_request(GPIO_FN_DV_D13, NULL);
1472 gpio_request(GPIO_FN_DV_D12, NULL);
1473 gpio_request(GPIO_FN_DV_D11, NULL);
1474 gpio_request(GPIO_FN_DV_D10, NULL);
1475 gpio_request(GPIO_FN_DV_D9, NULL);
1476 gpio_request(GPIO_FN_DV_D8, NULL);
1477 gpio_request(GPIO_FN_DV_CLKI, NULL);
1478 gpio_request(GPIO_FN_DV_CLK, NULL);
1479 gpio_request(GPIO_FN_DV_VSYNC, NULL);
1480 gpio_request(GPIO_FN_DV_HSYNC, NULL);
1481
1482 /* AK8813 power / reset sequence */
1483 gpio_request(GPIO_PTG4, NULL);
1484 gpio_request(GPIO_PTU3, NULL);
1485 /* Reset */
1486 gpio_direction_output(GPIO_PTG4, 0);
1487 /* Power down */
1488 gpio_direction_output(GPIO_PTU3, 1);
1489
1490 udelay(10);
1491
1492 /* Power up, reset */
1493 gpio_set_value(GPIO_PTU3, 0);
1494
1495 udelay(10);
1496
1497 /* Remove reset */
1498 gpio_set_value(GPIO_PTG4, 1);
92359a70 1499#endif
aee5ab0b 1500
4138b740
KM
1501 return platform_add_devices(ecovec_devices,
1502 ARRAY_SIZE(ecovec_devices));
1503}
4907d57f
KM
1504arch_initcall(arch_setup);
1505
1506static int __init devices_setup(void)
1507{
376abbb4 1508 sh_eth_init(&sh_eth_plat);
4907d57f
KM
1509 return 0;
1510}
1511device_initcall(devices_setup);
1512
4138b740
KM
1513static struct sh_machine_vector mv_ecovec __initmv = {
1514 .mv_name = "R0P7724 (EcoVec)",
1515};