]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - arch/sh/boards/mach-ecovec24/setup.c
projects / mirror_ubuntu-artful-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branch 'sh/stable-updates'
[mirror_ubuntu-artful-kernel.git] / arch / sh / boards / mach-ecovec24 / setup.c
CommitLineData
4138b740
KM		 1/*
2 * Copyright (C) 2009 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/device.h>
13#include <linux/platform_device.h>
14#include <linux/mtd/physmap.h>
15#include <linux/gpio.h>
16#include <linux/interrupt.h>
35a35408
KM		 17#include <linux/io.h>
18#include <linux/delay.h>
907050a3 19#include <linux/usb/r8a66597.h>
4907d57f 20#include <linux/i2c.h>
8810e055 21#include <linux/i2c/tsc2007.h>
e9103e74 22#include <linux/input.h>
fa3ba51b 23#include <video/sh_mobile_lcdc.h>
2153ad32 24#include <media/sh_mobile_ceu.h>
4138b740 25#include <asm/heartbeat.h>
35a35408 26#include <asm/sh_eth.h>
e9103e74 27#include <asm/sh_keysc.h>
a991801a 28#include <asm/clock.h>
4138b740
KM		 29#include <cpu/sh7724.h>
30
31/*
b7056bc1
KM		 32 * Address Interface BusWidth
33 *-----------------------------------------
34 * 0x0000_0000 uboot 16bit
35 * 0x0004_0000 Linux romImage 16bit
36 * 0x0014_0000 MTD for Linux 16bit
37 * 0x0400_0000 Internal I/O 16/32bit
38 * 0x0800_0000 DRAM 32bit
39 * 0x1800_0000 MFI 16bit
4138b740
KM		 40 */
41
9c472c4d
KM		 42/* SWITCH
43 *------------------------------
44 * DS2[1] = FlashROM write protect ON : write protect
45 * OFF : No write protect
46 * DS2[2] = RMII / TS, SCIF ON : RMII
47 * OFF : TS, SCIF3
48 * DS2[3] = Camera / Video ON : Camera
49 * OFF : NTSC/PAL (IN)
50 * DS2[5] = NTSC_OUT Clock ON : On board OSC
51 * OFF : SH7724 DV_CLK
52 * DS2[6-7] = MMC / SD ON-OFF : SD
53 * OFF-ON : MMC
54 */
55
4138b740
KM		 56/* Heartbeat */
57static unsigned char led_pos[] = { 0, 1, 2, 3 };
58static struct heartbeat_data heartbeat_data = {
59 .regsize = 8,
60 .nr_bits = 4,
61 .bit_pos = led_pos,
62};
63
64static struct resource heartbeat_resources[] = {
65 [0] = {
66 .start = 0xA405012C, /* PTG */
67 .end = 0xA405012E - 1,
68 .flags = IORESOURCE_MEM,
69 },
70};
71
72static struct platform_device heartbeat_device = {
73 .name = "heartbeat",
74 .id = -1,
75 .dev = {
76 .platform_data = &heartbeat_data,
77 },
78 .num_resources = ARRAY_SIZE(heartbeat_resources),
79 .resource = heartbeat_resources,
80};
81
82/* MTD */
83static struct mtd_partition nor_flash_partitions[] = {
84 {
b7056bc1 85 .name = "boot loader",
4138b740 86 .offset = 0,
b7056bc1 87 .size = (5 * 1024 * 1024),
d5ce010c 88 .mask_flags = MTD_WRITEABLE, /* force read-only */
4138b740
KM		 89 }, {
90 .name = "free-area",
91 .offset = MTDPART_OFS_APPEND,
92 .size = MTDPART_SIZ_FULL,
93 },
94};
95
96static struct physmap_flash_data nor_flash_data = {
97 .width = 2,
98 .parts = nor_flash_partitions,
99 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
100};
101
102static struct resource nor_flash_resources[] = {
103 [0] = {
104 .name = "NOR Flash",
105 .start = 0x00000000,
106 .end = 0x03ffffff,
107 .flags = IORESOURCE_MEM,
108 }
109};
110
111static struct platform_device nor_flash_device = {
112 .name = "physmap-flash",
113 .resource = nor_flash_resources,
114 .num_resources = ARRAY_SIZE(nor_flash_resources),
115 .dev = {
116 .platform_data = &nor_flash_data,
117 },
118};
119
35a35408
KM		 120/* SH Eth */
121#define SH_ETH_ADDR (0xA4600000)
122#define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0)
123#define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8)
124static struct resource sh_eth_resources[] = {
125 [0] = {
126 .start = SH_ETH_ADDR,
127 .end = SH_ETH_ADDR + 0x1FC,
128 .flags = IORESOURCE_MEM,
129 },
130 [1] = {
131 .start = 91,
132 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
133 },
134};
135
136struct sh_eth_plat_data sh_eth_plat = {
137 .phy = 0x1f, /* SMSC LAN8700 */
138 .edmac_endian = EDMAC_LITTLE_ENDIAN,
acf3cc28 139 .ether_link_active_low = 1
35a35408
KM		 140};
141
142static struct platform_device sh_eth_device = {
143 .name = "sh-eth",
144 .id = 0,
145 .dev = {
146 .platform_data = &sh_eth_plat,
147 },
148 .num_resources = ARRAY_SIZE(sh_eth_resources),
149 .resource = sh_eth_resources,
150};
151
907050a3
KM		 152/* USB0 host */
153void usb0_port_power(int port, int power)
154{
155 gpio_set_value(GPIO_PTB4, power);
156}
157
158static struct r8a66597_platdata usb0_host_data = {
159 .on_chip = 1,
160 .port_power = usb0_port_power,
161};
162
163static struct resource usb0_host_resources[] = {
164 [0] = {
165 .start = 0xa4d80000,
166 .end = 0xa4d80124 - 1,
167 .flags = IORESOURCE_MEM,
168 },
169 [1] = {
170 .start = 65,
171 .end = 65,
172 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
173 },
174};
175
176static struct platform_device usb0_host_device = {
177 .name = "r8a66597_hcd",
178 .id = 0,
179 .dev = {
180 .dma_mask = NULL, /* not use dma */
181 .coherent_dma_mask = 0xffffffff,
182 .platform_data = &usb0_host_data,
183 },
184 .num_resources = ARRAY_SIZE(usb0_host_resources),
185 .resource = usb0_host_resources,
186};
187
188/*
189 * USB1
190 *
191 * CN5 can use both host/function,
192 * and we can determine it by checking PTB[3]
193 *
194 * This time only USB1 host is supported.
195 */
196void usb1_port_power(int port, int power)
197{
198 if (!gpio_get_value(GPIO_PTB3)) {
199 printk(KERN_ERR "USB1 function is not supported\n");
200 return;
201 }
202
203 gpio_set_value(GPIO_PTB5, power);
204}
205
206static struct r8a66597_platdata usb1_host_data = {
207 .on_chip = 1,
208 .port_power = usb1_port_power,
209};
210
211static struct resource usb1_host_resources[] = {
212 [0] = {
213 .start = 0xa4d90000,
214 .end = 0xa4d90124 - 1,
215 .flags = IORESOURCE_MEM,
216 },
217 [1] = {
218 .start = 66,
219 .end = 66,
220 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
221 },
222};
223
224static struct platform_device usb1_host_device = {
225 .name = "r8a66597_hcd",
226 .id = 1,
227 .dev = {
228 .dma_mask = NULL, /* not use dma */
229 .coherent_dma_mask = 0xffffffff,
230 .platform_data = &usb1_host_data,
231 },
232 .num_resources = ARRAY_SIZE(usb1_host_resources),
233 .resource = usb1_host_resources,
234};
235
fa3ba51b
KM		 236/* LCDC */
237static struct sh_mobile_lcdc_info lcdc_info = {
238 .ch[0] = {
239 .interface_type = RGB18,
240 .chan = LCDC_CHAN_MAINLCD,
241 .bpp = 16,
fa3ba51b
KM		 242 .lcd_cfg = {
243 .sync = 0, /* hsync and vsync are active low */
244 },
245 .lcd_size_cfg = { /* 7.0 inch */
246 .width = 152,
247 .height = 91,
248 },
249 .board_cfg = {
250 },
251 }
252};
253
254static struct resource lcdc_resources[] = {
255 [0] = {
256 .name = "LCDC",
257 .start = 0xfe940000,
a6f15ade 258 .end = 0xfe942fff,
fa3ba51b
KM		 259 .flags = IORESOURCE_MEM,
260 },
261 [1] = {
262 .start = 106,
263 .flags = IORESOURCE_IRQ,
264 },
265};
266
267static struct platform_device lcdc_device = {
268 .name = "sh_mobile_lcdc_fb",
269 .num_resources = ARRAY_SIZE(lcdc_resources),
270 .resource = lcdc_resources,
271 .dev = {
272 .platform_data = &lcdc_info,
273 },
274 .archdata = {
275 .hwblk_id = HWBLK_LCDC,
276 },
277};
278
2153ad32
KM		 279/* CEU0 */
280static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
281 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
282};
283
284static struct resource ceu0_resources[] = {
285 [0] = {
286 .name = "CEU0",
287 .start = 0xfe910000,
288 .end = 0xfe91009f,
289 .flags = IORESOURCE_MEM,
290 },
291 [1] = {
292 .start = 52,
293 .flags = IORESOURCE_IRQ,
294 },
295 [2] = {
296 /* place holder for contiguous memory */
297 },
298};
299
300static struct platform_device ceu0_device = {
301 .name = "sh_mobile_ceu",
302 .id = 0, /* "ceu0" clock */
303 .num_resources = ARRAY_SIZE(ceu0_resources),
304 .resource = ceu0_resources,
305 .dev = {
306 .platform_data = &sh_mobile_ceu0_info,
307 },
308 .archdata = {
309 .hwblk_id = HWBLK_CEU0,
310 },
311};
312
313/* CEU1 */
314static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
315 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
316};
317
318static struct resource ceu1_resources[] = {
319 [0] = {
320 .name = "CEU1",
321 .start = 0xfe914000,
322 .end = 0xfe91409f,
323 .flags = IORESOURCE_MEM,
324 },
325 [1] = {
326 .start = 63,
327 .flags = IORESOURCE_IRQ,
328 },
329 [2] = {
330 /* place holder for contiguous memory */
331 },
332};
333
334static struct platform_device ceu1_device = {
335 .name = "sh_mobile_ceu",
336 .id = 1, /* "ceu1" clock */
337 .num_resources = ARRAY_SIZE(ceu1_resources),
338 .resource = ceu1_resources,
339 .dev = {
340 .platform_data = &sh_mobile_ceu1_info,
341 },
342 .archdata = {
343 .hwblk_id = HWBLK_CEU1,
344 },
345};
346
125ecce6
KM		 347/* I2C device */
348static struct i2c_board_info i2c1_devices[] = {
349 {
350 I2C_BOARD_INFO("r2025sd", 0x32),
351 },
352};
353
e9103e74
KM		 354/* KEYSC */
355static struct sh_keysc_info keysc_info = {
356 .mode = SH_KEYSC_MODE_1,
357 .scan_timing = 3,
358 .delay = 50,
359 .kycr2_delay = 100,
360 .keycodes = { KEY_1, 0, 0, 0, 0,
361 KEY_2, 0, 0, 0, 0,
362 KEY_3, 0, 0, 0, 0,
363 KEY_4, 0, 0, 0, 0,
364 KEY_5, 0, 0, 0, 0,
365 KEY_6, 0, 0, 0, 0, },
366};
367
368static struct resource keysc_resources[] = {
369 [0] = {
370 .name = "KEYSC",
371 .start = 0x044b0000,
372 .end = 0x044b000f,
373 .flags = IORESOURCE_MEM,
374 },
375 [1] = {
376 .start = 79,
377 .flags = IORESOURCE_IRQ,
378 },
379};
380
381static struct platform_device keysc_device = {
382 .name = "sh_keysc",
383 .id = 0, /* keysc0 clock */
384 .num_resources = ARRAY_SIZE(keysc_resources),
385 .resource = keysc_resources,
386 .dev = {
387 .platform_data = &keysc_info,
388 },
389 .archdata = {
390 .hwblk_id = HWBLK_KEYSC,
391 },
392};
393
8810e055
KM		 394/* TouchScreen */
395#define IRQ0 32
396static int ts_get_pendown_state(void)
397{
398 int val = 0;
399 gpio_free(GPIO_FN_INTC_IRQ0);
400 gpio_request(GPIO_PTZ0, NULL);
401 gpio_direction_input(GPIO_PTZ0);
402
403 val = gpio_get_value(GPIO_PTZ0);
404
405 gpio_free(GPIO_PTZ0);
406 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
407
408 return val ? 0 : 1;
409}
410
411static int ts_init(void)
412{
413 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
414 return 0;
415}
416
417struct tsc2007_platform_data tsc2007_info = {
418 .model = 2007,
419 .x_plate_ohms = 180,
420 .get_pendown_state = ts_get_pendown_state,
421 .init_platform_hw = ts_init,
422};
423
424static struct i2c_board_info ts_i2c_clients = {
425 I2C_BOARD_INFO("tsc2007", 0x48),
426 .type = "tsc2007",
427 .platform_data = &tsc2007_info,
428 .irq = IRQ0,
429};
430
96987d96
KM		 431/* SHDI0 */
432static struct resource sdhi0_resources[] = {
433 [0] = {
434 .name = "SDHI0",
435 .start = 0x04ce0000,
436 .end = 0x04ce01ff,
437 .flags = IORESOURCE_MEM,
438 },
439 [1] = {
440 .start = 101,
441 .flags = IORESOURCE_IRQ,
442 },
443};
444
445static struct platform_device sdhi0_device = {
446 .name = "sh_mobile_sdhi",
447 .num_resources = ARRAY_SIZE(sdhi0_resources),
448 .resource = sdhi0_resources,
449 .id = 0,
450 .archdata = {
451 .hwblk_id = HWBLK_SDHI0,
452 },
453};
454
455/* SHDI1 */
456static struct resource sdhi1_resources[] = {
457 [0] = {
458 .name = "SDHI1",
459 .start = 0x04cf0000,
460 .end = 0x04cf01ff,
461 .flags = IORESOURCE_MEM,
462 },
463 [1] = {
464 .start = 24,
465 .flags = IORESOURCE_IRQ,
466 },
467};
468
469static struct platform_device sdhi1_device = {
470 .name = "sh_mobile_sdhi",
471 .num_resources = ARRAY_SIZE(sdhi1_resources),
472 .resource = sdhi1_resources,
473 .id = 1,
474 .archdata = {
475 .hwblk_id = HWBLK_SDHI1,
476 },
477};
478
4138b740
KM		 479static struct platform_device *ecovec_devices[] __initdata = {
480 &heartbeat_device,
481 &nor_flash_device,
35a35408 482 &sh_eth_device,
907050a3
KM		 483 &usb0_host_device,
484 &usb1_host_device, /* USB1 host support */
fa3ba51b 485 &lcdc_device,
2153ad32
KM		 486 &ceu0_device,
487 &ceu1_device,
e9103e74 488 &keysc_device,
96987d96
KM		 489 &sdhi0_device,
490 &sdhi1_device,
4138b740
KM		 491};
492
4907d57f
KM		 493#define EEPROM_ADDR 0x50
494static u8 mac_read(struct i2c_adapter *a, u8 command)
495{
496 struct i2c_msg msg[2];
497 u8 buf;
498 int ret;
499
500 msg[0].addr = EEPROM_ADDR;
501 msg[0].flags = 0;
502 msg[0].len = 1;
503 msg[0].buf = &command;
504
505 msg[1].addr = EEPROM_ADDR;
506 msg[1].flags = I2C_M_RD;
507 msg[1].len = 1;
508 msg[1].buf = &buf;
509
510 ret = i2c_transfer(a, msg, 2);
511 if (ret < 0) {
512 printk(KERN_ERR "error %d\n", ret);
513 buf = 0xff;
514 }
515
516 return buf;
517}
518
519#define MAC_LEN 6
520static void __init sh_eth_init(void)
521{
522 struct i2c_adapter *a = i2c_get_adapter(1);
523 struct clk *eth_clk;
524 u8 mac[MAC_LEN];
525 int i;
526
527 if (!a) {
528 pr_err("can not get I2C 1\n");
529 return;
530 }
531
532 eth_clk = clk_get(NULL, "eth0");
533 if (!eth_clk) {
534 pr_err("can not get eth0 clk\n");
535 return;
536 }
537
538 /* read MAC address frome EEPROM */
539 for (i = 0; i < MAC_LEN; i++) {
540 mac[i] = mac_read(a, 0x10 + i);
541 msleep(10);
542 }
543
544 /* clock enable */
545 clk_enable(eth_clk);
546
547 /* reset sh-eth */
548 ctrl_outl(0x1, SH_ETH_ADDR + 0x0);
549
550 /* set MAC addr */
551 ctrl_outl((mac[0] << 24) |
552 (mac[1] << 16) |
553 (mac[2] << 8) |
554 (mac[3] << 0), SH_ETH_MAHR);
555 ctrl_outl((mac[4] << 8) |
556 (mac[5] << 0), SH_ETH_MALR);
557
558 clk_put(eth_clk);
559}
560
fa3ba51b 561#define PORT_HIZA 0xA4050158
ea15edb2 562#define IODRIVEA 0xA405018A
4907d57f 563static int __init arch_setup(void)
4138b740 564{
f78bab30
MD		 565 /* enable STATUS0, STATUS2 and PDSTATUS */
566 gpio_request(GPIO_FN_STATUS0, NULL);
567 gpio_request(GPIO_FN_STATUS2, NULL);
568 gpio_request(GPIO_FN_PDSTATUS, NULL);
569
4138b740
KM		 570 /* enable SCIFA0 */
571 gpio_request(GPIO_FN_SCIF0_TXD, NULL);
572 gpio_request(GPIO_FN_SCIF0_RXD, NULL);
4138b740
KM		 573
574 /* enable debug LED */
575 gpio_request(GPIO_PTG0, NULL);
576 gpio_request(GPIO_PTG1, NULL);
577 gpio_request(GPIO_PTG2, NULL);
578 gpio_request(GPIO_PTG3, NULL);
b7056bc1
KM		 579 gpio_direction_output(GPIO_PTG0, 0);
580 gpio_direction_output(GPIO_PTG1, 0);
581 gpio_direction_output(GPIO_PTG2, 0);
582 gpio_direction_output(GPIO_PTG3, 0);
643e9d10 583 ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
4138b740 584
35a35408
KM		 585 /* enable SH-Eth */
586 gpio_request(GPIO_PTA1, NULL);
587 gpio_direction_output(GPIO_PTA1, 1);
588 mdelay(20);
589
590 gpio_request(GPIO_FN_RMII_RXD0, NULL);
591 gpio_request(GPIO_FN_RMII_RXD1, NULL);
592 gpio_request(GPIO_FN_RMII_TXD0, NULL);
593 gpio_request(GPIO_FN_RMII_TXD1, NULL);
594 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
595 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
596 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
597 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
598 gpio_request(GPIO_FN_MDIO, NULL);
599 gpio_request(GPIO_FN_MDC, NULL);
600 gpio_request(GPIO_FN_LNKSTA, NULL);
601
907050a3 602 /* enable USB */
be4ebf99 603 ctrl_outw(0x0000, 0xA4D80000);
147df2d6 604 ctrl_outw(0x0000, 0xA4D90000);
907050a3
KM		 605 gpio_request(GPIO_PTB3, NULL);
606 gpio_request(GPIO_PTB4, NULL);
607 gpio_request(GPIO_PTB5, NULL);
608 gpio_direction_input(GPIO_PTB3);
609 gpio_direction_output(GPIO_PTB4, 0);
610 gpio_direction_output(GPIO_PTB5, 0);
611 ctrl_outw(0x0600, 0xa40501d4);
612 ctrl_outw(0x0600, 0xa4050192);
613
fa3ba51b
KM		 614 /* enable LCDC */
615 gpio_request(GPIO_FN_LCDD23, NULL);
616 gpio_request(GPIO_FN_LCDD22, NULL);
617 gpio_request(GPIO_FN_LCDD21, NULL);
618 gpio_request(GPIO_FN_LCDD20, NULL);
619 gpio_request(GPIO_FN_LCDD19, NULL);
620 gpio_request(GPIO_FN_LCDD18, NULL);
621 gpio_request(GPIO_FN_LCDD17, NULL);
622 gpio_request(GPIO_FN_LCDD16, NULL);
623 gpio_request(GPIO_FN_LCDD15, NULL);
624 gpio_request(GPIO_FN_LCDD14, NULL);
625 gpio_request(GPIO_FN_LCDD13, NULL);
626 gpio_request(GPIO_FN_LCDD12, NULL);
627 gpio_request(GPIO_FN_LCDD11, NULL);
628 gpio_request(GPIO_FN_LCDD10, NULL);
629 gpio_request(GPIO_FN_LCDD9, NULL);
630 gpio_request(GPIO_FN_LCDD8, NULL);
631 gpio_request(GPIO_FN_LCDD7, NULL);
632 gpio_request(GPIO_FN_LCDD6, NULL);
633 gpio_request(GPIO_FN_LCDD5, NULL);
634 gpio_request(GPIO_FN_LCDD4, NULL);
635 gpio_request(GPIO_FN_LCDD3, NULL);
636 gpio_request(GPIO_FN_LCDD2, NULL);
637 gpio_request(GPIO_FN_LCDD1, NULL);
638 gpio_request(GPIO_FN_LCDD0, NULL);
639 gpio_request(GPIO_FN_LCDDISP, NULL);
640 gpio_request(GPIO_FN_LCDHSYN, NULL);
641 gpio_request(GPIO_FN_LCDDCK, NULL);
642 gpio_request(GPIO_FN_LCDVSYN, NULL);
643 gpio_request(GPIO_FN_LCDDON, NULL);
644 gpio_request(GPIO_FN_LCDLCLK, NULL);
645 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
646
647 gpio_request(GPIO_PTE6, NULL);
648 gpio_request(GPIO_PTU1, NULL);
649 gpio_request(GPIO_PTR1, NULL);
650 gpio_request(GPIO_PTA2, NULL);
651 gpio_direction_input(GPIO_PTE6);
652 gpio_direction_output(GPIO_PTU1, 0);
653 gpio_direction_output(GPIO_PTR1, 0);
654 gpio_direction_output(GPIO_PTA2, 0);
655
ea15edb2
KM		 656 /* I/O buffer drive ability is low */
657 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA);
658
fa3ba51b
KM		 659 if (gpio_get_value(GPIO_PTE6)) {
660 /* DVI */
661 lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
ea15edb2 662 lcdc_info.ch[0].clock_divider = 1,
fa3ba51b
KM		 663 lcdc_info.ch[0].lcd_cfg.name = "DVI";
664 lcdc_info.ch[0].lcd_cfg.xres = 1280;
665 lcdc_info.ch[0].lcd_cfg.yres = 720;
666 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
667 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
668 lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
669 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
670 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
671 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
672
673 gpio_set_value(GPIO_PTA2, 1);
674 gpio_set_value(GPIO_PTU1, 1);
675 } else {
676 /* Panel */
ea15edb2
KM		 677
678 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
679 lcdc_info.ch[0].clock_divider = 2,
680 lcdc_info.ch[0].lcd_cfg.name = "Panel";
681 lcdc_info.ch[0].lcd_cfg.xres = 800;
682 lcdc_info.ch[0].lcd_cfg.yres = 480;
683 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
684 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
685 lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
686 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
687 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
688 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
689
690 gpio_set_value(GPIO_PTR1, 1);
691
692 /* FIXME
693 *
694 * LCDDON control is needed for Panel,
695 * but current sh_mobile_lcdc driver doesn't control it.
696 * It is temporary correspondence
697 */
698 gpio_request(GPIO_PTF4, NULL);
699 gpio_direction_output(GPIO_PTF4, 1);
8810e055
KM		 700
701 /* enable TouchScreen */
702 i2c_register_board_info(0, &ts_i2c_clients, 1);
703 set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
fa3ba51b
KM		 704 }
705
2153ad32
KM		 706 /* enable CEU0 */
707 gpio_request(GPIO_FN_VIO0_D15, NULL);
708 gpio_request(GPIO_FN_VIO0_D14, NULL);
709 gpio_request(GPIO_FN_VIO0_D13, NULL);
710 gpio_request(GPIO_FN_VIO0_D12, NULL);
711 gpio_request(GPIO_FN_VIO0_D11, NULL);
712 gpio_request(GPIO_FN_VIO0_D10, NULL);
713 gpio_request(GPIO_FN_VIO0_D9, NULL);
714 gpio_request(GPIO_FN_VIO0_D8, NULL);
715 gpio_request(GPIO_FN_VIO0_D7, NULL);
716 gpio_request(GPIO_FN_VIO0_D6, NULL);
717 gpio_request(GPIO_FN_VIO0_D5, NULL);
718 gpio_request(GPIO_FN_VIO0_D4, NULL);
719 gpio_request(GPIO_FN_VIO0_D3, NULL);
720 gpio_request(GPIO_FN_VIO0_D2, NULL);
721 gpio_request(GPIO_FN_VIO0_D1, NULL);
722 gpio_request(GPIO_FN_VIO0_D0, NULL);
723 gpio_request(GPIO_FN_VIO0_VD, NULL);
724 gpio_request(GPIO_FN_VIO0_CLK, NULL);
725 gpio_request(GPIO_FN_VIO0_FLD, NULL);
726 gpio_request(GPIO_FN_VIO0_HD, NULL);
727 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
728
729 /* enable CEU1 */
730 gpio_request(GPIO_FN_VIO1_D7, NULL);
731 gpio_request(GPIO_FN_VIO1_D6, NULL);
732 gpio_request(GPIO_FN_VIO1_D5, NULL);
733 gpio_request(GPIO_FN_VIO1_D4, NULL);
734 gpio_request(GPIO_FN_VIO1_D3, NULL);
735 gpio_request(GPIO_FN_VIO1_D2, NULL);
736 gpio_request(GPIO_FN_VIO1_D1, NULL);
737 gpio_request(GPIO_FN_VIO1_D0, NULL);
738 gpio_request(GPIO_FN_VIO1_FLD, NULL);
739 gpio_request(GPIO_FN_VIO1_HD, NULL);
740 gpio_request(GPIO_FN_VIO1_VD, NULL);
741 gpio_request(GPIO_FN_VIO1_CLK, NULL);
742 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
743
e9103e74
KM		 744 /* enable KEYSC */
745 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
746 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
747 gpio_request(GPIO_FN_KEYOUT3, NULL);
748 gpio_request(GPIO_FN_KEYOUT2, NULL);
749 gpio_request(GPIO_FN_KEYOUT1, NULL);
750 gpio_request(GPIO_FN_KEYOUT0, NULL);
751 gpio_request(GPIO_FN_KEYIN0, NULL);
752
064a16dc
KM		 753 /* enable user debug switch */
754 gpio_request(GPIO_PTR0, NULL);
755 gpio_request(GPIO_PTR4, NULL);
756 gpio_request(GPIO_PTR5, NULL);
757 gpio_request(GPIO_PTR6, NULL);
758 gpio_direction_input(GPIO_PTR0);
759 gpio_direction_input(GPIO_PTR4);
760 gpio_direction_input(GPIO_PTR5);
761 gpio_direction_input(GPIO_PTR6);
762
96987d96
KM		 763 /* enable SDHI0 */
764 gpio_request(GPIO_FN_SDHI0CD, NULL);
765 gpio_request(GPIO_FN_SDHI0WP, NULL);
766 gpio_request(GPIO_FN_SDHI0CMD, NULL);
767 gpio_request(GPIO_FN_SDHI0CLK, NULL);
768 gpio_request(GPIO_FN_SDHI0D3, NULL);
769 gpio_request(GPIO_FN_SDHI0D2, NULL);
770 gpio_request(GPIO_FN_SDHI0D1, NULL);
771 gpio_request(GPIO_FN_SDHI0D0, NULL);
772
773 /* enable SDHI1 */
774 gpio_request(GPIO_FN_SDHI1CD, NULL);
775 gpio_request(GPIO_FN_SDHI1WP, NULL);
776 gpio_request(GPIO_FN_SDHI1CMD, NULL);
777 gpio_request(GPIO_FN_SDHI1CLK, NULL);
778 gpio_request(GPIO_FN_SDHI1D3, NULL);
779 gpio_request(GPIO_FN_SDHI1D2, NULL);
780 gpio_request(GPIO_FN_SDHI1D1, NULL);
781 gpio_request(GPIO_FN_SDHI1D0, NULL);
782
783 gpio_request(GPIO_PTB6, NULL);
784 gpio_request(GPIO_PTB7, NULL);
785 gpio_direction_output(GPIO_PTB6, 1);
786 gpio_direction_output(GPIO_PTB7, 1);
787
788 /* I/O buffer drive ability is high for SDHI1 */
789 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
790
125ecce6
KM		 791 /* enable I2C device */
792 i2c_register_board_info(1, i2c1_devices,
793 ARRAY_SIZE(i2c1_devices));
794
4138b740
KM		 795 return platform_add_devices(ecovec_devices,
796 ARRAY_SIZE(ecovec_devices));
797}
4907d57f
KM		 798arch_initcall(arch_setup);
799
800static int __init devices_setup(void)
801{
802 sh_eth_init();
803 return 0;
804}
805device_initcall(devices_setup);
806
4138b740
KM		 807static struct sh_machine_vector mv_ecovec __initmv = {
808 .mv_name = "R0P7724 (EcoVec)",
809};
Ubuntu Artful kernel mirror