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Merge tag 'stable/frontswap.v16-tag' of git://git.kernel.org/pub/scm/linux/kernel...
[mirror_ubuntu-jammy-kernel.git] / arch / sh / boards / mach-ecovec24 / setup.c
CommitLineData
4138b740
KM		 1/*
2 * Copyright (C) 2009 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/device.h>
13#include <linux/platform_device.h>
1238c684
YG		 14#include <linux/mmc/host.h>
15#include <linux/mmc/sh_mmcif.h>
960b9e7e 16#include <linux/mmc/sh_mobile_sdhi.h>
4138b740
KM		 17#include <linux/mtd/physmap.h>
18#include <linux/gpio.h>
19#include <linux/interrupt.h>
35a35408
KM		 20#include <linux/io.h>
21#include <linux/delay.h>
907050a3 22#include <linux/usb/r8a66597.h>
fb2e7394 23#include <linux/usb/renesas_usbhs.h>
4907d57f 24#include <linux/i2c.h>
8810e055 25#include <linux/i2c/tsc2007.h>
1ce4da7a
MD		 26#include <linux/spi/spi.h>
27#include <linux/spi/sh_msiof.h>
28#include <linux/spi/mmc_spi.h>
e9103e74 29#include <linux/input.h>
fc1d003d 30#include <linux/input/sh_keysc.h>
cf8e56bf 31#include <linux/sh_eth.h>
9307d115 32#include <linux/sh_intc.h>
a1ad8033 33#include <linux/videodev2.h>
fa3ba51b 34#include <video/sh_mobile_lcdc.h>
1980fdc4 35#include <sound/sh_fsi.h>
064bfada 36#include <sound/simple_card.h>
2153ad32 37#include <media/sh_mobile_ceu.h>
a1ad8033 38#include <media/soc_camera.h>
207efd07 39#include <media/tw9910.h>
9aa25d64 40#include <media/mt9t112.h>
4138b740 41#include <asm/heartbeat.h>
a991801a 42#include <asm/clock.h>
eb0cd9e8 43#include <asm/suspend.h>
4138b740
KM		 44#include <cpu/sh7724.h>
45
46/*
b7056bc1
KM		 47 * Address Interface BusWidth
48 *-----------------------------------------
49 * 0x0000_0000 uboot 16bit
50 * 0x0004_0000 Linux romImage 16bit
51 * 0x0014_0000 MTD for Linux 16bit
52 * 0x0400_0000 Internal I/O 16/32bit
53 * 0x0800_0000 DRAM 32bit
54 * 0x1800_0000 MFI 16bit
4138b740
KM		 55 */
56
9c472c4d
KM		 57/* SWITCH
58 *------------------------------
59 * DS2[1] = FlashROM write protect ON : write protect
60 * OFF : No write protect
61 * DS2[2] = RMII / TS, SCIF ON : RMII
62 * OFF : TS, SCIF3
63 * DS2[3] = Camera / Video ON : Camera
64 * OFF : NTSC/PAL (IN)
65 * DS2[5] = NTSC_OUT Clock ON : On board OSC
66 * OFF : SH7724 DV_CLK
67 * DS2[6-7] = MMC / SD ON-OFF : SD
68 * OFF-ON : MMC
69 */
70
4138b740
KM		 71/* Heartbeat */
72static unsigned char led_pos[] = { 0, 1, 2, 3 };
a09d2831 73
4138b740 74static struct heartbeat_data heartbeat_data = {
4138b740
KM		 75 .nr_bits = 4,
76 .bit_pos = led_pos,
77};
78
a09d2831
PM		 79static struct resource heartbeat_resource = {
80 .start = 0xA405012C, /* PTG */
81 .end = 0xA405012E - 1,
82 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
4138b740
KM		 83};
84
85static struct platform_device heartbeat_device = {
86 .name = "heartbeat",
87 .id = -1,
88 .dev = {
89 .platform_data = &heartbeat_data,
90 },
a09d2831
PM		 91 .num_resources = 1,
92 .resource = &heartbeat_resource,
4138b740
KM		 93};
94
95/* MTD */
96static struct mtd_partition nor_flash_partitions[] = {
97 {
b7056bc1 98 .name = "boot loader",
4138b740 99 .offset = 0,
b7056bc1 100 .size = (5 * 1024 * 1024),
d5ce010c 101 .mask_flags = MTD_WRITEABLE, /* force read-only */
4138b740
KM		 102 }, {
103 .name = "free-area",
104 .offset = MTDPART_OFS_APPEND,
105 .size = MTDPART_SIZ_FULL,
106 },
107};
108
109static struct physmap_flash_data nor_flash_data = {
110 .width = 2,
111 .parts = nor_flash_partitions,
112 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
113};
114
115static struct resource nor_flash_resources[] = {
116 [0] = {
117 .name = "NOR Flash",
118 .start = 0x00000000,
119 .end = 0x03ffffff,
120 .flags = IORESOURCE_MEM,
121 }
122};
123
124static struct platform_device nor_flash_device = {
125 .name = "physmap-flash",
126 .resource = nor_flash_resources,
127 .num_resources = ARRAY_SIZE(nor_flash_resources),
128 .dev = {
129 .platform_data = &nor_flash_data,
130 },
131};
132
35a35408
KM		 133/* SH Eth */
134#define SH_ETH_ADDR (0xA4600000)
35a35408
KM		 135static struct resource sh_eth_resources[] = {
136 [0] = {
137 .start = SH_ETH_ADDR,
138 .end = SH_ETH_ADDR + 0x1FC,
139 .flags = IORESOURCE_MEM,
140 },
141 [1] = {
9307d115 142 .start = evt2irq(0xd60),
35a35408
KM		 143 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
144 },
145};
146
3ce09334 147static struct sh_eth_plat_data sh_eth_plat = {
35a35408
KM		 148 .phy = 0x1f, /* SMSC LAN8700 */
149 .edmac_endian = EDMAC_LITTLE_ENDIAN,
9055f895
YS		 150 .register_type = SH_ETH_REG_FAST_SH4,
151 .phy_interface = PHY_INTERFACE_MODE_MII,
acf3cc28 152 .ether_link_active_low = 1
35a35408
KM		 153};
154
155static struct platform_device sh_eth_device = {
156 .name = "sh-eth",
157 .id = 0,
158 .dev = {
159 .platform_data = &sh_eth_plat,
160 },
161 .num_resources = ARRAY_SIZE(sh_eth_resources),
162 .resource = sh_eth_resources,
163};
164
907050a3 165/* USB0 host */
3ce09334 166static void usb0_port_power(int port, int power)
907050a3
KM		 167{
168 gpio_set_value(GPIO_PTB4, power);
169}
170
171static struct r8a66597_platdata usb0_host_data = {
172 .on_chip = 1,
173 .port_power = usb0_port_power,
174};
175
176static struct resource usb0_host_resources[] = {
177 [0] = {
178 .start = 0xa4d80000,
179 .end = 0xa4d80124 - 1,
180 .flags = IORESOURCE_MEM,
181 },
182 [1] = {
9307d115
PM		 183 .start = evt2irq(0xa20),
184 .end = evt2irq(0xa20),
907050a3
KM		 185 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
186 },
187};
188
189static struct platform_device usb0_host_device = {
190 .name = "r8a66597_hcd",
191 .id = 0,
192 .dev = {
193 .dma_mask = NULL, /* not use dma */
194 .coherent_dma_mask = 0xffffffff,
195 .platform_data = &usb0_host_data,
196 },
197 .num_resources = ARRAY_SIZE(usb0_host_resources),
198 .resource = usb0_host_resources,
199};
200
3714a9a0 201/* USB1 host/function */
3ce09334 202static void usb1_port_power(int port, int power)
907050a3 203{
907050a3
KM		 204 gpio_set_value(GPIO_PTB5, power);
205}
206
3714a9a0 207static struct r8a66597_platdata usb1_common_data = {
907050a3
KM		 208 .on_chip = 1,
209 .port_power = usb1_port_power,
210};
211
3714a9a0 212static struct resource usb1_common_resources[] = {
907050a3
KM		 213 [0] = {
214 .start = 0xa4d90000,
215 .end = 0xa4d90124 - 1,
216 .flags = IORESOURCE_MEM,
217 },
218 [1] = {
9307d115
PM		 219 .start = evt2irq(0xa40),
220 .end = evt2irq(0xa40),
907050a3
KM		 221 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
222 },
223};
224
3714a9a0
KM		 225static struct platform_device usb1_common_device = {
226 /* .name will be added in arch_setup */
907050a3
KM		 227 .id = 1,
228 .dev = {
229 .dma_mask = NULL, /* not use dma */
230 .coherent_dma_mask = 0xffffffff,
3714a9a0 231 .platform_data = &usb1_common_data,
907050a3 232 },
3714a9a0
KM		 233 .num_resources = ARRAY_SIZE(usb1_common_resources),
234 .resource = usb1_common_resources,
907050a3
KM		 235};
236
fb2e7394
KM		 237/*
238 * USBHS
239 */
240static int usbhs_get_id(struct platform_device *pdev)
241{
242 return gpio_get_value(GPIO_PTB3);
243}
244
245static struct renesas_usbhs_platform_info usbhs_info = {
246 .platform_callback = {
247 .get_id = usbhs_get_id,
248 },
249 .driver_param = {
250 .buswait_bwait = 4,
251 .detection_delay = 5,
9f0fa799
KM		 252 .d0_tx_id = SHDMA_SLAVE_USB1D0_TX,
253 .d0_rx_id = SHDMA_SLAVE_USB1D0_RX,
254 .d1_tx_id = SHDMA_SLAVE_USB1D1_TX,
255 .d1_rx_id = SHDMA_SLAVE_USB1D1_RX,
fb2e7394
KM		 256 },
257};
258
259static struct resource usbhs_resources[] = {
260 [0] = {
261 .start = 0xa4d90000,
262 .end = 0xa4d90124 - 1,
263 .flags = IORESOURCE_MEM,
264 },
265 [1] = {
9307d115
PM		 266 .start = evt2irq(0xa40),
267 .end = evt2irq(0xa40),
fb2e7394
KM		 268 .flags = IORESOURCE_IRQ,
269 },
270};
271
272static struct platform_device usbhs_device = {
273 .name = "renesas_usbhs",
274 .id = 1,
275 .dev = {
276 .dma_mask = NULL, /* not use dma */
277 .coherent_dma_mask = 0xffffffff,
278 .platform_data = &usbhs_info,
279 },
280 .num_resources = ARRAY_SIZE(usbhs_resources),
281 .resource = usbhs_resources,
fb2e7394
KM		 282};
283
fa3ba51b 284/* LCDC */
e04008eb 285static const struct fb_videomode ecovec_lcd_modes[] = {
44432407
GL		 286 {
287 .name = "Panel",
288 .xres = 800,
289 .yres = 480,
290 .left_margin = 220,
291 .right_margin = 110,
292 .hsync_len = 70,
293 .upper_margin = 20,
294 .lower_margin = 5,
295 .vsync_len = 5,
296 .sync = 0, /* hsync and vsync are active low */
297 },
298};
299
e04008eb 300static const struct fb_videomode ecovec_dvi_modes[] = {
44432407
GL		 301 {
302 .name = "DVI",
303 .xres = 1280,
304 .yres = 720,
305 .left_margin = 220,
306 .right_margin = 110,
307 .hsync_len = 40,
308 .upper_margin = 20,
309 .lower_margin = 5,
310 .vsync_len = 5,
311 .sync = 0, /* hsync and vsync are active low */
312 },
313};
314
018882aa 315static int ecovec24_set_brightness(int brightness)
0839d687
AC		 316{
317 gpio_set_value(GPIO_PTR1, brightness);
318
319 return 0;
320}
321
018882aa 322static int ecovec24_get_brightness(void)
0839d687
AC		 323{
324 return gpio_get_value(GPIO_PTR1);
325}
326
fa3ba51b
KM		 327static struct sh_mobile_lcdc_info lcdc_info = {
328 .ch[0] = {
329 .interface_type = RGB18,
330 .chan = LCDC_CHAN_MAINLCD,
edd153a3 331 .fourcc = V4L2_PIX_FMT_RGB565,
afaad83b 332 .panel_cfg = { /* 7.0 inch */
fa3ba51b
KM		 333 .width = 152,
334 .height = 91,
335 },
0839d687
AC		 336 .bl_info = {
337 .name = "sh_mobile_lcdc_bl",
338 .max_brightness = 1,
43059b0f
LP		 339 .set_brightness = ecovec24_set_brightness,
340 .get_brightness = ecovec24_get_brightness,
fa3ba51b
KM		 341 },
342 }
343};
344
345static struct resource lcdc_resources[] = {
346 [0] = {
347 .name = "LCDC",
348 .start = 0xfe940000,
a6f15ade 349 .end = 0xfe942fff,
fa3ba51b
KM		 350 .flags = IORESOURCE_MEM,
351 },
352 [1] = {
9307d115 353 .start = evt2irq(0xf40),
fa3ba51b
KM		 354 .flags = IORESOURCE_IRQ,
355 },
356};
357
358static struct platform_device lcdc_device = {
359 .name = "sh_mobile_lcdc_fb",
360 .num_resources = ARRAY_SIZE(lcdc_resources),
361 .resource = lcdc_resources,
362 .dev = {
363 .platform_data = &lcdc_info,
364 },
fa3ba51b
KM		 365};
366
2153ad32
KM		 367/* CEU0 */
368static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
369 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
370};
371
372static struct resource ceu0_resources[] = {
373 [0] = {
374 .name = "CEU0",
375 .start = 0xfe910000,
376 .end = 0xfe91009f,
377 .flags = IORESOURCE_MEM,
378 },
379 [1] = {
9307d115 380 .start = evt2irq(0x880),
2153ad32
KM		 381 .flags = IORESOURCE_IRQ,
382 },
383 [2] = {
384 /* place holder for contiguous memory */
385 },
386};
387
388static struct platform_device ceu0_device = {
389 .name = "sh_mobile_ceu",
390 .id = 0, /* "ceu0" clock */
391 .num_resources = ARRAY_SIZE(ceu0_resources),
392 .resource = ceu0_resources,
393 .dev = {
394 .platform_data = &sh_mobile_ceu0_info,
395 },
2153ad32
KM		 396};
397
398/* CEU1 */
399static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
400 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
401};
402
403static struct resource ceu1_resources[] = {
404 [0] = {
405 .name = "CEU1",
406 .start = 0xfe914000,
407 .end = 0xfe91409f,
408 .flags = IORESOURCE_MEM,
409 },
410 [1] = {
9307d115 411 .start = evt2irq(0x9e0),
2153ad32
KM		 412 .flags = IORESOURCE_IRQ,
413 },
414 [2] = {
415 /* place holder for contiguous memory */
416 },
417};
418
419static struct platform_device ceu1_device = {
420 .name = "sh_mobile_ceu",
421 .id = 1, /* "ceu1" clock */
422 .num_resources = ARRAY_SIZE(ceu1_resources),
423 .resource = ceu1_resources,
424 .dev = {
425 .platform_data = &sh_mobile_ceu1_info,
426 },
2153ad32
KM		 427};
428
125ecce6 429/* I2C device */
1980fdc4
KM		 430static struct i2c_board_info i2c0_devices[] = {
431 {
432 I2C_BOARD_INFO("da7210", 0x1a),
433 },
434};
435
125ecce6
KM		 436static struct i2c_board_info i2c1_devices[] = {
437 {
438 I2C_BOARD_INFO("r2025sd", 0x32),
439 },
ea440783
NH		 440 {
441 I2C_BOARD_INFO("lis3lv02d", 0x1c),
9307d115 442 .irq = evt2irq(0x620),
ea440783 443 }
125ecce6
KM		 444};
445
e9103e74
KM		 446/* KEYSC */
447static struct sh_keysc_info keysc_info = {
448 .mode = SH_KEYSC_MODE_1,
449 .scan_timing = 3,
450 .delay = 50,
451 .kycr2_delay = 100,
452 .keycodes = { KEY_1, 0, 0, 0, 0,
453 KEY_2, 0, 0, 0, 0,
454 KEY_3, 0, 0, 0, 0,
455 KEY_4, 0, 0, 0, 0,
456 KEY_5, 0, 0, 0, 0,
457 KEY_6, 0, 0, 0, 0, },
458};
459
460static struct resource keysc_resources[] = {
461 [0] = {
462 .name = "KEYSC",
463 .start = 0x044b0000,
464 .end = 0x044b000f,
465 .flags = IORESOURCE_MEM,
466 },
467 [1] = {
9307d115 468 .start = evt2irq(0xbe0),
e9103e74
KM		 469 .flags = IORESOURCE_IRQ,
470 },
471};
472
473static struct platform_device keysc_device = {
474 .name = "sh_keysc",
475 .id = 0, /* keysc0 clock */
476 .num_resources = ARRAY_SIZE(keysc_resources),
477 .resource = keysc_resources,
478 .dev = {
479 .platform_data = &keysc_info,
480 },
e9103e74
KM		 481};
482
8810e055 483/* TouchScreen */
9307d115
PM		 484#define IRQ0 evt2irq(0x600)
485
5d75b3a2
PM		 486static int ts_get_pendown_state(void)
487{
488 int val = 0;
489 gpio_free(GPIO_FN_INTC_IRQ0);
490 gpio_request(GPIO_PTZ0, NULL);
491 gpio_direction_input(GPIO_PTZ0);
492
493 val = gpio_get_value(GPIO_PTZ0);
494
495 gpio_free(GPIO_PTZ0);
496 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
497
498 return val ? 0 : 1;
499}
500
501static int ts_init(void)
502{
503 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
504 return 0;
505}
506
3ce09334 507static struct tsc2007_platform_data tsc2007_info = {
8810e055 508 .model = 2007,
5d75b3a2
PM		 509 .x_plate_ohms = 180,
510 .get_pendown_state = ts_get_pendown_state,
511 .init_platform_hw = ts_init,
8810e055
KM		 512};
513
514static struct i2c_board_info ts_i2c_clients = {
515 I2C_BOARD_INFO("tsc2007", 0x48),
516 .type = "tsc2007",
517 .platform_data = &tsc2007_info,
518 .irq = IRQ0,
519};
520
5744c881 521#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1238c684 522/* SDHI0 */
98779ad8
MD		 523static void sdhi0_set_pwr(struct platform_device *pdev, int state)
524{
525 gpio_set_value(GPIO_PTB6, state);
526}
527
4eb80146
GL		 528static int sdhi0_get_cd(struct platform_device *pdev)
529{
530 return !gpio_get_value(GPIO_PTY7);
531}
532
98779ad8 533static struct sh_mobile_sdhi_info sdhi0_info = {
815f1995
GL		 534 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
535 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
536 .set_pwr = sdhi0_set_pwr,
4eb80146
GL		 537 .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
538 MMC_CAP_NEEDS_POLL,
539 .get_cd = sdhi0_get_cd,
98779ad8
MD		 540};
541
96987d96
KM		 542static struct resource sdhi0_resources[] = {
543 [0] = {
544 .name = "SDHI0",
545 .start = 0x04ce0000,
d80e9221 546 .end = 0x04ce00ff,
96987d96
KM		 547 .flags = IORESOURCE_MEM,
548 },
549 [1] = {
9307d115 550 .start = evt2irq(0xe80),
96987d96
KM		 551 .flags = IORESOURCE_IRQ,
552 },
553};
554
555static struct platform_device sdhi0_device = {
556 .name = "sh_mobile_sdhi",
557 .num_resources = ARRAY_SIZE(sdhi0_resources),
558 .resource = sdhi0_resources,
559 .id = 0,
98779ad8
MD		 560 .dev = {
561 .platform_data = &sdhi0_info,
562 },
96987d96
KM		 563};
564
5744c881 565#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1238c684 566/* SDHI1 */
98779ad8
MD		 567static void sdhi1_set_pwr(struct platform_device *pdev, int state)
568{
569 gpio_set_value(GPIO_PTB7, state);
570}
571
4eb80146
GL		 572static int sdhi1_get_cd(struct platform_device *pdev)
573{
574 return !gpio_get_value(GPIO_PTW7);
575}
576
98779ad8 577static struct sh_mobile_sdhi_info sdhi1_info = {
815f1995
GL		 578 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
579 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
4eb80146
GL		 580 .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
581 MMC_CAP_NEEDS_POLL,
815f1995 582 .set_pwr = sdhi1_set_pwr,
4eb80146 583 .get_cd = sdhi1_get_cd,
98779ad8
MD		 584};
585
96987d96
KM		 586static struct resource sdhi1_resources[] = {
587 [0] = {
588 .name = "SDHI1",
589 .start = 0x04cf0000,
d80e9221 590 .end = 0x04cf00ff,
96987d96
KM		 591 .flags = IORESOURCE_MEM,
592 },
593 [1] = {
9307d115 594 .start = evt2irq(0x4e0),
96987d96
KM		 595 .flags = IORESOURCE_IRQ,
596 },
597};
598
599static struct platform_device sdhi1_device = {
600 .name = "sh_mobile_sdhi",
601 .num_resources = ARRAY_SIZE(sdhi1_resources),
602 .resource = sdhi1_resources,
603 .id = 1,
98779ad8
MD		 604 .dev = {
605 .platform_data = &sdhi1_info,
606 },
96987d96 607};
1238c684 608#endif /* CONFIG_MMC_SH_MMCIF */
96987d96 609
1ce4da7a
MD		 610#else
611
9503e891 612/* MMC SPI */
1ce4da7a
MD		 613static int mmc_spi_get_ro(struct device *dev)
614{
615 return gpio_get_value(GPIO_PTY6);
616}
617
618static int mmc_spi_get_cd(struct device *dev)
619{
620 return !gpio_get_value(GPIO_PTY7);
621}
622
623static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
624{
625 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
626}
627
628static struct mmc_spi_platform_data mmc_spi_info = {
629 .get_ro = mmc_spi_get_ro,
630 .get_cd = mmc_spi_get_cd,
631 .caps = MMC_CAP_NEEDS_POLL,
632 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
633 .setpower = mmc_spi_setpower,
634};
635
636static struct spi_board_info spi_bus[] = {
637 {
638 .modalias = "mmc_spi",
639 .platform_data = &mmc_spi_info,
640 .max_speed_hz = 5000000,
641 .mode = SPI_MODE_0,
642 .controller_data = (void *) GPIO_PTM4,
643 },
644};
645
9503e891 646/* MSIOF0 */
1ce4da7a
MD		 647static struct sh_msiof_spi_info msiof0_data = {
648 .num_chipselect = 1,
649};
650
651static struct resource msiof0_resources[] = {
652 [0] = {
653 .name = "MSIOF0",
654 .start = 0xa4c40000,
655 .end = 0xa4c40063,
656 .flags = IORESOURCE_MEM,
657 },
658 [1] = {
9307d115 659 .start = evt2irq(0xc80),
1ce4da7a
MD		 660 .flags = IORESOURCE_IRQ,
661 },
662};
663
664static struct platform_device msiof0_device = {
665 .name = "spi_sh_msiof",
666 .id = 0, /* MSIOF0 */
667 .dev = {
668 .platform_data = &msiof0_data,
669 },
670 .num_resources = ARRAY_SIZE(msiof0_resources),
671 .resource = msiof0_resources,
1ce4da7a
MD		 672};
673
674#endif
675
9aa25d64 676/* I2C Video/Camera */
207efd07
KM		 677static struct i2c_board_info i2c_camera[] = {
678 {
679 I2C_BOARD_INFO("tw9910", 0x45),
680 },
9aa25d64
KM		 681 {
682 /* 1st camera */
683 I2C_BOARD_INFO("mt9t112", 0x3c),
684 },
685 {
686 /* 2nd camera */
687 I2C_BOARD_INFO("mt9t112", 0x3c),
688 },
207efd07
KM		 689};
690
691/* tw9910 */
692static int tw9910_power(struct device *dev, int mode)
693{
694 int val = mode ? 0 : 1;
695
696 gpio_set_value(GPIO_PTU2, val);
697 if (mode)
698 mdelay(100);
699
700 return 0;
701}
702
703static struct tw9910_video_info tw9910_info = {
704 .buswidth = SOCAM_DATAWIDTH_8,
705 .mpout = TW9910_MPO_FIELD,
706};
707
708static struct soc_camera_link tw9910_link = {
709 .i2c_adapter_id = 0,
710 .bus_id = 1,
711 .power = tw9910_power,
712 .board_info = &i2c_camera[0],
207efd07
KM		 713 .priv = &tw9910_info,
714};
715
9aa25d64
KM		 716/* mt9t112 */
717static int mt9t112_power1(struct device *dev, int mode)
718{
719 gpio_set_value(GPIO_PTA3, mode);
720 if (mode)
721 mdelay(100);
722
723 return 0;
724}
725
726static struct mt9t112_camera_info mt9t112_info1 = {
727 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
728 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
729};
730
731static struct soc_camera_link mt9t112_link1 = {
732 .i2c_adapter_id = 0,
733 .power = mt9t112_power1,
734 .bus_id = 0,
735 .board_info = &i2c_camera[1],
9aa25d64
KM		 736 .priv = &mt9t112_info1,
737};
738
739static int mt9t112_power2(struct device *dev, int mode)
740{
741 gpio_set_value(GPIO_PTA4, mode);
742 if (mode)
743 mdelay(100);
744
745 return 0;
746}
747
748static struct mt9t112_camera_info mt9t112_info2 = {
749 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
750 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
751};
752
753static struct soc_camera_link mt9t112_link2 = {
754 .i2c_adapter_id = 1,
755 .power = mt9t112_power2,
756 .bus_id = 1,
757 .board_info = &i2c_camera[2],
9aa25d64
KM		 758 .priv = &mt9t112_info2,
759};
207efd07
KM		 760
761static struct platform_device camera_devices[] = {
762 {
763 .name = "soc-camera-pdrv",
764 .id = 0,
765 .dev = {
766 .platform_data = &tw9910_link,
767 },
768 },
9aa25d64
KM		 769 {
770 .name = "soc-camera-pdrv",
771 .id = 1,
772 .dev = {
773 .platform_data = &mt9t112_link1,
774 },
775 },
776 {
777 .name = "soc-camera-pdrv",
778 .id = 2,
779 .dev = {
780 .platform_data = &mt9t112_link2,
781 },
782 },
207efd07
KM		 783};
784
1980fdc4 785/* FSI */
3ce09334 786static struct sh_fsi_platform_info fsi_info = {
fec691e7
KM		 787 .port_b = {
788 .flags = SH_FSI_BRS_INV,
789 },
1980fdc4
KM		 790};
791
792static struct resource fsi_resources[] = {
793 [0] = {
794 .name = "FSI",
795 .start = 0xFE3C0000,
796 .end = 0xFE3C021d,
797 .flags = IORESOURCE_MEM,
798 },
799 [1] = {
9307d115 800 .start = evt2irq(0xf80),
1980fdc4
KM		 801 .flags = IORESOURCE_IRQ,
802 },
803};
804
805static struct platform_device fsi_device = {
806 .name = "sh_fsi",
807 .id = 0,
808 .num_resources = ARRAY_SIZE(fsi_resources),
809 .resource = fsi_resources,
810 .dev = {
811 .platform_data = &fsi_info,
812 },
1980fdc4
KM		 813};
814
064bfada
KM		 815static struct asoc_simple_dai_init_info fsi_da7210_init_info = {
816 .fmt = SND_SOC_DAIFMT_I2S,
817 .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
818 .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
819};
820
821static struct asoc_simple_card_info fsi_da7210_info = {
822 .name = "DA7210",
823 .card = "FSIB-DA7210",
824 .cpu_dai = "fsib-dai",
825 .codec = "da7210.0-001a",
826 .platform = "sh_fsi.0",
827 .codec_dai = "da7210-hifi",
828 .init = &fsi_da7210_init_info,
829};
830
831static struct platform_device fsi_da7210_device = {
832 .name = "asoc-simple-card",
833 .dev = {
834 .platform_data = &fsi_da7210_info,
835 },
836};
837
838
26365716
KM		 839/* IrDA */
840static struct resource irda_resources[] = {
841 [0] = {
842 .name = "IrDA",
843 .start = 0xA45D0000,
844 .end = 0xA45D0049,
845 .flags = IORESOURCE_MEM,
846 },
847 [1] = {
9307d115 848 .start = evt2irq(0x480),
26365716
KM		 849 .flags = IORESOURCE_IRQ,
850 },
851};
852
853static struct platform_device irda_device = {
854 .name = "sh_sir",
855 .num_resources = ARRAY_SIZE(irda_resources),
856 .resource = irda_resources,
857};
858
aee5ab0b
GL		 859#include <media/ak881x.h>
860#include <media/sh_vou.h>
861
3ce09334 862static struct ak881x_pdata ak881x_pdata = {
aee5ab0b
GL		 863 .flags = AK881X_IF_MODE_SLAVE,
864};
865
866static struct i2c_board_info ak8813 = {
867 I2C_BOARD_INFO("ak8813", 0x20),
868 .platform_data = &ak881x_pdata,
869};
870
3ce09334 871static struct sh_vou_pdata sh_vou_pdata = {
aee5ab0b
GL		 872 .bus_fmt = SH_VOU_BUS_8BIT,
873 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
874 .board_info = &ak8813,
875 .i2c_adap = 0,
aee5ab0b
GL		 876};
877
878static struct resource sh_vou_resources[] = {
879 [0] = {
880 .start = 0xfe960000,
881 .end = 0xfe962043,
882 .flags = IORESOURCE_MEM,
883 },
884 [1] = {
9307d115 885 .start = evt2irq(0x8e0),
aee5ab0b
GL		 886 .flags = IORESOURCE_IRQ,
887 },
888};
889
890static struct platform_device vou_device = {
891 .name = "sh-vou",
892 .id = -1,
893 .num_resources = ARRAY_SIZE(sh_vou_resources),
894 .resource = sh_vou_resources,
895 .dev = {
896 .platform_data = &sh_vou_pdata,
897 },
aee5ab0b
GL		 898};
899
5744c881 900#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1238c684
YG		 901/* SH_MMCIF */
902static void mmcif_set_pwr(struct platform_device *pdev, int state)
903{
904 gpio_set_value(GPIO_PTB7, state);
905}
906
907static void mmcif_down_pwr(struct platform_device *pdev)
908{
909 gpio_set_value(GPIO_PTB7, 0);
910}
911
912static struct resource sh_mmcif_resources[] = {
913 [0] = {
914 .name = "SH_MMCIF",
915 .start = 0xA4CA0000,
916 .end = 0xA4CA00FF,
917 .flags = IORESOURCE_MEM,
918 },
919 [1] = {
920 /* MMC2I */
9307d115 921 .start = evt2irq(0x5a0),
1238c684
YG		 922 .flags = IORESOURCE_IRQ,
923 },
924 [2] = {
925 /* MMC3I */
9307d115 926 .start = evt2irq(0x5c0),
1238c684
YG		 927 .flags = IORESOURCE_IRQ,
928 },
929};
930
3ce09334 931static struct sh_mmcif_plat_data sh_mmcif_plat = {
1238c684
YG		 932 .set_pwr = mmcif_set_pwr,
933 .down_pwr = mmcif_down_pwr,
934 .sup_pclk = 0, /* SH7724: Max Pclk/2 */
935 .caps = MMC_CAP_4_BIT_DATA |
936 MMC_CAP_8_BIT_DATA |
937 MMC_CAP_NEEDS_POLL,
938 .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
939};
940
941static struct platform_device sh_mmcif_device = {
942 .name = "sh_mmcif",
943 .id = 0,
944 .dev = {
945 .platform_data = &sh_mmcif_plat,
946 },
947 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
948 .resource = sh_mmcif_resources,
949};
950#endif
951
4138b740
KM		 952static struct platform_device *ecovec_devices[] __initdata = {
953 &heartbeat_device,
954 &nor_flash_device,
35a35408 955 &sh_eth_device,
907050a3 956 &usb0_host_device,
3714a9a0 957 &usb1_common_device,
fb2e7394 958 &usbhs_device,
fa3ba51b 959 &lcdc_device,
2153ad32
KM		 960 &ceu0_device,
961 &ceu1_device,
e9103e74 962 &keysc_device,
5744c881 963#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
96987d96 964 &sdhi0_device,
5744c881 965#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
96987d96 966 &sdhi1_device,
1238c684 967#endif
1ce4da7a
MD		 968#else
969 &msiof0_device,
970#endif
207efd07 971 &camera_devices[0],
9aa25d64
KM		 972 &camera_devices[1],
973 &camera_devices[2],
1980fdc4 974 &fsi_device,
064bfada 975 &fsi_da7210_device,
26365716 976 &irda_device,
aee5ab0b 977 &vou_device,
5744c881 978#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1238c684
YG		 979 &sh_mmcif_device,
980#endif
4138b740
KM		 981};
982
6b3b5575 983#ifdef CONFIG_I2C
4907d57f
KM		 984#define EEPROM_ADDR 0x50
985static u8 mac_read(struct i2c_adapter *a, u8 command)
986{
987 struct i2c_msg msg[2];
988 u8 buf;
989 int ret;
990
991 msg[0].addr = EEPROM_ADDR;
992 msg[0].flags = 0;
993 msg[0].len = 1;
994 msg[0].buf = &command;
995
996 msg[1].addr = EEPROM_ADDR;
997 msg[1].flags = I2C_M_RD;
998 msg[1].len = 1;
999 msg[1].buf = &buf;
1000
1001 ret = i2c_transfer(a, msg, 2);
1002 if (ret < 0) {
1003 printk(KERN_ERR "error %d\n", ret);
1004 buf = 0xff;
1005 }
1006
1007 return buf;
1008}
1009
376abbb4 1010static void __init sh_eth_init(struct sh_eth_plat_data *pd)
4907d57f
KM		 1011{
1012 struct i2c_adapter *a = i2c_get_adapter(1);
4907d57f
KM		 1013 int i;
1014
1015 if (!a) {
1016 pr_err("can not get I2C 1\n");
1017 return;
1018 }
1019
25985edc 1020 /* read MAC address from EEPROM */
376abbb4
MD		 1021 for (i = 0; i < sizeof(pd->mac_addr); i++) {
1022 pd->mac_addr[i] = mac_read(a, 0x10 + i);
4907d57f
KM		 1023 msleep(10);
1024 }
b230eb32
KM		 1025
1026 i2c_put_adapter(a);
4907d57f 1027}
6b3b5575
MD		 1028#else
1029static void __init sh_eth_init(struct sh_eth_plat_data *pd)
1030{
1031 pr_err("unable to read sh_eth MAC address\n");
1032}
1033#endif
4907d57f 1034
fa3ba51b 1035#define PORT_HIZA 0xA4050158
ea15edb2 1036#define IODRIVEA 0xA405018A
eb0cd9e8
MD		 1037
1038extern char ecovec24_sdram_enter_start;
1039extern char ecovec24_sdram_enter_end;
1040extern char ecovec24_sdram_leave_start;
1041extern char ecovec24_sdram_leave_end;
1042
4907d57f 1043static int __init arch_setup(void)
4138b740 1044{
1980fdc4 1045 struct clk *clk;
4eb80146 1046 bool cn12_enabled = false;
1980fdc4 1047
eb0cd9e8 1048 /* register board specific self-refresh code */
2839bd61
MD		 1049 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
1050 SUSP_SH_RSTANDBY,
eb0cd9e8
MD		 1051 &ecovec24_sdram_enter_start,
1052 &ecovec24_sdram_enter_end,
1053 &ecovec24_sdram_leave_start,
1054 &ecovec24_sdram_leave_end);
1055
f78bab30
MD		 1056 /* enable STATUS0, STATUS2 and PDSTATUS */
1057 gpio_request(GPIO_FN_STATUS0, NULL);
1058 gpio_request(GPIO_FN_STATUS2, NULL);
1059 gpio_request(GPIO_FN_PDSTATUS, NULL);
1060
4138b740
KM		 1061 /* enable SCIFA0 */
1062 gpio_request(GPIO_FN_SCIF0_TXD, NULL);
1063 gpio_request(GPIO_FN_SCIF0_RXD, NULL);
4138b740
KM		 1064
1065 /* enable debug LED */
1066 gpio_request(GPIO_PTG0, NULL);
1067 gpio_request(GPIO_PTG1, NULL);
1068 gpio_request(GPIO_PTG2, NULL);
1069 gpio_request(GPIO_PTG3, NULL);
b7056bc1
KM		 1070 gpio_direction_output(GPIO_PTG0, 0);
1071 gpio_direction_output(GPIO_PTG1, 0);
1072 gpio_direction_output(GPIO_PTG2, 0);
1073 gpio_direction_output(GPIO_PTG3, 0);
9d56dd3b 1074 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
4138b740 1075
35a35408
KM		 1076 /* enable SH-Eth */
1077 gpio_request(GPIO_PTA1, NULL);
1078 gpio_direction_output(GPIO_PTA1, 1);
1079 mdelay(20);
1080
1081 gpio_request(GPIO_FN_RMII_RXD0, NULL);
1082 gpio_request(GPIO_FN_RMII_RXD1, NULL);
1083 gpio_request(GPIO_FN_RMII_TXD0, NULL);
1084 gpio_request(GPIO_FN_RMII_TXD1, NULL);
1085 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
1086 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
1087 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
1088 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
1089 gpio_request(GPIO_FN_MDIO, NULL);
1090 gpio_request(GPIO_FN_MDC, NULL);
1091 gpio_request(GPIO_FN_LNKSTA, NULL);
1092
907050a3 1093 /* enable USB */
9d56dd3b
PM		 1094 __raw_writew(0x0000, 0xA4D80000);
1095 __raw_writew(0x0000, 0xA4D90000);
907050a3
KM		 1096 gpio_request(GPIO_PTB3, NULL);
1097 gpio_request(GPIO_PTB4, NULL);
1098 gpio_request(GPIO_PTB5, NULL);
1099 gpio_direction_input(GPIO_PTB3);
1100 gpio_direction_output(GPIO_PTB4, 0);
1101 gpio_direction_output(GPIO_PTB5, 0);
9d56dd3b
PM		 1102 __raw_writew(0x0600, 0xa40501d4);
1103 __raw_writew(0x0600, 0xa4050192);
907050a3 1104
3714a9a0
KM		 1105 if (gpio_get_value(GPIO_PTB3)) {
1106 printk(KERN_INFO "USB1 function is selected\n");
1107 usb1_common_device.name = "r8a66597_udc";
1108 } else {
1109 printk(KERN_INFO "USB1 host is selected\n");
1110 usb1_common_device.name = "r8a66597_hcd";
1111 }
1112
fa3ba51b
KM		 1113 /* enable LCDC */
1114 gpio_request(GPIO_FN_LCDD23, NULL);
1115 gpio_request(GPIO_FN_LCDD22, NULL);
1116 gpio_request(GPIO_FN_LCDD21, NULL);
1117 gpio_request(GPIO_FN_LCDD20, NULL);
1118 gpio_request(GPIO_FN_LCDD19, NULL);
1119 gpio_request(GPIO_FN_LCDD18, NULL);
1120 gpio_request(GPIO_FN_LCDD17, NULL);
1121 gpio_request(GPIO_FN_LCDD16, NULL);
1122 gpio_request(GPIO_FN_LCDD15, NULL);
1123 gpio_request(GPIO_FN_LCDD14, NULL);
1124 gpio_request(GPIO_FN_LCDD13, NULL);
1125 gpio_request(GPIO_FN_LCDD12, NULL);
1126 gpio_request(GPIO_FN_LCDD11, NULL);
1127 gpio_request(GPIO_FN_LCDD10, NULL);
1128 gpio_request(GPIO_FN_LCDD9, NULL);
1129 gpio_request(GPIO_FN_LCDD8, NULL);
1130 gpio_request(GPIO_FN_LCDD7, NULL);
1131 gpio_request(GPIO_FN_LCDD6, NULL);
1132 gpio_request(GPIO_FN_LCDD5, NULL);
1133 gpio_request(GPIO_FN_LCDD4, NULL);
1134 gpio_request(GPIO_FN_LCDD3, NULL);
1135 gpio_request(GPIO_FN_LCDD2, NULL);
1136 gpio_request(GPIO_FN_LCDD1, NULL);
1137 gpio_request(GPIO_FN_LCDD0, NULL);
1138 gpio_request(GPIO_FN_LCDDISP, NULL);
1139 gpio_request(GPIO_FN_LCDHSYN, NULL);
1140 gpio_request(GPIO_FN_LCDDCK, NULL);
1141 gpio_request(GPIO_FN_LCDVSYN, NULL);
1142 gpio_request(GPIO_FN_LCDDON, NULL);
1143 gpio_request(GPIO_FN_LCDLCLK, NULL);
9d56dd3b 1144 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
fa3ba51b
KM		 1145
1146 gpio_request(GPIO_PTE6, NULL);
1147 gpio_request(GPIO_PTU1, NULL);
1148 gpio_request(GPIO_PTR1, NULL);
1149 gpio_request(GPIO_PTA2, NULL);
1150 gpio_direction_input(GPIO_PTE6);
1151 gpio_direction_output(GPIO_PTU1, 0);
1152 gpio_direction_output(GPIO_PTR1, 0);
1153 gpio_direction_output(GPIO_PTA2, 0);
1154
82b33221 1155 /* I/O buffer drive ability is high */
9d56dd3b 1156 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
ea15edb2 1157
fa3ba51b
KM		 1158 if (gpio_get_value(GPIO_PTE6)) {
1159 /* DVI */
1160 lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
44432407 1161 lcdc_info.ch[0].clock_divider = 1;
93ff2598
LP		 1162 lcdc_info.ch[0].lcd_modes = ecovec_dvi_modes;
1163 lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_dvi_modes);
fa3ba51b
KM		 1164
1165 gpio_set_value(GPIO_PTA2, 1);
1166 gpio_set_value(GPIO_PTU1, 1);
1167 } else {
1168 /* Panel */
ea15edb2 1169 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
44432407 1170 lcdc_info.ch[0].clock_divider = 2;
93ff2598
LP		 1171 lcdc_info.ch[0].lcd_modes = ecovec_lcd_modes;
1172 lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_lcd_modes);
ea15edb2
KM		 1173
1174 gpio_set_value(GPIO_PTR1, 1);
1175
1176 /* FIXME
1177 *
1178 * LCDDON control is needed for Panel,
1179 * but current sh_mobile_lcdc driver doesn't control it.
1180 * It is temporary correspondence
1181 */
1182 gpio_request(GPIO_PTF4, NULL);
1183 gpio_direction_output(GPIO_PTF4, 1);
8810e055
KM		 1184
1185 /* enable TouchScreen */
1186 i2c_register_board_info(0, &ts_i2c_clients, 1);
fcb8918f 1187 irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
fa3ba51b
KM		 1188 }
1189
2153ad32
KM		 1190 /* enable CEU0 */
1191 gpio_request(GPIO_FN_VIO0_D15, NULL);
1192 gpio_request(GPIO_FN_VIO0_D14, NULL);
1193 gpio_request(GPIO_FN_VIO0_D13, NULL);
1194 gpio_request(GPIO_FN_VIO0_D12, NULL);
1195 gpio_request(GPIO_FN_VIO0_D11, NULL);
1196 gpio_request(GPIO_FN_VIO0_D10, NULL);
1197 gpio_request(GPIO_FN_VIO0_D9, NULL);
1198 gpio_request(GPIO_FN_VIO0_D8, NULL);
1199 gpio_request(GPIO_FN_VIO0_D7, NULL);
1200 gpio_request(GPIO_FN_VIO0_D6, NULL);
1201 gpio_request(GPIO_FN_VIO0_D5, NULL);
1202 gpio_request(GPIO_FN_VIO0_D4, NULL);
1203 gpio_request(GPIO_FN_VIO0_D3, NULL);
1204 gpio_request(GPIO_FN_VIO0_D2, NULL);
1205 gpio_request(GPIO_FN_VIO0_D1, NULL);
1206 gpio_request(GPIO_FN_VIO0_D0, NULL);
1207 gpio_request(GPIO_FN_VIO0_VD, NULL);
1208 gpio_request(GPIO_FN_VIO0_CLK, NULL);
1209 gpio_request(GPIO_FN_VIO0_FLD, NULL);
1210 gpio_request(GPIO_FN_VIO0_HD, NULL);
1211 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
1212
1213 /* enable CEU1 */
1214 gpio_request(GPIO_FN_VIO1_D7, NULL);
1215 gpio_request(GPIO_FN_VIO1_D6, NULL);
1216 gpio_request(GPIO_FN_VIO1_D5, NULL);
1217 gpio_request(GPIO_FN_VIO1_D4, NULL);
1218 gpio_request(GPIO_FN_VIO1_D3, NULL);
1219 gpio_request(GPIO_FN_VIO1_D2, NULL);
1220 gpio_request(GPIO_FN_VIO1_D1, NULL);
1221 gpio_request(GPIO_FN_VIO1_D0, NULL);
1222 gpio_request(GPIO_FN_VIO1_FLD, NULL);
1223 gpio_request(GPIO_FN_VIO1_HD, NULL);
1224 gpio_request(GPIO_FN_VIO1_VD, NULL);
1225 gpio_request(GPIO_FN_VIO1_CLK, NULL);
1226 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
1227
e9103e74
KM		 1228 /* enable KEYSC */
1229 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
1230 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
1231 gpio_request(GPIO_FN_KEYOUT3, NULL);
1232 gpio_request(GPIO_FN_KEYOUT2, NULL);
1233 gpio_request(GPIO_FN_KEYOUT1, NULL);
1234 gpio_request(GPIO_FN_KEYOUT0, NULL);
1235 gpio_request(GPIO_FN_KEYIN0, NULL);
1236
064a16dc
KM		 1237 /* enable user debug switch */
1238 gpio_request(GPIO_PTR0, NULL);
1239 gpio_request(GPIO_PTR4, NULL);
1240 gpio_request(GPIO_PTR5, NULL);
1241 gpio_request(GPIO_PTR6, NULL);
1242 gpio_direction_input(GPIO_PTR0);
1243 gpio_direction_input(GPIO_PTR4);
1244 gpio_direction_input(GPIO_PTR5);
1245 gpio_direction_input(GPIO_PTR6);
1246
4eb80146
GL		 1247 /* SD-card slot CN11 */
1248 /* Card-detect, used on CN11, either with SDHI0 or with SPI */
1249 gpio_request(GPIO_PTY7, NULL);
1250 gpio_direction_input(GPIO_PTY7);
1251
5744c881 1252#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1ce4da7a 1253 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
96987d96
KM		 1254 gpio_request(GPIO_FN_SDHI0WP, NULL);
1255 gpio_request(GPIO_FN_SDHI0CMD, NULL);
1256 gpio_request(GPIO_FN_SDHI0CLK, NULL);
1257 gpio_request(GPIO_FN_SDHI0D3, NULL);
1258 gpio_request(GPIO_FN_SDHI0D2, NULL);
1259 gpio_request(GPIO_FN_SDHI0D1, NULL);
1260 gpio_request(GPIO_FN_SDHI0D0, NULL);
98779ad8
MD		 1261 gpio_request(GPIO_PTB6, NULL);
1262 gpio_direction_output(GPIO_PTB6, 0);
1ce4da7a
MD		 1263#else
1264 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1265 gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1266 gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1267 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1268 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
1269 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
1270 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1271 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1272 gpio_request(GPIO_PTY6, NULL); /* write protect */
1273 gpio_direction_input(GPIO_PTY6);
1ce4da7a
MD		 1274
1275 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1276#endif
96987d96 1277
4eb80146
GL		 1278 /* MMC/SD-card slot CN12 */
1279#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1280 /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
1281 gpio_request(GPIO_FN_MMC_D7, NULL);
1282 gpio_request(GPIO_FN_MMC_D6, NULL);
1283 gpio_request(GPIO_FN_MMC_D5, NULL);
1284 gpio_request(GPIO_FN_MMC_D4, NULL);
1285 gpio_request(GPIO_FN_MMC_D3, NULL);
1286 gpio_request(GPIO_FN_MMC_D2, NULL);
1287 gpio_request(GPIO_FN_MMC_D1, NULL);
1288 gpio_request(GPIO_FN_MMC_D0, NULL);
1289 gpio_request(GPIO_FN_MMC_CLK, NULL);
1290 gpio_request(GPIO_FN_MMC_CMD, NULL);
1291 gpio_request(GPIO_PTB7, NULL);
1292 gpio_direction_output(GPIO_PTB7, 0);
1293
1294 cn12_enabled = true;
1295#elif defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1296 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
1297 gpio_request(GPIO_FN_SDHI1WP, NULL);
1298 gpio_request(GPIO_FN_SDHI1CMD, NULL);
1299 gpio_request(GPIO_FN_SDHI1CLK, NULL);
1300 gpio_request(GPIO_FN_SDHI1D3, NULL);
1301 gpio_request(GPIO_FN_SDHI1D2, NULL);
1302 gpio_request(GPIO_FN_SDHI1D1, NULL);
1303 gpio_request(GPIO_FN_SDHI1D0, NULL);
1304 gpio_request(GPIO_PTB7, NULL);
1305 gpio_direction_output(GPIO_PTB7, 0);
1306
1307 /* Card-detect, used on CN12 with SDHI1 */
1308 gpio_request(GPIO_PTW7, NULL);
1309 gpio_direction_input(GPIO_PTW7);
1310
1311 cn12_enabled = true;
1312#endif
1313
1314 if (cn12_enabled)
1315 /* I/O buffer drive ability is high for CN12 */
1316 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000,
1317 IODRIVEA);
1318
207efd07
KM		 1319 /* enable Video */
1320 gpio_request(GPIO_PTU2, NULL);
1321 gpio_direction_output(GPIO_PTU2, 1);
1322
9aa25d64
KM		 1323 /* enable Camera */
1324 gpio_request(GPIO_PTA3, NULL);
1325 gpio_request(GPIO_PTA4, NULL);
1326 gpio_direction_output(GPIO_PTA3, 0);
1327 gpio_direction_output(GPIO_PTA4, 0);
1328
1980fdc4
KM		 1329 /* enable FSI */
1330 gpio_request(GPIO_FN_FSIMCKB, NULL);
1331 gpio_request(GPIO_FN_FSIIBSD, NULL);
1332 gpio_request(GPIO_FN_FSIOBSD, NULL);
1333 gpio_request(GPIO_FN_FSIIBBCK, NULL);
1334 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
1335 gpio_request(GPIO_FN_FSIOBBCK, NULL);
1336 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
1337 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1338
16afc9fb
KM		 1339 /* set SPU2 clock to 83.4 MHz */
1340 clk = clk_get(NULL, "spu_clk");
56ea5109 1341 if (!IS_ERR(clk)) {
10305853
KM		 1342 clk_set_rate(clk, clk_round_rate(clk, 83333333));
1343 clk_put(clk);
1344 }
16afc9fb 1345
1980fdc4
KM		 1346 /* change parent of FSI B */
1347 clk = clk_get(NULL, "fsib_clk");
56ea5109 1348 if (!IS_ERR(clk)) {
4bd5d259
KM		 1349 /* 48kHz dummy clock was used to make sure 1/1 divide */
1350 clk_set_rate(&sh7724_fsimckb_clk, 48000);
1351 clk_set_parent(clk, &sh7724_fsimckb_clk);
1352 clk_set_rate(clk, 48000);
10305853
KM		 1353 clk_put(clk);
1354 }
1980fdc4
KM		 1355
1356 gpio_request(GPIO_PTU0, NULL);
1357 gpio_direction_output(GPIO_PTU0, 0);
1358 mdelay(20);
1359
ea440783
NH		 1360 /* enable motion sensor */
1361 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1362 gpio_direction_input(GPIO_FN_INTC_IRQ1);
1363
6f26d19f
MD		 1364 /* set VPU clock to 166 MHz */
1365 clk = clk_get(NULL, "vpu_clk");
56ea5109 1366 if (!IS_ERR(clk)) {
10305853
KM		 1367 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1368 clk_put(clk);
1369 }
6f26d19f 1370
26365716
KM		 1371 /* enable IrDA */
1372 gpio_request(GPIO_FN_IRDA_OUT, NULL);
1373 gpio_request(GPIO_FN_IRDA_IN, NULL);
1374 gpio_request(GPIO_PTU5, NULL);
1375 gpio_direction_output(GPIO_PTU5, 0);
1376
125ecce6 1377 /* enable I2C device */
1980fdc4
KM		 1378 i2c_register_board_info(0, i2c0_devices,
1379 ARRAY_SIZE(i2c0_devices));
1380
125ecce6
KM		 1381 i2c_register_board_info(1, i2c1_devices,
1382 ARRAY_SIZE(i2c1_devices));
1383
92359a70 1384#if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
aee5ab0b
GL		 1385 /* VOU */
1386 gpio_request(GPIO_FN_DV_D15, NULL);
1387 gpio_request(GPIO_FN_DV_D14, NULL);
1388 gpio_request(GPIO_FN_DV_D13, NULL);
1389 gpio_request(GPIO_FN_DV_D12, NULL);
1390 gpio_request(GPIO_FN_DV_D11, NULL);
1391 gpio_request(GPIO_FN_DV_D10, NULL);
1392 gpio_request(GPIO_FN_DV_D9, NULL);
1393 gpio_request(GPIO_FN_DV_D8, NULL);
1394 gpio_request(GPIO_FN_DV_CLKI, NULL);
1395 gpio_request(GPIO_FN_DV_CLK, NULL);
1396 gpio_request(GPIO_FN_DV_VSYNC, NULL);
1397 gpio_request(GPIO_FN_DV_HSYNC, NULL);
1398
1399 /* AK8813 power / reset sequence */
1400 gpio_request(GPIO_PTG4, NULL);
1401 gpio_request(GPIO_PTU3, NULL);
1402 /* Reset */
1403 gpio_direction_output(GPIO_PTG4, 0);
1404 /* Power down */
1405 gpio_direction_output(GPIO_PTU3, 1);
1406
1407 udelay(10);
1408
1409 /* Power up, reset */
1410 gpio_set_value(GPIO_PTU3, 0);
1411
1412 udelay(10);
1413
1414 /* Remove reset */
1415 gpio_set_value(GPIO_PTG4, 1);
92359a70 1416#endif
aee5ab0b 1417
4138b740
KM		 1418 return platform_add_devices(ecovec_devices,
1419 ARRAY_SIZE(ecovec_devices));
1420}
4907d57f
KM		 1421arch_initcall(arch_setup);
1422
1423static int __init devices_setup(void)
1424{
376abbb4 1425 sh_eth_init(&sh_eth_plat);
4907d57f
KM		 1426 return 0;
1427}
1428device_initcall(devices_setup);
1429
4138b740
KM		 1430static struct sh_machine_vector mv_ecovec __initmv = {
1431 .mv_name = "R0P7724 (EcoVec)",
1432};
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