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1/*
2 * Copyright (C) 2009 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/device.h>
13#include <linux/platform_device.h>
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14#include <linux/mmc/host.h>
15#include <linux/mmc/sh_mmcif.h>
960b9e7e 16#include <linux/mmc/sh_mobile_sdhi.h>
4138b740 17#include <linux/mtd/physmap.h>
357002b9 18#include <linux/mfd/tmio.h>
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19#include <linux/gpio.h>
20#include <linux/interrupt.h>
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21#include <linux/io.h>
22#include <linux/delay.h>
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23#include <linux/regulator/fixed.h>
24#include <linux/regulator/machine.h>
907050a3 25#include <linux/usb/r8a66597.h>
fb2e7394 26#include <linux/usb/renesas_usbhs.h>
4907d57f 27#include <linux/i2c.h>
8810e055 28#include <linux/i2c/tsc2007.h>
1ce4da7a
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29#include <linux/spi/spi.h>
30#include <linux/spi/sh_msiof.h>
31#include <linux/spi/mmc_spi.h>
e9103e74 32#include <linux/input.h>
fc1d003d 33#include <linux/input/sh_keysc.h>
fe79f919 34#include <linux/platform_data/gpio_backlight.h>
cf8e56bf 35#include <linux/sh_eth.h>
9307d115 36#include <linux/sh_intc.h>
a1ad8033 37#include <linux/videodev2.h>
fa3ba51b 38#include <video/sh_mobile_lcdc.h>
1980fdc4 39#include <sound/sh_fsi.h>
064bfada 40#include <sound/simple_card.h>
2153ad32 41#include <media/sh_mobile_ceu.h>
a1ad8033 42#include <media/soc_camera.h>
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43#include <media/i2c/tw9910.h>
44#include <media/i2c/mt9t112.h>
4138b740 45#include <asm/heartbeat.h>
a991801a 46#include <asm/clock.h>
eb0cd9e8 47#include <asm/suspend.h>
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48#include <cpu/sh7724.h>
49
50/*
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51 * Address Interface BusWidth
52 *-----------------------------------------
53 * 0x0000_0000 uboot 16bit
54 * 0x0004_0000 Linux romImage 16bit
55 * 0x0014_0000 MTD for Linux 16bit
56 * 0x0400_0000 Internal I/O 16/32bit
57 * 0x0800_0000 DRAM 32bit
58 * 0x1800_0000 MFI 16bit
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59 */
60
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61/* SWITCH
62 *------------------------------
63 * DS2[1] = FlashROM write protect ON : write protect
64 * OFF : No write protect
65 * DS2[2] = RMII / TS, SCIF ON : RMII
66 * OFF : TS, SCIF3
67 * DS2[3] = Camera / Video ON : Camera
68 * OFF : NTSC/PAL (IN)
69 * DS2[5] = NTSC_OUT Clock ON : On board OSC
70 * OFF : SH7724 DV_CLK
71 * DS2[6-7] = MMC / SD ON-OFF : SD
72 * OFF-ON : MMC
73 */
74
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75/*
76 * FSI - DA7210
77 *
78 * it needs amixer settings for playing
79 *
80 * amixer set 'HeadPhone' 80
81 * amixer set 'Out Mixer Left DAC Left' on
82 * amixer set 'Out Mixer Right DAC Right' on
83 */
84
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85/* Heartbeat */
86static unsigned char led_pos[] = { 0, 1, 2, 3 };
a09d2831 87
4138b740 88static struct heartbeat_data heartbeat_data = {
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89 .nr_bits = 4,
90 .bit_pos = led_pos,
91};
92
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93static struct resource heartbeat_resource = {
94 .start = 0xA405012C, /* PTG */
95 .end = 0xA405012E - 1,
96 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
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97};
98
99static struct platform_device heartbeat_device = {
100 .name = "heartbeat",
101 .id = -1,
102 .dev = {
103 .platform_data = &heartbeat_data,
104 },
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105 .num_resources = 1,
106 .resource = &heartbeat_resource,
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107};
108
109/* MTD */
110static struct mtd_partition nor_flash_partitions[] = {
111 {
b7056bc1 112 .name = "boot loader",
4138b740 113 .offset = 0,
b7056bc1 114 .size = (5 * 1024 * 1024),
d5ce010c 115 .mask_flags = MTD_WRITEABLE, /* force read-only */
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116 }, {
117 .name = "free-area",
118 .offset = MTDPART_OFS_APPEND,
119 .size = MTDPART_SIZ_FULL,
120 },
121};
122
123static struct physmap_flash_data nor_flash_data = {
124 .width = 2,
125 .parts = nor_flash_partitions,
126 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
127};
128
129static struct resource nor_flash_resources[] = {
130 [0] = {
131 .name = "NOR Flash",
132 .start = 0x00000000,
133 .end = 0x03ffffff,
134 .flags = IORESOURCE_MEM,
135 }
136};
137
138static struct platform_device nor_flash_device = {
139 .name = "physmap-flash",
140 .resource = nor_flash_resources,
141 .num_resources = ARRAY_SIZE(nor_flash_resources),
142 .dev = {
143 .platform_data = &nor_flash_data,
144 },
145};
146
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147/* SH Eth */
148#define SH_ETH_ADDR (0xA4600000)
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149static struct resource sh_eth_resources[] = {
150 [0] = {
151 .start = SH_ETH_ADDR,
152 .end = SH_ETH_ADDR + 0x1FC,
153 .flags = IORESOURCE_MEM,
154 },
155 [1] = {
9307d115 156 .start = evt2irq(0xd60),
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157 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
158 },
159};
160
3ce09334 161static struct sh_eth_plat_data sh_eth_plat = {
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162 .phy = 0x1f, /* SMSC LAN8700 */
163 .edmac_endian = EDMAC_LITTLE_ENDIAN,
9055f895 164 .phy_interface = PHY_INTERFACE_MODE_MII,
acf3cc28 165 .ether_link_active_low = 1
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166};
167
168static struct platform_device sh_eth_device = {
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169 .name = "sh7724-ether",
170 .id = 0,
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171 .dev = {
172 .platform_data = &sh_eth_plat,
173 },
174 .num_resources = ARRAY_SIZE(sh_eth_resources),
175 .resource = sh_eth_resources,
176};
177
907050a3 178/* USB0 host */
3ce09334 179static void usb0_port_power(int port, int power)
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180{
181 gpio_set_value(GPIO_PTB4, power);
182}
183
184static struct r8a66597_platdata usb0_host_data = {
185 .on_chip = 1,
186 .port_power = usb0_port_power,
187};
188
189static struct resource usb0_host_resources[] = {
190 [0] = {
191 .start = 0xa4d80000,
192 .end = 0xa4d80124 - 1,
193 .flags = IORESOURCE_MEM,
194 },
195 [1] = {
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196 .start = evt2irq(0xa20),
197 .end = evt2irq(0xa20),
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198 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
199 },
200};
201
202static struct platform_device usb0_host_device = {
203 .name = "r8a66597_hcd",
204 .id = 0,
205 .dev = {
206 .dma_mask = NULL, /* not use dma */
207 .coherent_dma_mask = 0xffffffff,
208 .platform_data = &usb0_host_data,
209 },
210 .num_resources = ARRAY_SIZE(usb0_host_resources),
211 .resource = usb0_host_resources,
212};
213
3714a9a0 214/* USB1 host/function */
3ce09334 215static void usb1_port_power(int port, int power)
907050a3 216{
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217 gpio_set_value(GPIO_PTB5, power);
218}
219
3714a9a0 220static struct r8a66597_platdata usb1_common_data = {
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221 .on_chip = 1,
222 .port_power = usb1_port_power,
223};
224
3714a9a0 225static struct resource usb1_common_resources[] = {
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226 [0] = {
227 .start = 0xa4d90000,
228 .end = 0xa4d90124 - 1,
229 .flags = IORESOURCE_MEM,
230 },
231 [1] = {
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232 .start = evt2irq(0xa40),
233 .end = evt2irq(0xa40),
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234 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
235 },
236};
237
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238static struct platform_device usb1_common_device = {
239 /* .name will be added in arch_setup */
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240 .id = 1,
241 .dev = {
242 .dma_mask = NULL, /* not use dma */
243 .coherent_dma_mask = 0xffffffff,
3714a9a0 244 .platform_data = &usb1_common_data,
907050a3 245 },
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246 .num_resources = ARRAY_SIZE(usb1_common_resources),
247 .resource = usb1_common_resources,
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248};
249
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250/*
251 * USBHS
252 */
253static int usbhs_get_id(struct platform_device *pdev)
254{
255 return gpio_get_value(GPIO_PTB3);
256}
257
225da3e3 258static int usbhs_phy_reset(struct platform_device *pdev)
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259{
260 /* enable vbus if HOST */
261 if (!gpio_get_value(GPIO_PTB3))
262 gpio_set_value(GPIO_PTB5, 1);
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263
264 return 0;
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265}
266
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267static struct renesas_usbhs_platform_info usbhs_info = {
268 .platform_callback = {
269 .get_id = usbhs_get_id,
1ca8fe38 270 .phy_reset = usbhs_phy_reset,
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271 },
272 .driver_param = {
273 .buswait_bwait = 4,
274 .detection_delay = 5,
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275 .d0_tx_id = SHDMA_SLAVE_USB1D0_TX,
276 .d0_rx_id = SHDMA_SLAVE_USB1D0_RX,
277 .d1_tx_id = SHDMA_SLAVE_USB1D1_TX,
278 .d1_rx_id = SHDMA_SLAVE_USB1D1_RX,
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279 },
280};
281
282static struct resource usbhs_resources[] = {
283 [0] = {
284 .start = 0xa4d90000,
285 .end = 0xa4d90124 - 1,
286 .flags = IORESOURCE_MEM,
287 },
288 [1] = {
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289 .start = evt2irq(0xa40),
290 .end = evt2irq(0xa40),
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291 .flags = IORESOURCE_IRQ,
292 },
293};
294
295static struct platform_device usbhs_device = {
296 .name = "renesas_usbhs",
297 .id = 1,
298 .dev = {
299 .dma_mask = NULL, /* not use dma */
300 .coherent_dma_mask = 0xffffffff,
301 .platform_data = &usbhs_info,
302 },
303 .num_resources = ARRAY_SIZE(usbhs_resources),
304 .resource = usbhs_resources,
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305};
306
fe79f919 307/* LCDC and backlight */
e04008eb 308static const struct fb_videomode ecovec_lcd_modes[] = {
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309 {
310 .name = "Panel",
311 .xres = 800,
312 .yres = 480,
313 .left_margin = 220,
314 .right_margin = 110,
315 .hsync_len = 70,
316 .upper_margin = 20,
317 .lower_margin = 5,
318 .vsync_len = 5,
319 .sync = 0, /* hsync and vsync are active low */
320 },
321};
322
e04008eb 323static const struct fb_videomode ecovec_dvi_modes[] = {
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324 {
325 .name = "DVI",
326 .xres = 1280,
327 .yres = 720,
328 .left_margin = 220,
329 .right_margin = 110,
330 .hsync_len = 40,
331 .upper_margin = 20,
332 .lower_margin = 5,
333 .vsync_len = 5,
334 .sync = 0, /* hsync and vsync are active low */
335 },
336};
337
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338static struct sh_mobile_lcdc_info lcdc_info = {
339 .ch[0] = {
340 .interface_type = RGB18,
341 .chan = LCDC_CHAN_MAINLCD,
edd153a3 342 .fourcc = V4L2_PIX_FMT_RGB565,
afaad83b 343 .panel_cfg = { /* 7.0 inch */
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344 .width = 152,
345 .height = 91,
346 },
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347 }
348};
349
350static struct resource lcdc_resources[] = {
351 [0] = {
352 .name = "LCDC",
353 .start = 0xfe940000,
a6f15ade 354 .end = 0xfe942fff,
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355 .flags = IORESOURCE_MEM,
356 },
357 [1] = {
9307d115 358 .start = evt2irq(0xf40),
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359 .flags = IORESOURCE_IRQ,
360 },
361};
362
363static struct platform_device lcdc_device = {
364 .name = "sh_mobile_lcdc_fb",
365 .num_resources = ARRAY_SIZE(lcdc_resources),
366 .resource = lcdc_resources,
367 .dev = {
368 .platform_data = &lcdc_info,
369 },
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370};
371
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372static struct gpio_backlight_platform_data gpio_backlight_data = {
373 .fbdev = &lcdc_device.dev,
374 .gpio = GPIO_PTR1,
375 .def_value = 1,
376 .name = "backlight",
377};
378
379static struct platform_device gpio_backlight_device = {
380 .name = "gpio-backlight",
381 .dev = {
382 .platform_data = &gpio_backlight_data,
383 },
384};
385
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386/* CEU0 */
387static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
388 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
389};
390
391static struct resource ceu0_resources[] = {
392 [0] = {
393 .name = "CEU0",
394 .start = 0xfe910000,
395 .end = 0xfe91009f,
396 .flags = IORESOURCE_MEM,
397 },
398 [1] = {
9307d115 399 .start = evt2irq(0x880),
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400 .flags = IORESOURCE_IRQ,
401 },
402 [2] = {
403 /* place holder for contiguous memory */
404 },
405};
406
407static struct platform_device ceu0_device = {
408 .name = "sh_mobile_ceu",
409 .id = 0, /* "ceu0" clock */
410 .num_resources = ARRAY_SIZE(ceu0_resources),
411 .resource = ceu0_resources,
412 .dev = {
413 .platform_data = &sh_mobile_ceu0_info,
414 },
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415};
416
417/* CEU1 */
418static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
419 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
420};
421
422static struct resource ceu1_resources[] = {
423 [0] = {
424 .name = "CEU1",
425 .start = 0xfe914000,
426 .end = 0xfe91409f,
427 .flags = IORESOURCE_MEM,
428 },
429 [1] = {
9307d115 430 .start = evt2irq(0x9e0),
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431 .flags = IORESOURCE_IRQ,
432 },
433 [2] = {
434 /* place holder for contiguous memory */
435 },
436};
437
438static struct platform_device ceu1_device = {
439 .name = "sh_mobile_ceu",
440 .id = 1, /* "ceu1" clock */
441 .num_resources = ARRAY_SIZE(ceu1_resources),
442 .resource = ceu1_resources,
443 .dev = {
444 .platform_data = &sh_mobile_ceu1_info,
445 },
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446};
447
125ecce6 448/* I2C device */
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449static struct i2c_board_info i2c0_devices[] = {
450 {
451 I2C_BOARD_INFO("da7210", 0x1a),
452 },
453};
454
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455static struct i2c_board_info i2c1_devices[] = {
456 {
457 I2C_BOARD_INFO("r2025sd", 0x32),
458 },
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459 {
460 I2C_BOARD_INFO("lis3lv02d", 0x1c),
9307d115 461 .irq = evt2irq(0x620),
ea440783 462 }
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463};
464
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465/* KEYSC */
466static struct sh_keysc_info keysc_info = {
467 .mode = SH_KEYSC_MODE_1,
468 .scan_timing = 3,
469 .delay = 50,
470 .kycr2_delay = 100,
471 .keycodes = { KEY_1, 0, 0, 0, 0,
472 KEY_2, 0, 0, 0, 0,
473 KEY_3, 0, 0, 0, 0,
474 KEY_4, 0, 0, 0, 0,
475 KEY_5, 0, 0, 0, 0,
476 KEY_6, 0, 0, 0, 0, },
477};
478
479static struct resource keysc_resources[] = {
480 [0] = {
481 .name = "KEYSC",
482 .start = 0x044b0000,
483 .end = 0x044b000f,
484 .flags = IORESOURCE_MEM,
485 },
486 [1] = {
9307d115 487 .start = evt2irq(0xbe0),
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488 .flags = IORESOURCE_IRQ,
489 },
490};
491
492static struct platform_device keysc_device = {
493 .name = "sh_keysc",
494 .id = 0, /* keysc0 clock */
495 .num_resources = ARRAY_SIZE(keysc_resources),
496 .resource = keysc_resources,
497 .dev = {
498 .platform_data = &keysc_info,
499 },
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500};
501
8810e055 502/* TouchScreen */
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503#define IRQ0 evt2irq(0x600)
504
07f9e5cf 505static int ts_get_pendown_state(struct device *dev)
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506{
507 int val = 0;
508 gpio_free(GPIO_FN_INTC_IRQ0);
509 gpio_request(GPIO_PTZ0, NULL);
510 gpio_direction_input(GPIO_PTZ0);
511
512 val = gpio_get_value(GPIO_PTZ0);
513
514 gpio_free(GPIO_PTZ0);
515 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
516
517 return val ? 0 : 1;
518}
519
520static int ts_init(void)
521{
522 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
523 return 0;
524}
525
3ce09334 526static struct tsc2007_platform_data tsc2007_info = {
8810e055 527 .model = 2007,
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528 .x_plate_ohms = 180,
529 .get_pendown_state = ts_get_pendown_state,
530 .init_platform_hw = ts_init,
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531};
532
533static struct i2c_board_info ts_i2c_clients = {
534 I2C_BOARD_INFO("tsc2007", 0x48),
535 .type = "tsc2007",
536 .platform_data = &tsc2007_info,
537 .irq = IRQ0,
538};
539
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540static struct regulator_consumer_supply cn12_power_consumers[] =
541{
542 REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
543 REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
544 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
545 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
546};
547
548static struct regulator_init_data cn12_power_init_data = {
549 .constraints = {
550 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
551 },
552 .num_consumer_supplies = ARRAY_SIZE(cn12_power_consumers),
553 .consumer_supplies = cn12_power_consumers,
554};
555
556static struct fixed_voltage_config cn12_power_info = {
557 .supply_name = "CN12 SD/MMC Vdd",
558 .microvolts = 3300000,
559 .gpio = GPIO_PTB7,
560 .enable_high = 1,
561 .init_data = &cn12_power_init_data,
562};
563
564static struct platform_device cn12_power = {
565 .name = "reg-fixed-voltage",
566 .id = 0,
567 .dev = {
568 .platform_data = &cn12_power_info,
569 },
570};
571
5744c881 572#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1238c684 573/* SDHI0 */
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574static struct regulator_consumer_supply sdhi0_power_consumers[] =
575{
576 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
577 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
578};
579
580static struct regulator_init_data sdhi0_power_init_data = {
581 .constraints = {
582 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
583 },
584 .num_consumer_supplies = ARRAY_SIZE(sdhi0_power_consumers),
585 .consumer_supplies = sdhi0_power_consumers,
586};
587
588static struct fixed_voltage_config sdhi0_power_info = {
589 .supply_name = "CN11 SD/MMC Vdd",
590 .microvolts = 3300000,
591 .gpio = GPIO_PTB6,
592 .enable_high = 1,
593 .init_data = &sdhi0_power_init_data,
594};
595
596static struct platform_device sdhi0_power = {
597 .name = "reg-fixed-voltage",
598 .id = 1,
599 .dev = {
600 .platform_data = &sdhi0_power_info,
601 },
602};
603
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604static struct tmio_mmc_data sdhi0_info = {
605 .chan_priv_tx = (void *)SHDMA_SLAVE_SDHI0_TX,
606 .chan_priv_rx = (void *)SHDMA_SLAVE_SDHI0_RX,
607 .capabilities = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
4eb80146 608 MMC_CAP_NEEDS_POLL,
84f11d5b 609 .flags = TMIO_MMC_USE_GPIO_CD,
afa2c940 610 .cd_gpio = GPIO_PTY7,
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611};
612
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613static struct resource sdhi0_resources[] = {
614 [0] = {
615 .name = "SDHI0",
616 .start = 0x04ce0000,
d80e9221 617 .end = 0x04ce00ff,
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618 .flags = IORESOURCE_MEM,
619 },
620 [1] = {
9307d115 621 .start = evt2irq(0xe80),
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622 .flags = IORESOURCE_IRQ,
623 },
624};
625
626static struct platform_device sdhi0_device = {
627 .name = "sh_mobile_sdhi",
628 .num_resources = ARRAY_SIZE(sdhi0_resources),
629 .resource = sdhi0_resources,
630 .id = 0,
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631 .dev = {
632 .platform_data = &sdhi0_info,
633 },
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634};
635
d4c191df
GL
636#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
637/* SDHI1 */
84f11d5b
KM
638static struct tmio_mmc_data sdhi1_info = {
639 .chan_priv_tx = (void *)SHDMA_SLAVE_SDHI1_TX,
640 .chan_priv_rx = (void *)SHDMA_SLAVE_SDHI1_RX,
641 .capabilities = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
4eb80146 642 MMC_CAP_NEEDS_POLL,
84f11d5b 643 .flags = TMIO_MMC_USE_GPIO_CD,
afa2c940 644 .cd_gpio = GPIO_PTW7,
98779ad8
MD
645};
646
96987d96
KM
647static struct resource sdhi1_resources[] = {
648 [0] = {
649 .name = "SDHI1",
650 .start = 0x04cf0000,
d80e9221 651 .end = 0x04cf00ff,
96987d96
KM
652 .flags = IORESOURCE_MEM,
653 },
654 [1] = {
9307d115 655 .start = evt2irq(0x4e0),
96987d96
KM
656 .flags = IORESOURCE_IRQ,
657 },
658};
659
660static struct platform_device sdhi1_device = {
661 .name = "sh_mobile_sdhi",
662 .num_resources = ARRAY_SIZE(sdhi1_resources),
663 .resource = sdhi1_resources,
664 .id = 1,
98779ad8
MD
665 .dev = {
666 .platform_data = &sdhi1_info,
667 },
96987d96 668};
1238c684 669#endif /* CONFIG_MMC_SH_MMCIF */
96987d96 670
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MD
671#else
672
9503e891 673/* MMC SPI */
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MD
674static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
675{
676 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
677}
678
679static struct mmc_spi_platform_data mmc_spi_info = {
1ce4da7a 680 .caps = MMC_CAP_NEEDS_POLL,
afa2c940 681 .caps2 = MMC_CAP2_RO_ACTIVE_HIGH,
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MD
682 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
683 .setpower = mmc_spi_setpower,
afa2c940
LP
684 .flags = MMC_SPI_USE_CD_GPIO | MMC_SPI_USE_RO_GPIO,
685 .cd_gpio = GPIO_PTY7,
686 .ro_gpio = GPIO_PTY6,
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MD
687};
688
689static struct spi_board_info spi_bus[] = {
690 {
691 .modalias = "mmc_spi",
692 .platform_data = &mmc_spi_info,
693 .max_speed_hz = 5000000,
694 .mode = SPI_MODE_0,
695 .controller_data = (void *) GPIO_PTM4,
696 },
697};
698
9503e891 699/* MSIOF0 */
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MD
700static struct sh_msiof_spi_info msiof0_data = {
701 .num_chipselect = 1,
702};
703
704static struct resource msiof0_resources[] = {
705 [0] = {
706 .name = "MSIOF0",
707 .start = 0xa4c40000,
708 .end = 0xa4c40063,
709 .flags = IORESOURCE_MEM,
710 },
711 [1] = {
9307d115 712 .start = evt2irq(0xc80),
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MD
713 .flags = IORESOURCE_IRQ,
714 },
715};
716
717static struct platform_device msiof0_device = {
718 .name = "spi_sh_msiof",
719 .id = 0, /* MSIOF0 */
720 .dev = {
721 .platform_data = &msiof0_data,
722 },
723 .num_resources = ARRAY_SIZE(msiof0_resources),
724 .resource = msiof0_resources,
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MD
725};
726
727#endif
728
9aa25d64 729/* I2C Video/Camera */
207efd07
KM
730static struct i2c_board_info i2c_camera[] = {
731 {
732 I2C_BOARD_INFO("tw9910", 0x45),
733 },
9aa25d64
KM
734 {
735 /* 1st camera */
736 I2C_BOARD_INFO("mt9t112", 0x3c),
737 },
738 {
739 /* 2nd camera */
740 I2C_BOARD_INFO("mt9t112", 0x3c),
741 },
207efd07
KM
742};
743
744/* tw9910 */
745static int tw9910_power(struct device *dev, int mode)
746{
747 int val = mode ? 0 : 1;
748
749 gpio_set_value(GPIO_PTU2, val);
750 if (mode)
751 mdelay(100);
752
753 return 0;
754}
755
756static struct tw9910_video_info tw9910_info = {
757 .buswidth = SOCAM_DATAWIDTH_8,
758 .mpout = TW9910_MPO_FIELD,
759};
760
761static struct soc_camera_link tw9910_link = {
762 .i2c_adapter_id = 0,
763 .bus_id = 1,
764 .power = tw9910_power,
765 .board_info = &i2c_camera[0],
207efd07
KM
766 .priv = &tw9910_info,
767};
768
9aa25d64
KM
769/* mt9t112 */
770static int mt9t112_power1(struct device *dev, int mode)
771{
772 gpio_set_value(GPIO_PTA3, mode);
773 if (mode)
774 mdelay(100);
775
776 return 0;
777}
778
779static struct mt9t112_camera_info mt9t112_info1 = {
780 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
781 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
782};
783
784static struct soc_camera_link mt9t112_link1 = {
785 .i2c_adapter_id = 0,
786 .power = mt9t112_power1,
787 .bus_id = 0,
788 .board_info = &i2c_camera[1],
9aa25d64
KM
789 .priv = &mt9t112_info1,
790};
791
792static int mt9t112_power2(struct device *dev, int mode)
793{
794 gpio_set_value(GPIO_PTA4, mode);
795 if (mode)
796 mdelay(100);
797
798 return 0;
799}
800
801static struct mt9t112_camera_info mt9t112_info2 = {
802 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
803 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
804};
805
806static struct soc_camera_link mt9t112_link2 = {
807 .i2c_adapter_id = 1,
808 .power = mt9t112_power2,
809 .bus_id = 1,
810 .board_info = &i2c_camera[2],
9aa25d64
KM
811 .priv = &mt9t112_info2,
812};
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KM
813
814static struct platform_device camera_devices[] = {
815 {
816 .name = "soc-camera-pdrv",
817 .id = 0,
818 .dev = {
819 .platform_data = &tw9910_link,
820 },
821 },
9aa25d64
KM
822 {
823 .name = "soc-camera-pdrv",
824 .id = 1,
825 .dev = {
826 .platform_data = &mt9t112_link1,
827 },
828 },
829 {
830 .name = "soc-camera-pdrv",
831 .id = 2,
832 .dev = {
833 .platform_data = &mt9t112_link2,
834 },
835 },
207efd07
KM
836};
837
1980fdc4 838/* FSI */
1980fdc4
KM
839static struct resource fsi_resources[] = {
840 [0] = {
841 .name = "FSI",
842 .start = 0xFE3C0000,
843 .end = 0xFE3C021d,
844 .flags = IORESOURCE_MEM,
845 },
846 [1] = {
9307d115 847 .start = evt2irq(0xf80),
1980fdc4
KM
848 .flags = IORESOURCE_IRQ,
849 },
850};
851
852static struct platform_device fsi_device = {
853 .name = "sh_fsi",
854 .id = 0,
855 .num_resources = ARRAY_SIZE(fsi_resources),
856 .resource = fsi_resources,
1980fdc4
KM
857};
858
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KM
859static struct asoc_simple_card_info fsi_da7210_info = {
860 .name = "DA7210",
861 .card = "FSIB-DA7210",
064bfada
KM
862 .codec = "da7210.0-001a",
863 .platform = "sh_fsi.0",
c7a507ee 864 .daifmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM,
a4a2992c
KM
865 .cpu_dai = {
866 .name = "fsib-dai",
a4a2992c
KM
867 },
868 .codec_dai = {
869 .name = "da7210-hifi",
a4a2992c 870 },
064bfada
KM
871};
872
873static struct platform_device fsi_da7210_device = {
874 .name = "asoc-simple-card",
875 .dev = {
876 .platform_data = &fsi_da7210_info,
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KM
877 .coherent_dma_mask = DMA_BIT_MASK(32),
878 .dma_mask = &fsi_da7210_device.dev.coherent_dma_mask,
064bfada
KM
879 },
880};
881
882
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KM
883/* IrDA */
884static struct resource irda_resources[] = {
885 [0] = {
886 .name = "IrDA",
887 .start = 0xA45D0000,
888 .end = 0xA45D0049,
889 .flags = IORESOURCE_MEM,
890 },
891 [1] = {
9307d115 892 .start = evt2irq(0x480),
26365716
KM
893 .flags = IORESOURCE_IRQ,
894 },
895};
896
897static struct platform_device irda_device = {
898 .name = "sh_sir",
899 .num_resources = ARRAY_SIZE(irda_resources),
900 .resource = irda_resources,
901};
902
b5dcee22 903#include <media/i2c/ak881x.h>
aee5ab0b
GL
904#include <media/sh_vou.h>
905
3ce09334 906static struct ak881x_pdata ak881x_pdata = {
aee5ab0b
GL
907 .flags = AK881X_IF_MODE_SLAVE,
908};
909
910static struct i2c_board_info ak8813 = {
911 I2C_BOARD_INFO("ak8813", 0x20),
912 .platform_data = &ak881x_pdata,
913};
914
3ce09334 915static struct sh_vou_pdata sh_vou_pdata = {
aee5ab0b
GL
916 .bus_fmt = SH_VOU_BUS_8BIT,
917 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
918 .board_info = &ak8813,
919 .i2c_adap = 0,
aee5ab0b
GL
920};
921
922static struct resource sh_vou_resources[] = {
923 [0] = {
924 .start = 0xfe960000,
925 .end = 0xfe962043,
926 .flags = IORESOURCE_MEM,
927 },
928 [1] = {
9307d115 929 .start = evt2irq(0x8e0),
aee5ab0b
GL
930 .flags = IORESOURCE_IRQ,
931 },
932};
933
934static struct platform_device vou_device = {
935 .name = "sh-vou",
936 .id = -1,
937 .num_resources = ARRAY_SIZE(sh_vou_resources),
938 .resource = sh_vou_resources,
939 .dev = {
940 .platform_data = &sh_vou_pdata,
941 },
aee5ab0b
GL
942};
943
5744c881 944#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1238c684 945/* SH_MMCIF */
1238c684
YG
946static struct resource sh_mmcif_resources[] = {
947 [0] = {
948 .name = "SH_MMCIF",
949 .start = 0xA4CA0000,
950 .end = 0xA4CA00FF,
951 .flags = IORESOURCE_MEM,
952 },
953 [1] = {
954 /* MMC2I */
9307d115 955 .start = evt2irq(0x5a0),
1238c684
YG
956 .flags = IORESOURCE_IRQ,
957 },
958 [2] = {
959 /* MMC3I */
9307d115 960 .start = evt2irq(0x5c0),
1238c684
YG
961 .flags = IORESOURCE_IRQ,
962 },
963};
964
3ce09334 965static struct sh_mmcif_plat_data sh_mmcif_plat = {
1238c684
YG
966 .sup_pclk = 0, /* SH7724: Max Pclk/2 */
967 .caps = MMC_CAP_4_BIT_DATA |
968 MMC_CAP_8_BIT_DATA |
969 MMC_CAP_NEEDS_POLL,
970 .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
971};
972
973static struct platform_device sh_mmcif_device = {
974 .name = "sh_mmcif",
975 .id = 0,
976 .dev = {
977 .platform_data = &sh_mmcif_plat,
978 },
979 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
980 .resource = sh_mmcif_resources,
981};
982#endif
983
4138b740
KM
984static struct platform_device *ecovec_devices[] __initdata = {
985 &heartbeat_device,
986 &nor_flash_device,
35a35408 987 &sh_eth_device,
907050a3 988 &usb0_host_device,
3714a9a0 989 &usb1_common_device,
fb2e7394 990 &usbhs_device,
fa3ba51b 991 &lcdc_device,
fe79f919 992 &gpio_backlight_device,
2153ad32
KM
993 &ceu0_device,
994 &ceu1_device,
e9103e74 995 &keysc_device,
d4c191df 996 &cn12_power,
5744c881 997#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
d4c191df 998 &sdhi0_power,
96987d96 999 &sdhi0_device,
5744c881 1000#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
96987d96 1001 &sdhi1_device,
1238c684 1002#endif
1ce4da7a
MD
1003#else
1004 &msiof0_device,
1005#endif
207efd07 1006 &camera_devices[0],
9aa25d64
KM
1007 &camera_devices[1],
1008 &camera_devices[2],
1980fdc4 1009 &fsi_device,
064bfada 1010 &fsi_da7210_device,
26365716 1011 &irda_device,
aee5ab0b 1012 &vou_device,
5744c881 1013#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1238c684
YG
1014 &sh_mmcif_device,
1015#endif
4138b740
KM
1016};
1017
6b3b5575 1018#ifdef CONFIG_I2C
4907d57f
KM
1019#define EEPROM_ADDR 0x50
1020static u8 mac_read(struct i2c_adapter *a, u8 command)
1021{
1022 struct i2c_msg msg[2];
1023 u8 buf;
1024 int ret;
1025
1026 msg[0].addr = EEPROM_ADDR;
1027 msg[0].flags = 0;
1028 msg[0].len = 1;
1029 msg[0].buf = &command;
1030
1031 msg[1].addr = EEPROM_ADDR;
1032 msg[1].flags = I2C_M_RD;
1033 msg[1].len = 1;
1034 msg[1].buf = &buf;
1035
1036 ret = i2c_transfer(a, msg, 2);
1037 if (ret < 0) {
1038 printk(KERN_ERR "error %d\n", ret);
1039 buf = 0xff;
1040 }
1041
1042 return buf;
1043}
1044
376abbb4 1045static void __init sh_eth_init(struct sh_eth_plat_data *pd)
4907d57f
KM
1046{
1047 struct i2c_adapter *a = i2c_get_adapter(1);
4907d57f
KM
1048 int i;
1049
1050 if (!a) {
1051 pr_err("can not get I2C 1\n");
1052 return;
1053 }
1054
25985edc 1055 /* read MAC address from EEPROM */
376abbb4
MD
1056 for (i = 0; i < sizeof(pd->mac_addr); i++) {
1057 pd->mac_addr[i] = mac_read(a, 0x10 + i);
4907d57f
KM
1058 msleep(10);
1059 }
b230eb32
KM
1060
1061 i2c_put_adapter(a);
4907d57f 1062}
6b3b5575
MD
1063#else
1064static void __init sh_eth_init(struct sh_eth_plat_data *pd)
1065{
1066 pr_err("unable to read sh_eth MAC address\n");
1067}
1068#endif
4907d57f 1069
fa3ba51b 1070#define PORT_HIZA 0xA4050158
ea15edb2 1071#define IODRIVEA 0xA405018A
eb0cd9e8
MD
1072
1073extern char ecovec24_sdram_enter_start;
1074extern char ecovec24_sdram_enter_end;
1075extern char ecovec24_sdram_leave_start;
1076extern char ecovec24_sdram_leave_end;
1077
4907d57f 1078static int __init arch_setup(void)
4138b740 1079{
1980fdc4 1080 struct clk *clk;
4eb80146 1081 bool cn12_enabled = false;
1980fdc4 1082
eb0cd9e8 1083 /* register board specific self-refresh code */
2839bd61
MD
1084 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
1085 SUSP_SH_RSTANDBY,
eb0cd9e8
MD
1086 &ecovec24_sdram_enter_start,
1087 &ecovec24_sdram_enter_end,
1088 &ecovec24_sdram_leave_start,
1089 &ecovec24_sdram_leave_end);
1090
f78bab30
MD
1091 /* enable STATUS0, STATUS2 and PDSTATUS */
1092 gpio_request(GPIO_FN_STATUS0, NULL);
1093 gpio_request(GPIO_FN_STATUS2, NULL);
1094 gpio_request(GPIO_FN_PDSTATUS, NULL);
1095
4138b740
KM
1096 /* enable SCIFA0 */
1097 gpio_request(GPIO_FN_SCIF0_TXD, NULL);
1098 gpio_request(GPIO_FN_SCIF0_RXD, NULL);
4138b740
KM
1099
1100 /* enable debug LED */
1101 gpio_request(GPIO_PTG0, NULL);
1102 gpio_request(GPIO_PTG1, NULL);
1103 gpio_request(GPIO_PTG2, NULL);
1104 gpio_request(GPIO_PTG3, NULL);
b7056bc1
KM
1105 gpio_direction_output(GPIO_PTG0, 0);
1106 gpio_direction_output(GPIO_PTG1, 0);
1107 gpio_direction_output(GPIO_PTG2, 0);
1108 gpio_direction_output(GPIO_PTG3, 0);
9d56dd3b 1109 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
4138b740 1110
35a35408
KM
1111 /* enable SH-Eth */
1112 gpio_request(GPIO_PTA1, NULL);
1113 gpio_direction_output(GPIO_PTA1, 1);
1114 mdelay(20);
1115
1116 gpio_request(GPIO_FN_RMII_RXD0, NULL);
1117 gpio_request(GPIO_FN_RMII_RXD1, NULL);
1118 gpio_request(GPIO_FN_RMII_TXD0, NULL);
1119 gpio_request(GPIO_FN_RMII_TXD1, NULL);
1120 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
1121 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
1122 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
1123 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
1124 gpio_request(GPIO_FN_MDIO, NULL);
1125 gpio_request(GPIO_FN_MDC, NULL);
1126 gpio_request(GPIO_FN_LNKSTA, NULL);
1127
907050a3 1128 /* enable USB */
9d56dd3b
PM
1129 __raw_writew(0x0000, 0xA4D80000);
1130 __raw_writew(0x0000, 0xA4D90000);
907050a3
KM
1131 gpio_request(GPIO_PTB3, NULL);
1132 gpio_request(GPIO_PTB4, NULL);
1133 gpio_request(GPIO_PTB5, NULL);
1134 gpio_direction_input(GPIO_PTB3);
1135 gpio_direction_output(GPIO_PTB4, 0);
1136 gpio_direction_output(GPIO_PTB5, 0);
9d56dd3b
PM
1137 __raw_writew(0x0600, 0xa40501d4);
1138 __raw_writew(0x0600, 0xa4050192);
907050a3 1139
3714a9a0
KM
1140 if (gpio_get_value(GPIO_PTB3)) {
1141 printk(KERN_INFO "USB1 function is selected\n");
1142 usb1_common_device.name = "r8a66597_udc";
1143 } else {
1144 printk(KERN_INFO "USB1 host is selected\n");
1145 usb1_common_device.name = "r8a66597_hcd";
1146 }
1147
fa3ba51b
KM
1148 /* enable LCDC */
1149 gpio_request(GPIO_FN_LCDD23, NULL);
1150 gpio_request(GPIO_FN_LCDD22, NULL);
1151 gpio_request(GPIO_FN_LCDD21, NULL);
1152 gpio_request(GPIO_FN_LCDD20, NULL);
1153 gpio_request(GPIO_FN_LCDD19, NULL);
1154 gpio_request(GPIO_FN_LCDD18, NULL);
1155 gpio_request(GPIO_FN_LCDD17, NULL);
1156 gpio_request(GPIO_FN_LCDD16, NULL);
1157 gpio_request(GPIO_FN_LCDD15, NULL);
1158 gpio_request(GPIO_FN_LCDD14, NULL);
1159 gpio_request(GPIO_FN_LCDD13, NULL);
1160 gpio_request(GPIO_FN_LCDD12, NULL);
1161 gpio_request(GPIO_FN_LCDD11, NULL);
1162 gpio_request(GPIO_FN_LCDD10, NULL);
1163 gpio_request(GPIO_FN_LCDD9, NULL);
1164 gpio_request(GPIO_FN_LCDD8, NULL);
1165 gpio_request(GPIO_FN_LCDD7, NULL);
1166 gpio_request(GPIO_FN_LCDD6, NULL);
1167 gpio_request(GPIO_FN_LCDD5, NULL);
1168 gpio_request(GPIO_FN_LCDD4, NULL);
1169 gpio_request(GPIO_FN_LCDD3, NULL);
1170 gpio_request(GPIO_FN_LCDD2, NULL);
1171 gpio_request(GPIO_FN_LCDD1, NULL);
1172 gpio_request(GPIO_FN_LCDD0, NULL);
1173 gpio_request(GPIO_FN_LCDDISP, NULL);
1174 gpio_request(GPIO_FN_LCDHSYN, NULL);
1175 gpio_request(GPIO_FN_LCDDCK, NULL);
1176 gpio_request(GPIO_FN_LCDVSYN, NULL);
1177 gpio_request(GPIO_FN_LCDDON, NULL);
1178 gpio_request(GPIO_FN_LCDLCLK, NULL);
9d56dd3b 1179 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
fa3ba51b
KM
1180
1181 gpio_request(GPIO_PTE6, NULL);
1182 gpio_request(GPIO_PTU1, NULL);
fa3ba51b
KM
1183 gpio_request(GPIO_PTA2, NULL);
1184 gpio_direction_input(GPIO_PTE6);
1185 gpio_direction_output(GPIO_PTU1, 0);
fa3ba51b
KM
1186 gpio_direction_output(GPIO_PTA2, 0);
1187
82b33221 1188 /* I/O buffer drive ability is high */
9d56dd3b 1189 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
ea15edb2 1190
fa3ba51b
KM
1191 if (gpio_get_value(GPIO_PTE6)) {
1192 /* DVI */
1193 lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
44432407 1194 lcdc_info.ch[0].clock_divider = 1;
93ff2598
LP
1195 lcdc_info.ch[0].lcd_modes = ecovec_dvi_modes;
1196 lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_dvi_modes);
fa3ba51b 1197
fe79f919
LP
1198 /* No backlight */
1199 gpio_backlight_data.fbdev = NULL;
1200
fa3ba51b
KM
1201 gpio_set_value(GPIO_PTA2, 1);
1202 gpio_set_value(GPIO_PTU1, 1);
1203 } else {
1204 /* Panel */
ea15edb2 1205 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
44432407 1206 lcdc_info.ch[0].clock_divider = 2;
93ff2598
LP
1207 lcdc_info.ch[0].lcd_modes = ecovec_lcd_modes;
1208 lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_lcd_modes);
ea15edb2 1209
ea15edb2
KM
1210 /* FIXME
1211 *
1212 * LCDDON control is needed for Panel,
1213 * but current sh_mobile_lcdc driver doesn't control it.
1214 * It is temporary correspondence
1215 */
1216 gpio_request(GPIO_PTF4, NULL);
1217 gpio_direction_output(GPIO_PTF4, 1);
8810e055
KM
1218
1219 /* enable TouchScreen */
1220 i2c_register_board_info(0, &ts_i2c_clients, 1);
fcb8918f 1221 irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
fa3ba51b
KM
1222 }
1223
2153ad32
KM
1224 /* enable CEU0 */
1225 gpio_request(GPIO_FN_VIO0_D15, NULL);
1226 gpio_request(GPIO_FN_VIO0_D14, NULL);
1227 gpio_request(GPIO_FN_VIO0_D13, NULL);
1228 gpio_request(GPIO_FN_VIO0_D12, NULL);
1229 gpio_request(GPIO_FN_VIO0_D11, NULL);
1230 gpio_request(GPIO_FN_VIO0_D10, NULL);
1231 gpio_request(GPIO_FN_VIO0_D9, NULL);
1232 gpio_request(GPIO_FN_VIO0_D8, NULL);
1233 gpio_request(GPIO_FN_VIO0_D7, NULL);
1234 gpio_request(GPIO_FN_VIO0_D6, NULL);
1235 gpio_request(GPIO_FN_VIO0_D5, NULL);
1236 gpio_request(GPIO_FN_VIO0_D4, NULL);
1237 gpio_request(GPIO_FN_VIO0_D3, NULL);
1238 gpio_request(GPIO_FN_VIO0_D2, NULL);
1239 gpio_request(GPIO_FN_VIO0_D1, NULL);
1240 gpio_request(GPIO_FN_VIO0_D0, NULL);
1241 gpio_request(GPIO_FN_VIO0_VD, NULL);
1242 gpio_request(GPIO_FN_VIO0_CLK, NULL);
1243 gpio_request(GPIO_FN_VIO0_FLD, NULL);
1244 gpio_request(GPIO_FN_VIO0_HD, NULL);
1245 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
1246
1247 /* enable CEU1 */
1248 gpio_request(GPIO_FN_VIO1_D7, NULL);
1249 gpio_request(GPIO_FN_VIO1_D6, NULL);
1250 gpio_request(GPIO_FN_VIO1_D5, NULL);
1251 gpio_request(GPIO_FN_VIO1_D4, NULL);
1252 gpio_request(GPIO_FN_VIO1_D3, NULL);
1253 gpio_request(GPIO_FN_VIO1_D2, NULL);
1254 gpio_request(GPIO_FN_VIO1_D1, NULL);
1255 gpio_request(GPIO_FN_VIO1_D0, NULL);
1256 gpio_request(GPIO_FN_VIO1_FLD, NULL);
1257 gpio_request(GPIO_FN_VIO1_HD, NULL);
1258 gpio_request(GPIO_FN_VIO1_VD, NULL);
1259 gpio_request(GPIO_FN_VIO1_CLK, NULL);
1260 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
1261
e9103e74
KM
1262 /* enable KEYSC */
1263 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
1264 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
1265 gpio_request(GPIO_FN_KEYOUT3, NULL);
1266 gpio_request(GPIO_FN_KEYOUT2, NULL);
1267 gpio_request(GPIO_FN_KEYOUT1, NULL);
1268 gpio_request(GPIO_FN_KEYOUT0, NULL);
1269 gpio_request(GPIO_FN_KEYIN0, NULL);
1270
064a16dc
KM
1271 /* enable user debug switch */
1272 gpio_request(GPIO_PTR0, NULL);
1273 gpio_request(GPIO_PTR4, NULL);
1274 gpio_request(GPIO_PTR5, NULL);
1275 gpio_request(GPIO_PTR6, NULL);
1276 gpio_direction_input(GPIO_PTR0);
1277 gpio_direction_input(GPIO_PTR4);
1278 gpio_direction_input(GPIO_PTR5);
1279 gpio_direction_input(GPIO_PTR6);
1280
4eb80146 1281 /* SD-card slot CN11 */
5744c881 1282#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1ce4da7a 1283 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
96987d96
KM
1284 gpio_request(GPIO_FN_SDHI0WP, NULL);
1285 gpio_request(GPIO_FN_SDHI0CMD, NULL);
1286 gpio_request(GPIO_FN_SDHI0CLK, NULL);
1287 gpio_request(GPIO_FN_SDHI0D3, NULL);
1288 gpio_request(GPIO_FN_SDHI0D2, NULL);
1289 gpio_request(GPIO_FN_SDHI0D1, NULL);
1290 gpio_request(GPIO_FN_SDHI0D0, NULL);
1ce4da7a
MD
1291#else
1292 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1293 gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1294 gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1295 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1296 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
1297 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
1298 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1299 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1ce4da7a
MD
1300
1301 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1302#endif
96987d96 1303
4eb80146
GL
1304 /* MMC/SD-card slot CN12 */
1305#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1306 /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
1307 gpio_request(GPIO_FN_MMC_D7, NULL);
1308 gpio_request(GPIO_FN_MMC_D6, NULL);
1309 gpio_request(GPIO_FN_MMC_D5, NULL);
1310 gpio_request(GPIO_FN_MMC_D4, NULL);
1311 gpio_request(GPIO_FN_MMC_D3, NULL);
1312 gpio_request(GPIO_FN_MMC_D2, NULL);
1313 gpio_request(GPIO_FN_MMC_D1, NULL);
1314 gpio_request(GPIO_FN_MMC_D0, NULL);
1315 gpio_request(GPIO_FN_MMC_CLK, NULL);
1316 gpio_request(GPIO_FN_MMC_CMD, NULL);
4eb80146
GL
1317
1318 cn12_enabled = true;
1319#elif defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1320 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
1321 gpio_request(GPIO_FN_SDHI1WP, NULL);
1322 gpio_request(GPIO_FN_SDHI1CMD, NULL);
1323 gpio_request(GPIO_FN_SDHI1CLK, NULL);
1324 gpio_request(GPIO_FN_SDHI1D3, NULL);
1325 gpio_request(GPIO_FN_SDHI1D2, NULL);
1326 gpio_request(GPIO_FN_SDHI1D1, NULL);
1327 gpio_request(GPIO_FN_SDHI1D0, NULL);
4eb80146 1328
4eb80146
GL
1329 cn12_enabled = true;
1330#endif
1331
1332 if (cn12_enabled)
1333 /* I/O buffer drive ability is high for CN12 */
1334 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000,
1335 IODRIVEA);
1336
207efd07
KM
1337 /* enable Video */
1338 gpio_request(GPIO_PTU2, NULL);
1339 gpio_direction_output(GPIO_PTU2, 1);
1340
9aa25d64
KM
1341 /* enable Camera */
1342 gpio_request(GPIO_PTA3, NULL);
1343 gpio_request(GPIO_PTA4, NULL);
1344 gpio_direction_output(GPIO_PTA3, 0);
1345 gpio_direction_output(GPIO_PTA4, 0);
1346
1980fdc4
KM
1347 /* enable FSI */
1348 gpio_request(GPIO_FN_FSIMCKB, NULL);
1349 gpio_request(GPIO_FN_FSIIBSD, NULL);
1350 gpio_request(GPIO_FN_FSIOBSD, NULL);
1351 gpio_request(GPIO_FN_FSIIBBCK, NULL);
1352 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
1353 gpio_request(GPIO_FN_FSIOBBCK, NULL);
1354 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
1355 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1356
16afc9fb
KM
1357 /* set SPU2 clock to 83.4 MHz */
1358 clk = clk_get(NULL, "spu_clk");
56ea5109 1359 if (!IS_ERR(clk)) {
10305853
KM
1360 clk_set_rate(clk, clk_round_rate(clk, 83333333));
1361 clk_put(clk);
1362 }
16afc9fb 1363
1980fdc4
KM
1364 /* change parent of FSI B */
1365 clk = clk_get(NULL, "fsib_clk");
56ea5109 1366 if (!IS_ERR(clk)) {
4bd5d259
KM
1367 /* 48kHz dummy clock was used to make sure 1/1 divide */
1368 clk_set_rate(&sh7724_fsimckb_clk, 48000);
1369 clk_set_parent(clk, &sh7724_fsimckb_clk);
1370 clk_set_rate(clk, 48000);
10305853
KM
1371 clk_put(clk);
1372 }
1980fdc4
KM
1373
1374 gpio_request(GPIO_PTU0, NULL);
1375 gpio_direction_output(GPIO_PTU0, 0);
1376 mdelay(20);
1377
ea440783
NH
1378 /* enable motion sensor */
1379 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1380 gpio_direction_input(GPIO_FN_INTC_IRQ1);
1381
6f26d19f
MD
1382 /* set VPU clock to 166 MHz */
1383 clk = clk_get(NULL, "vpu_clk");
56ea5109 1384 if (!IS_ERR(clk)) {
10305853
KM
1385 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1386 clk_put(clk);
1387 }
6f26d19f 1388
26365716
KM
1389 /* enable IrDA */
1390 gpio_request(GPIO_FN_IRDA_OUT, NULL);
1391 gpio_request(GPIO_FN_IRDA_IN, NULL);
1392 gpio_request(GPIO_PTU5, NULL);
1393 gpio_direction_output(GPIO_PTU5, 0);
1394
125ecce6 1395 /* enable I2C device */
1980fdc4
KM
1396 i2c_register_board_info(0, i2c0_devices,
1397 ARRAY_SIZE(i2c0_devices));
1398
125ecce6
KM
1399 i2c_register_board_info(1, i2c1_devices,
1400 ARRAY_SIZE(i2c1_devices));
1401
92359a70 1402#if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
aee5ab0b
GL
1403 /* VOU */
1404 gpio_request(GPIO_FN_DV_D15, NULL);
1405 gpio_request(GPIO_FN_DV_D14, NULL);
1406 gpio_request(GPIO_FN_DV_D13, NULL);
1407 gpio_request(GPIO_FN_DV_D12, NULL);
1408 gpio_request(GPIO_FN_DV_D11, NULL);
1409 gpio_request(GPIO_FN_DV_D10, NULL);
1410 gpio_request(GPIO_FN_DV_D9, NULL);
1411 gpio_request(GPIO_FN_DV_D8, NULL);
1412 gpio_request(GPIO_FN_DV_CLKI, NULL);
1413 gpio_request(GPIO_FN_DV_CLK, NULL);
1414 gpio_request(GPIO_FN_DV_VSYNC, NULL);
1415 gpio_request(GPIO_FN_DV_HSYNC, NULL);
1416
1417 /* AK8813 power / reset sequence */
1418 gpio_request(GPIO_PTG4, NULL);
1419 gpio_request(GPIO_PTU3, NULL);
1420 /* Reset */
1421 gpio_direction_output(GPIO_PTG4, 0);
1422 /* Power down */
1423 gpio_direction_output(GPIO_PTU3, 1);
1424
1425 udelay(10);
1426
1427 /* Power up, reset */
1428 gpio_set_value(GPIO_PTU3, 0);
1429
1430 udelay(10);
1431
1432 /* Remove reset */
1433 gpio_set_value(GPIO_PTG4, 1);
92359a70 1434#endif
aee5ab0b 1435
4138b740
KM
1436 return platform_add_devices(ecovec_devices,
1437 ARRAY_SIZE(ecovec_devices));
1438}
4907d57f
KM
1439arch_initcall(arch_setup);
1440
1441static int __init devices_setup(void)
1442{
376abbb4 1443 sh_eth_init(&sh_eth_plat);
4907d57f
KM
1444 return 0;
1445}
1446device_initcall(devices_setup);
1447
4138b740
KM
1448static struct sh_machine_vector mv_ecovec __initmv = {
1449 .mv_name = "R0P7724 (EcoVec)",
1450};