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Merge branch 'common/core' into sh-latest
[mirror_ubuntu-jammy-kernel.git] / arch / sh / boards / mach-ecovec24 / setup.c
CommitLineData
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1/*
2 * Copyright (C) 2009 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/device.h>
13#include <linux/platform_device.h>
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14#include <linux/mmc/host.h>
15#include <linux/mmc/sh_mmcif.h>
960b9e7e 16#include <linux/mmc/sh_mobile_sdhi.h>
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17#include <linux/mtd/physmap.h>
18#include <linux/gpio.h>
19#include <linux/interrupt.h>
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20#include <linux/io.h>
21#include <linux/delay.h>
907050a3 22#include <linux/usb/r8a66597.h>
fb2e7394 23#include <linux/usb/renesas_usbhs.h>
4907d57f 24#include <linux/i2c.h>
8810e055 25#include <linux/i2c/tsc2007.h>
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26#include <linux/spi/spi.h>
27#include <linux/spi/sh_msiof.h>
28#include <linux/spi/mmc_spi.h>
e9103e74 29#include <linux/input.h>
fc1d003d 30#include <linux/input/sh_keysc.h>
fa3ba51b 31#include <video/sh_mobile_lcdc.h>
1980fdc4 32#include <sound/sh_fsi.h>
2153ad32 33#include <media/sh_mobile_ceu.h>
207efd07 34#include <media/tw9910.h>
9aa25d64 35#include <media/mt9t112.h>
4138b740 36#include <asm/heartbeat.h>
35a35408 37#include <asm/sh_eth.h>
a991801a 38#include <asm/clock.h>
eb0cd9e8 39#include <asm/suspend.h>
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40#include <cpu/sh7724.h>
41
42/*
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43 * Address Interface BusWidth
44 *-----------------------------------------
45 * 0x0000_0000 uboot 16bit
46 * 0x0004_0000 Linux romImage 16bit
47 * 0x0014_0000 MTD for Linux 16bit
48 * 0x0400_0000 Internal I/O 16/32bit
49 * 0x0800_0000 DRAM 32bit
50 * 0x1800_0000 MFI 16bit
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51 */
52
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53/* SWITCH
54 *------------------------------
55 * DS2[1] = FlashROM write protect ON : write protect
56 * OFF : No write protect
57 * DS2[2] = RMII / TS, SCIF ON : RMII
58 * OFF : TS, SCIF3
59 * DS2[3] = Camera / Video ON : Camera
60 * OFF : NTSC/PAL (IN)
61 * DS2[5] = NTSC_OUT Clock ON : On board OSC
62 * OFF : SH7724 DV_CLK
63 * DS2[6-7] = MMC / SD ON-OFF : SD
64 * OFF-ON : MMC
65 */
66
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67/* Heartbeat */
68static unsigned char led_pos[] = { 0, 1, 2, 3 };
a09d2831 69
4138b740 70static struct heartbeat_data heartbeat_data = {
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71 .nr_bits = 4,
72 .bit_pos = led_pos,
73};
74
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75static struct resource heartbeat_resource = {
76 .start = 0xA405012C, /* PTG */
77 .end = 0xA405012E - 1,
78 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
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79};
80
81static struct platform_device heartbeat_device = {
82 .name = "heartbeat",
83 .id = -1,
84 .dev = {
85 .platform_data = &heartbeat_data,
86 },
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87 .num_resources = 1,
88 .resource = &heartbeat_resource,
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89};
90
91/* MTD */
92static struct mtd_partition nor_flash_partitions[] = {
93 {
b7056bc1 94 .name = "boot loader",
4138b740 95 .offset = 0,
b7056bc1 96 .size = (5 * 1024 * 1024),
d5ce010c 97 .mask_flags = MTD_WRITEABLE, /* force read-only */
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98 }, {
99 .name = "free-area",
100 .offset = MTDPART_OFS_APPEND,
101 .size = MTDPART_SIZ_FULL,
102 },
103};
104
105static struct physmap_flash_data nor_flash_data = {
106 .width = 2,
107 .parts = nor_flash_partitions,
108 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
109};
110
111static struct resource nor_flash_resources[] = {
112 [0] = {
113 .name = "NOR Flash",
114 .start = 0x00000000,
115 .end = 0x03ffffff,
116 .flags = IORESOURCE_MEM,
117 }
118};
119
120static struct platform_device nor_flash_device = {
121 .name = "physmap-flash",
122 .resource = nor_flash_resources,
123 .num_resources = ARRAY_SIZE(nor_flash_resources),
124 .dev = {
125 .platform_data = &nor_flash_data,
126 },
127};
128
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129/* SH Eth */
130#define SH_ETH_ADDR (0xA4600000)
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131static struct resource sh_eth_resources[] = {
132 [0] = {
133 .start = SH_ETH_ADDR,
134 .end = SH_ETH_ADDR + 0x1FC,
135 .flags = IORESOURCE_MEM,
136 },
137 [1] = {
138 .start = 91,
139 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
140 },
141};
142
3ce09334 143static struct sh_eth_plat_data sh_eth_plat = {
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144 .phy = 0x1f, /* SMSC LAN8700 */
145 .edmac_endian = EDMAC_LITTLE_ENDIAN,
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146 .register_type = SH_ETH_REG_FAST_SH4,
147 .phy_interface = PHY_INTERFACE_MODE_MII,
acf3cc28 148 .ether_link_active_low = 1
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149};
150
151static struct platform_device sh_eth_device = {
152 .name = "sh-eth",
153 .id = 0,
154 .dev = {
155 .platform_data = &sh_eth_plat,
156 },
157 .num_resources = ARRAY_SIZE(sh_eth_resources),
158 .resource = sh_eth_resources,
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159 .archdata = {
160 .hwblk_id = HWBLK_ETHER,
161 },
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162};
163
907050a3 164/* USB0 host */
3ce09334 165static void usb0_port_power(int port, int power)
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166{
167 gpio_set_value(GPIO_PTB4, power);
168}
169
170static struct r8a66597_platdata usb0_host_data = {
171 .on_chip = 1,
172 .port_power = usb0_port_power,
173};
174
175static struct resource usb0_host_resources[] = {
176 [0] = {
177 .start = 0xa4d80000,
178 .end = 0xa4d80124 - 1,
179 .flags = IORESOURCE_MEM,
180 },
181 [1] = {
182 .start = 65,
183 .end = 65,
184 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
185 },
186};
187
188static struct platform_device usb0_host_device = {
189 .name = "r8a66597_hcd",
190 .id = 0,
191 .dev = {
192 .dma_mask = NULL, /* not use dma */
193 .coherent_dma_mask = 0xffffffff,
194 .platform_data = &usb0_host_data,
195 },
196 .num_resources = ARRAY_SIZE(usb0_host_resources),
197 .resource = usb0_host_resources,
198};
199
3714a9a0 200/* USB1 host/function */
3ce09334 201static void usb1_port_power(int port, int power)
907050a3 202{
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203 gpio_set_value(GPIO_PTB5, power);
204}
205
3714a9a0 206static struct r8a66597_platdata usb1_common_data = {
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207 .on_chip = 1,
208 .port_power = usb1_port_power,
209};
210
3714a9a0 211static struct resource usb1_common_resources[] = {
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212 [0] = {
213 .start = 0xa4d90000,
214 .end = 0xa4d90124 - 1,
215 .flags = IORESOURCE_MEM,
216 },
217 [1] = {
218 .start = 66,
219 .end = 66,
220 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
221 },
222};
223
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224static struct platform_device usb1_common_device = {
225 /* .name will be added in arch_setup */
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226 .id = 1,
227 .dev = {
228 .dma_mask = NULL, /* not use dma */
229 .coherent_dma_mask = 0xffffffff,
3714a9a0 230 .platform_data = &usb1_common_data,
907050a3 231 },
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232 .num_resources = ARRAY_SIZE(usb1_common_resources),
233 .resource = usb1_common_resources,
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234};
235
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236/*
237 * USBHS
238 */
239static int usbhs_get_id(struct platform_device *pdev)
240{
241 return gpio_get_value(GPIO_PTB3);
242}
243
244static struct renesas_usbhs_platform_info usbhs_info = {
245 .platform_callback = {
246 .get_id = usbhs_get_id,
247 },
248 .driver_param = {
249 .buswait_bwait = 4,
250 .detection_delay = 5,
251 },
252};
253
254static struct resource usbhs_resources[] = {
255 [0] = {
256 .start = 0xa4d90000,
257 .end = 0xa4d90124 - 1,
258 .flags = IORESOURCE_MEM,
259 },
260 [1] = {
261 .start = 66,
262 .end = 66,
263 .flags = IORESOURCE_IRQ,
264 },
265};
266
267static struct platform_device usbhs_device = {
268 .name = "renesas_usbhs",
269 .id = 1,
270 .dev = {
271 .dma_mask = NULL, /* not use dma */
272 .coherent_dma_mask = 0xffffffff,
273 .platform_data = &usbhs_info,
274 },
275 .num_resources = ARRAY_SIZE(usbhs_resources),
276 .resource = usbhs_resources,
277 .archdata = {
278 .hwblk_id = HWBLK_USB1,
279 },
280};
281
fa3ba51b 282/* LCDC */
e04008eb 283static const struct fb_videomode ecovec_lcd_modes[] = {
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284 {
285 .name = "Panel",
286 .xres = 800,
287 .yres = 480,
288 .left_margin = 220,
289 .right_margin = 110,
290 .hsync_len = 70,
291 .upper_margin = 20,
292 .lower_margin = 5,
293 .vsync_len = 5,
294 .sync = 0, /* hsync and vsync are active low */
295 },
296};
297
e04008eb 298static const struct fb_videomode ecovec_dvi_modes[] = {
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299 {
300 .name = "DVI",
301 .xres = 1280,
302 .yres = 720,
303 .left_margin = 220,
304 .right_margin = 110,
305 .hsync_len = 40,
306 .upper_margin = 20,
307 .lower_margin = 5,
308 .vsync_len = 5,
309 .sync = 0, /* hsync and vsync are active low */
310 },
311};
312
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313static int ecovec24_set_brightness(void *board_data, int brightness)
314{
315 gpio_set_value(GPIO_PTR1, brightness);
316
317 return 0;
318}
319
320static int ecovec24_get_brightness(void *board_data)
321{
322 return gpio_get_value(GPIO_PTR1);
323}
324
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325static struct sh_mobile_lcdc_info lcdc_info = {
326 .ch[0] = {
327 .interface_type = RGB18,
328 .chan = LCDC_CHAN_MAINLCD,
329 .bpp = 16,
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330 .lcd_size_cfg = { /* 7.0 inch */
331 .width = 152,
332 .height = 91,
333 },
334 .board_cfg = {
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335 .set_brightness = ecovec24_set_brightness,
336 .get_brightness = ecovec24_get_brightness,
337 },
338 .bl_info = {
339 .name = "sh_mobile_lcdc_bl",
340 .max_brightness = 1,
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341 },
342 }
343};
344
345static struct resource lcdc_resources[] = {
346 [0] = {
347 .name = "LCDC",
348 .start = 0xfe940000,
a6f15ade 349 .end = 0xfe942fff,
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350 .flags = IORESOURCE_MEM,
351 },
352 [1] = {
353 .start = 106,
354 .flags = IORESOURCE_IRQ,
355 },
356};
357
358static struct platform_device lcdc_device = {
359 .name = "sh_mobile_lcdc_fb",
360 .num_resources = ARRAY_SIZE(lcdc_resources),
361 .resource = lcdc_resources,
362 .dev = {
363 .platform_data = &lcdc_info,
364 },
365 .archdata = {
366 .hwblk_id = HWBLK_LCDC,
367 },
368};
369
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370/* CEU0 */
371static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
372 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
373};
374
375static struct resource ceu0_resources[] = {
376 [0] = {
377 .name = "CEU0",
378 .start = 0xfe910000,
379 .end = 0xfe91009f,
380 .flags = IORESOURCE_MEM,
381 },
382 [1] = {
383 .start = 52,
384 .flags = IORESOURCE_IRQ,
385 },
386 [2] = {
387 /* place holder for contiguous memory */
388 },
389};
390
391static struct platform_device ceu0_device = {
392 .name = "sh_mobile_ceu",
393 .id = 0, /* "ceu0" clock */
394 .num_resources = ARRAY_SIZE(ceu0_resources),
395 .resource = ceu0_resources,
396 .dev = {
397 .platform_data = &sh_mobile_ceu0_info,
398 },
399 .archdata = {
400 .hwblk_id = HWBLK_CEU0,
401 },
402};
403
404/* CEU1 */
405static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
406 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
407};
408
409static struct resource ceu1_resources[] = {
410 [0] = {
411 .name = "CEU1",
412 .start = 0xfe914000,
413 .end = 0xfe91409f,
414 .flags = IORESOURCE_MEM,
415 },
416 [1] = {
417 .start = 63,
418 .flags = IORESOURCE_IRQ,
419 },
420 [2] = {
421 /* place holder for contiguous memory */
422 },
423};
424
425static struct platform_device ceu1_device = {
426 .name = "sh_mobile_ceu",
427 .id = 1, /* "ceu1" clock */
428 .num_resources = ARRAY_SIZE(ceu1_resources),
429 .resource = ceu1_resources,
430 .dev = {
431 .platform_data = &sh_mobile_ceu1_info,
432 },
433 .archdata = {
434 .hwblk_id = HWBLK_CEU1,
435 },
436};
437
125ecce6 438/* I2C device */
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439static struct i2c_board_info i2c0_devices[] = {
440 {
441 I2C_BOARD_INFO("da7210", 0x1a),
442 },
443};
444
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445static struct i2c_board_info i2c1_devices[] = {
446 {
447 I2C_BOARD_INFO("r2025sd", 0x32),
448 },
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449 {
450 I2C_BOARD_INFO("lis3lv02d", 0x1c),
451 .irq = 33,
452 }
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453};
454
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455/* KEYSC */
456static struct sh_keysc_info keysc_info = {
457 .mode = SH_KEYSC_MODE_1,
458 .scan_timing = 3,
459 .delay = 50,
460 .kycr2_delay = 100,
461 .keycodes = { KEY_1, 0, 0, 0, 0,
462 KEY_2, 0, 0, 0, 0,
463 KEY_3, 0, 0, 0, 0,
464 KEY_4, 0, 0, 0, 0,
465 KEY_5, 0, 0, 0, 0,
466 KEY_6, 0, 0, 0, 0, },
467};
468
469static struct resource keysc_resources[] = {
470 [0] = {
471 .name = "KEYSC",
472 .start = 0x044b0000,
473 .end = 0x044b000f,
474 .flags = IORESOURCE_MEM,
475 },
476 [1] = {
477 .start = 79,
478 .flags = IORESOURCE_IRQ,
479 },
480};
481
482static struct platform_device keysc_device = {
483 .name = "sh_keysc",
484 .id = 0, /* keysc0 clock */
485 .num_resources = ARRAY_SIZE(keysc_resources),
486 .resource = keysc_resources,
487 .dev = {
488 .platform_data = &keysc_info,
489 },
490 .archdata = {
491 .hwblk_id = HWBLK_KEYSC,
492 },
493};
494
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495/* TouchScreen */
496#define IRQ0 32
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497static int ts_get_pendown_state(void)
498{
499 int val = 0;
500 gpio_free(GPIO_FN_INTC_IRQ0);
501 gpio_request(GPIO_PTZ0, NULL);
502 gpio_direction_input(GPIO_PTZ0);
503
504 val = gpio_get_value(GPIO_PTZ0);
505
506 gpio_free(GPIO_PTZ0);
507 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
508
509 return val ? 0 : 1;
510}
511
512static int ts_init(void)
513{
514 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
515 return 0;
516}
517
3ce09334 518static struct tsc2007_platform_data tsc2007_info = {
8810e055 519 .model = 2007,
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520 .x_plate_ohms = 180,
521 .get_pendown_state = ts_get_pendown_state,
522 .init_platform_hw = ts_init,
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523};
524
525static struct i2c_board_info ts_i2c_clients = {
526 I2C_BOARD_INFO("tsc2007", 0x48),
527 .type = "tsc2007",
528 .platform_data = &tsc2007_info,
529 .irq = IRQ0,
530};
531
5744c881 532#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1238c684 533/* SDHI0 */
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534static void sdhi0_set_pwr(struct platform_device *pdev, int state)
535{
536 gpio_set_value(GPIO_PTB6, state);
537}
538
539static struct sh_mobile_sdhi_info sdhi0_info = {
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540 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
541 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
542 .set_pwr = sdhi0_set_pwr,
e8a50ae3 543 .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
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544};
545
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546static struct resource sdhi0_resources[] = {
547 [0] = {
548 .name = "SDHI0",
549 .start = 0x04ce0000,
d80e9221 550 .end = 0x04ce00ff,
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551 .flags = IORESOURCE_MEM,
552 },
553 [1] = {
3844eadc 554 .start = 100,
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555 .flags = IORESOURCE_IRQ,
556 },
557};
558
559static struct platform_device sdhi0_device = {
560 .name = "sh_mobile_sdhi",
561 .num_resources = ARRAY_SIZE(sdhi0_resources),
562 .resource = sdhi0_resources,
563 .id = 0,
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564 .dev = {
565 .platform_data = &sdhi0_info,
566 },
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567 .archdata = {
568 .hwblk_id = HWBLK_SDHI0,
569 },
570};
571
5744c881 572#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1238c684 573/* SDHI1 */
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574static void sdhi1_set_pwr(struct platform_device *pdev, int state)
575{
576 gpio_set_value(GPIO_PTB7, state);
577}
578
579static struct sh_mobile_sdhi_info sdhi1_info = {
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580 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
581 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
e8a50ae3 582 .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
815f1995 583 .set_pwr = sdhi1_set_pwr,
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584};
585
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586static struct resource sdhi1_resources[] = {
587 [0] = {
588 .name = "SDHI1",
589 .start = 0x04cf0000,
d80e9221 590 .end = 0x04cf00ff,
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591 .flags = IORESOURCE_MEM,
592 },
593 [1] = {
3844eadc 594 .start = 23,
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595 .flags = IORESOURCE_IRQ,
596 },
597};
598
599static struct platform_device sdhi1_device = {
600 .name = "sh_mobile_sdhi",
601 .num_resources = ARRAY_SIZE(sdhi1_resources),
602 .resource = sdhi1_resources,
603 .id = 1,
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604 .dev = {
605 .platform_data = &sdhi1_info,
606 },
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607 .archdata = {
608 .hwblk_id = HWBLK_SDHI1,
609 },
610};
1238c684 611#endif /* CONFIG_MMC_SH_MMCIF */
96987d96 612
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613#else
614
9503e891 615/* MMC SPI */
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616static int mmc_spi_get_ro(struct device *dev)
617{
618 return gpio_get_value(GPIO_PTY6);
619}
620
621static int mmc_spi_get_cd(struct device *dev)
622{
623 return !gpio_get_value(GPIO_PTY7);
624}
625
626static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
627{
628 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
629}
630
631static struct mmc_spi_platform_data mmc_spi_info = {
632 .get_ro = mmc_spi_get_ro,
633 .get_cd = mmc_spi_get_cd,
634 .caps = MMC_CAP_NEEDS_POLL,
635 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
636 .setpower = mmc_spi_setpower,
637};
638
639static struct spi_board_info spi_bus[] = {
640 {
641 .modalias = "mmc_spi",
642 .platform_data = &mmc_spi_info,
643 .max_speed_hz = 5000000,
644 .mode = SPI_MODE_0,
645 .controller_data = (void *) GPIO_PTM4,
646 },
647};
648
9503e891 649/* MSIOF0 */
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650static struct sh_msiof_spi_info msiof0_data = {
651 .num_chipselect = 1,
652};
653
654static struct resource msiof0_resources[] = {
655 [0] = {
656 .name = "MSIOF0",
657 .start = 0xa4c40000,
658 .end = 0xa4c40063,
659 .flags = IORESOURCE_MEM,
660 },
661 [1] = {
662 .start = 84,
663 .flags = IORESOURCE_IRQ,
664 },
665};
666
667static struct platform_device msiof0_device = {
668 .name = "spi_sh_msiof",
669 .id = 0, /* MSIOF0 */
670 .dev = {
671 .platform_data = &msiof0_data,
672 },
673 .num_resources = ARRAY_SIZE(msiof0_resources),
674 .resource = msiof0_resources,
675 .archdata = {
676 .hwblk_id = HWBLK_MSIOF0,
677 },
678};
679
680#endif
681
9aa25d64 682/* I2C Video/Camera */
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683static struct i2c_board_info i2c_camera[] = {
684 {
685 I2C_BOARD_INFO("tw9910", 0x45),
686 },
9aa25d64
KM
687 {
688 /* 1st camera */
689 I2C_BOARD_INFO("mt9t112", 0x3c),
690 },
691 {
692 /* 2nd camera */
693 I2C_BOARD_INFO("mt9t112", 0x3c),
694 },
207efd07
KM
695};
696
697/* tw9910 */
698static int tw9910_power(struct device *dev, int mode)
699{
700 int val = mode ? 0 : 1;
701
702 gpio_set_value(GPIO_PTU2, val);
703 if (mode)
704 mdelay(100);
705
706 return 0;
707}
708
709static struct tw9910_video_info tw9910_info = {
710 .buswidth = SOCAM_DATAWIDTH_8,
711 .mpout = TW9910_MPO_FIELD,
712};
713
714static struct soc_camera_link tw9910_link = {
715 .i2c_adapter_id = 0,
716 .bus_id = 1,
717 .power = tw9910_power,
718 .board_info = &i2c_camera[0],
207efd07
KM
719 .priv = &tw9910_info,
720};
721
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KM
722/* mt9t112 */
723static int mt9t112_power1(struct device *dev, int mode)
724{
725 gpio_set_value(GPIO_PTA3, mode);
726 if (mode)
727 mdelay(100);
728
729 return 0;
730}
731
732static struct mt9t112_camera_info mt9t112_info1 = {
733 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
734 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
735};
736
737static struct soc_camera_link mt9t112_link1 = {
738 .i2c_adapter_id = 0,
739 .power = mt9t112_power1,
740 .bus_id = 0,
741 .board_info = &i2c_camera[1],
9aa25d64
KM
742 .priv = &mt9t112_info1,
743};
744
745static int mt9t112_power2(struct device *dev, int mode)
746{
747 gpio_set_value(GPIO_PTA4, mode);
748 if (mode)
749 mdelay(100);
750
751 return 0;
752}
753
754static struct mt9t112_camera_info mt9t112_info2 = {
755 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
756 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
757};
758
759static struct soc_camera_link mt9t112_link2 = {
760 .i2c_adapter_id = 1,
761 .power = mt9t112_power2,
762 .bus_id = 1,
763 .board_info = &i2c_camera[2],
9aa25d64
KM
764 .priv = &mt9t112_info2,
765};
207efd07
KM
766
767static struct platform_device camera_devices[] = {
768 {
769 .name = "soc-camera-pdrv",
770 .id = 0,
771 .dev = {
772 .platform_data = &tw9910_link,
773 },
774 },
9aa25d64
KM
775 {
776 .name = "soc-camera-pdrv",
777 .id = 1,
778 .dev = {
779 .platform_data = &mt9t112_link1,
780 },
781 },
782 {
783 .name = "soc-camera-pdrv",
784 .id = 2,
785 .dev = {
786 .platform_data = &mt9t112_link2,
787 },
788 },
207efd07
KM
789};
790
1980fdc4 791/* FSI */
3ce09334 792static struct sh_fsi_platform_info fsi_info = {
f17c13ca 793 .portb_flags = SH_FSI_BRS_INV,
1980fdc4
KM
794};
795
796static struct resource fsi_resources[] = {
797 [0] = {
798 .name = "FSI",
799 .start = 0xFE3C0000,
800 .end = 0xFE3C021d,
801 .flags = IORESOURCE_MEM,
802 },
803 [1] = {
804 .start = 108,
805 .flags = IORESOURCE_IRQ,
806 },
807};
808
809static struct platform_device fsi_device = {
810 .name = "sh_fsi",
811 .id = 0,
812 .num_resources = ARRAY_SIZE(fsi_resources),
813 .resource = fsi_resources,
814 .dev = {
815 .platform_data = &fsi_info,
816 },
817 .archdata = {
818 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
819 },
820};
821
26365716
KM
822/* IrDA */
823static struct resource irda_resources[] = {
824 [0] = {
825 .name = "IrDA",
826 .start = 0xA45D0000,
827 .end = 0xA45D0049,
828 .flags = IORESOURCE_MEM,
829 },
830 [1] = {
831 .start = 20,
832 .flags = IORESOURCE_IRQ,
833 },
834};
835
836static struct platform_device irda_device = {
837 .name = "sh_sir",
838 .num_resources = ARRAY_SIZE(irda_resources),
839 .resource = irda_resources,
840};
841
aee5ab0b
GL
842#include <media/ak881x.h>
843#include <media/sh_vou.h>
844
3ce09334 845static struct ak881x_pdata ak881x_pdata = {
aee5ab0b
GL
846 .flags = AK881X_IF_MODE_SLAVE,
847};
848
849static struct i2c_board_info ak8813 = {
850 I2C_BOARD_INFO("ak8813", 0x20),
851 .platform_data = &ak881x_pdata,
852};
853
3ce09334 854static struct sh_vou_pdata sh_vou_pdata = {
aee5ab0b
GL
855 .bus_fmt = SH_VOU_BUS_8BIT,
856 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
857 .board_info = &ak8813,
858 .i2c_adap = 0,
aee5ab0b
GL
859};
860
861static struct resource sh_vou_resources[] = {
862 [0] = {
863 .start = 0xfe960000,
864 .end = 0xfe962043,
865 .flags = IORESOURCE_MEM,
866 },
867 [1] = {
868 .start = 55,
869 .flags = IORESOURCE_IRQ,
870 },
871};
872
873static struct platform_device vou_device = {
874 .name = "sh-vou",
875 .id = -1,
876 .num_resources = ARRAY_SIZE(sh_vou_resources),
877 .resource = sh_vou_resources,
878 .dev = {
879 .platform_data = &sh_vou_pdata,
880 },
881 .archdata = {
882 .hwblk_id = HWBLK_VOU,
883 },
884};
885
5744c881 886#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
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YG
887/* SH_MMCIF */
888static void mmcif_set_pwr(struct platform_device *pdev, int state)
889{
890 gpio_set_value(GPIO_PTB7, state);
891}
892
893static void mmcif_down_pwr(struct platform_device *pdev)
894{
895 gpio_set_value(GPIO_PTB7, 0);
896}
897
898static struct resource sh_mmcif_resources[] = {
899 [0] = {
900 .name = "SH_MMCIF",
901 .start = 0xA4CA0000,
902 .end = 0xA4CA00FF,
903 .flags = IORESOURCE_MEM,
904 },
905 [1] = {
906 /* MMC2I */
907 .start = 29,
908 .flags = IORESOURCE_IRQ,
909 },
910 [2] = {
911 /* MMC3I */
912 .start = 30,
913 .flags = IORESOURCE_IRQ,
914 },
915};
916
3ce09334 917static struct sh_mmcif_plat_data sh_mmcif_plat = {
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YG
918 .set_pwr = mmcif_set_pwr,
919 .down_pwr = mmcif_down_pwr,
920 .sup_pclk = 0, /* SH7724: Max Pclk/2 */
921 .caps = MMC_CAP_4_BIT_DATA |
922 MMC_CAP_8_BIT_DATA |
923 MMC_CAP_NEEDS_POLL,
924 .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
925};
926
927static struct platform_device sh_mmcif_device = {
928 .name = "sh_mmcif",
929 .id = 0,
930 .dev = {
931 .platform_data = &sh_mmcif_plat,
932 },
933 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
934 .resource = sh_mmcif_resources,
52b96c25
GL
935 .archdata = {
936 .hwblk_id = HWBLK_MMC,
937 },
1238c684
YG
938};
939#endif
940
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KM
941static struct platform_device *ecovec_devices[] __initdata = {
942 &heartbeat_device,
943 &nor_flash_device,
35a35408 944 &sh_eth_device,
907050a3 945 &usb0_host_device,
3714a9a0 946 &usb1_common_device,
fb2e7394 947 &usbhs_device,
fa3ba51b 948 &lcdc_device,
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KM
949 &ceu0_device,
950 &ceu1_device,
e9103e74 951 &keysc_device,
5744c881 952#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
96987d96 953 &sdhi0_device,
5744c881 954#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
96987d96 955 &sdhi1_device,
1238c684 956#endif
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MD
957#else
958 &msiof0_device,
959#endif
207efd07 960 &camera_devices[0],
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KM
961 &camera_devices[1],
962 &camera_devices[2],
1980fdc4 963 &fsi_device,
26365716 964 &irda_device,
aee5ab0b 965 &vou_device,
5744c881 966#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
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YG
967 &sh_mmcif_device,
968#endif
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KM
969};
970
6b3b5575 971#ifdef CONFIG_I2C
4907d57f
KM
972#define EEPROM_ADDR 0x50
973static u8 mac_read(struct i2c_adapter *a, u8 command)
974{
975 struct i2c_msg msg[2];
976 u8 buf;
977 int ret;
978
979 msg[0].addr = EEPROM_ADDR;
980 msg[0].flags = 0;
981 msg[0].len = 1;
982 msg[0].buf = &command;
983
984 msg[1].addr = EEPROM_ADDR;
985 msg[1].flags = I2C_M_RD;
986 msg[1].len = 1;
987 msg[1].buf = &buf;
988
989 ret = i2c_transfer(a, msg, 2);
990 if (ret < 0) {
991 printk(KERN_ERR "error %d\n", ret);
992 buf = 0xff;
993 }
994
995 return buf;
996}
997
376abbb4 998static void __init sh_eth_init(struct sh_eth_plat_data *pd)
4907d57f
KM
999{
1000 struct i2c_adapter *a = i2c_get_adapter(1);
4907d57f
KM
1001 int i;
1002
1003 if (!a) {
1004 pr_err("can not get I2C 1\n");
1005 return;
1006 }
1007
25985edc 1008 /* read MAC address from EEPROM */
376abbb4
MD
1009 for (i = 0; i < sizeof(pd->mac_addr); i++) {
1010 pd->mac_addr[i] = mac_read(a, 0x10 + i);
4907d57f
KM
1011 msleep(10);
1012 }
b230eb32
KM
1013
1014 i2c_put_adapter(a);
4907d57f 1015}
6b3b5575
MD
1016#else
1017static void __init sh_eth_init(struct sh_eth_plat_data *pd)
1018{
1019 pr_err("unable to read sh_eth MAC address\n");
1020}
1021#endif
4907d57f 1022
fa3ba51b 1023#define PORT_HIZA 0xA4050158
ea15edb2 1024#define IODRIVEA 0xA405018A
eb0cd9e8
MD
1025
1026extern char ecovec24_sdram_enter_start;
1027extern char ecovec24_sdram_enter_end;
1028extern char ecovec24_sdram_leave_start;
1029extern char ecovec24_sdram_leave_end;
1030
4907d57f 1031static int __init arch_setup(void)
4138b740 1032{
1980fdc4
KM
1033 struct clk *clk;
1034
eb0cd9e8 1035 /* register board specific self-refresh code */
2839bd61
MD
1036 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
1037 SUSP_SH_RSTANDBY,
eb0cd9e8
MD
1038 &ecovec24_sdram_enter_start,
1039 &ecovec24_sdram_enter_end,
1040 &ecovec24_sdram_leave_start,
1041 &ecovec24_sdram_leave_end);
1042
f78bab30
MD
1043 /* enable STATUS0, STATUS2 and PDSTATUS */
1044 gpio_request(GPIO_FN_STATUS0, NULL);
1045 gpio_request(GPIO_FN_STATUS2, NULL);
1046 gpio_request(GPIO_FN_PDSTATUS, NULL);
1047
4138b740
KM
1048 /* enable SCIFA0 */
1049 gpio_request(GPIO_FN_SCIF0_TXD, NULL);
1050 gpio_request(GPIO_FN_SCIF0_RXD, NULL);
4138b740
KM
1051
1052 /* enable debug LED */
1053 gpio_request(GPIO_PTG0, NULL);
1054 gpio_request(GPIO_PTG1, NULL);
1055 gpio_request(GPIO_PTG2, NULL);
1056 gpio_request(GPIO_PTG3, NULL);
b7056bc1
KM
1057 gpio_direction_output(GPIO_PTG0, 0);
1058 gpio_direction_output(GPIO_PTG1, 0);
1059 gpio_direction_output(GPIO_PTG2, 0);
1060 gpio_direction_output(GPIO_PTG3, 0);
9d56dd3b 1061 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
4138b740 1062
35a35408
KM
1063 /* enable SH-Eth */
1064 gpio_request(GPIO_PTA1, NULL);
1065 gpio_direction_output(GPIO_PTA1, 1);
1066 mdelay(20);
1067
1068 gpio_request(GPIO_FN_RMII_RXD0, NULL);
1069 gpio_request(GPIO_FN_RMII_RXD1, NULL);
1070 gpio_request(GPIO_FN_RMII_TXD0, NULL);
1071 gpio_request(GPIO_FN_RMII_TXD1, NULL);
1072 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
1073 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
1074 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
1075 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
1076 gpio_request(GPIO_FN_MDIO, NULL);
1077 gpio_request(GPIO_FN_MDC, NULL);
1078 gpio_request(GPIO_FN_LNKSTA, NULL);
1079
907050a3 1080 /* enable USB */
9d56dd3b
PM
1081 __raw_writew(0x0000, 0xA4D80000);
1082 __raw_writew(0x0000, 0xA4D90000);
907050a3
KM
1083 gpio_request(GPIO_PTB3, NULL);
1084 gpio_request(GPIO_PTB4, NULL);
1085 gpio_request(GPIO_PTB5, NULL);
1086 gpio_direction_input(GPIO_PTB3);
1087 gpio_direction_output(GPIO_PTB4, 0);
1088 gpio_direction_output(GPIO_PTB5, 0);
9d56dd3b
PM
1089 __raw_writew(0x0600, 0xa40501d4);
1090 __raw_writew(0x0600, 0xa4050192);
907050a3 1091
3714a9a0
KM
1092 if (gpio_get_value(GPIO_PTB3)) {
1093 printk(KERN_INFO "USB1 function is selected\n");
1094 usb1_common_device.name = "r8a66597_udc";
1095 } else {
1096 printk(KERN_INFO "USB1 host is selected\n");
1097 usb1_common_device.name = "r8a66597_hcd";
1098 }
1099
fa3ba51b
KM
1100 /* enable LCDC */
1101 gpio_request(GPIO_FN_LCDD23, NULL);
1102 gpio_request(GPIO_FN_LCDD22, NULL);
1103 gpio_request(GPIO_FN_LCDD21, NULL);
1104 gpio_request(GPIO_FN_LCDD20, NULL);
1105 gpio_request(GPIO_FN_LCDD19, NULL);
1106 gpio_request(GPIO_FN_LCDD18, NULL);
1107 gpio_request(GPIO_FN_LCDD17, NULL);
1108 gpio_request(GPIO_FN_LCDD16, NULL);
1109 gpio_request(GPIO_FN_LCDD15, NULL);
1110 gpio_request(GPIO_FN_LCDD14, NULL);
1111 gpio_request(GPIO_FN_LCDD13, NULL);
1112 gpio_request(GPIO_FN_LCDD12, NULL);
1113 gpio_request(GPIO_FN_LCDD11, NULL);
1114 gpio_request(GPIO_FN_LCDD10, NULL);
1115 gpio_request(GPIO_FN_LCDD9, NULL);
1116 gpio_request(GPIO_FN_LCDD8, NULL);
1117 gpio_request(GPIO_FN_LCDD7, NULL);
1118 gpio_request(GPIO_FN_LCDD6, NULL);
1119 gpio_request(GPIO_FN_LCDD5, NULL);
1120 gpio_request(GPIO_FN_LCDD4, NULL);
1121 gpio_request(GPIO_FN_LCDD3, NULL);
1122 gpio_request(GPIO_FN_LCDD2, NULL);
1123 gpio_request(GPIO_FN_LCDD1, NULL);
1124 gpio_request(GPIO_FN_LCDD0, NULL);
1125 gpio_request(GPIO_FN_LCDDISP, NULL);
1126 gpio_request(GPIO_FN_LCDHSYN, NULL);
1127 gpio_request(GPIO_FN_LCDDCK, NULL);
1128 gpio_request(GPIO_FN_LCDVSYN, NULL);
1129 gpio_request(GPIO_FN_LCDDON, NULL);
1130 gpio_request(GPIO_FN_LCDLCLK, NULL);
9d56dd3b 1131 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
fa3ba51b
KM
1132
1133 gpio_request(GPIO_PTE6, NULL);
1134 gpio_request(GPIO_PTU1, NULL);
1135 gpio_request(GPIO_PTR1, NULL);
1136 gpio_request(GPIO_PTA2, NULL);
1137 gpio_direction_input(GPIO_PTE6);
1138 gpio_direction_output(GPIO_PTU1, 0);
1139 gpio_direction_output(GPIO_PTR1, 0);
1140 gpio_direction_output(GPIO_PTA2, 0);
1141
82b33221 1142 /* I/O buffer drive ability is high */
9d56dd3b 1143 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
ea15edb2 1144
fa3ba51b
KM
1145 if (gpio_get_value(GPIO_PTE6)) {
1146 /* DVI */
1147 lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
44432407
GL
1148 lcdc_info.ch[0].clock_divider = 1;
1149 lcdc_info.ch[0].lcd_cfg = ecovec_dvi_modes;
1150 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_dvi_modes);
fa3ba51b
KM
1151
1152 gpio_set_value(GPIO_PTA2, 1);
1153 gpio_set_value(GPIO_PTU1, 1);
1154 } else {
1155 /* Panel */
ea15edb2 1156 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
44432407
GL
1157 lcdc_info.ch[0].clock_divider = 2;
1158 lcdc_info.ch[0].lcd_cfg = ecovec_lcd_modes;
1159 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_lcd_modes);
ea15edb2
KM
1160
1161 gpio_set_value(GPIO_PTR1, 1);
1162
1163 /* FIXME
1164 *
1165 * LCDDON control is needed for Panel,
1166 * but current sh_mobile_lcdc driver doesn't control it.
1167 * It is temporary correspondence
1168 */
1169 gpio_request(GPIO_PTF4, NULL);
1170 gpio_direction_output(GPIO_PTF4, 1);
8810e055
KM
1171
1172 /* enable TouchScreen */
1173 i2c_register_board_info(0, &ts_i2c_clients, 1);
fcb8918f 1174 irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
fa3ba51b
KM
1175 }
1176
2153ad32
KM
1177 /* enable CEU0 */
1178 gpio_request(GPIO_FN_VIO0_D15, NULL);
1179 gpio_request(GPIO_FN_VIO0_D14, NULL);
1180 gpio_request(GPIO_FN_VIO0_D13, NULL);
1181 gpio_request(GPIO_FN_VIO0_D12, NULL);
1182 gpio_request(GPIO_FN_VIO0_D11, NULL);
1183 gpio_request(GPIO_FN_VIO0_D10, NULL);
1184 gpio_request(GPIO_FN_VIO0_D9, NULL);
1185 gpio_request(GPIO_FN_VIO0_D8, NULL);
1186 gpio_request(GPIO_FN_VIO0_D7, NULL);
1187 gpio_request(GPIO_FN_VIO0_D6, NULL);
1188 gpio_request(GPIO_FN_VIO0_D5, NULL);
1189 gpio_request(GPIO_FN_VIO0_D4, NULL);
1190 gpio_request(GPIO_FN_VIO0_D3, NULL);
1191 gpio_request(GPIO_FN_VIO0_D2, NULL);
1192 gpio_request(GPIO_FN_VIO0_D1, NULL);
1193 gpio_request(GPIO_FN_VIO0_D0, NULL);
1194 gpio_request(GPIO_FN_VIO0_VD, NULL);
1195 gpio_request(GPIO_FN_VIO0_CLK, NULL);
1196 gpio_request(GPIO_FN_VIO0_FLD, NULL);
1197 gpio_request(GPIO_FN_VIO0_HD, NULL);
1198 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
1199
1200 /* enable CEU1 */
1201 gpio_request(GPIO_FN_VIO1_D7, NULL);
1202 gpio_request(GPIO_FN_VIO1_D6, NULL);
1203 gpio_request(GPIO_FN_VIO1_D5, NULL);
1204 gpio_request(GPIO_FN_VIO1_D4, NULL);
1205 gpio_request(GPIO_FN_VIO1_D3, NULL);
1206 gpio_request(GPIO_FN_VIO1_D2, NULL);
1207 gpio_request(GPIO_FN_VIO1_D1, NULL);
1208 gpio_request(GPIO_FN_VIO1_D0, NULL);
1209 gpio_request(GPIO_FN_VIO1_FLD, NULL);
1210 gpio_request(GPIO_FN_VIO1_HD, NULL);
1211 gpio_request(GPIO_FN_VIO1_VD, NULL);
1212 gpio_request(GPIO_FN_VIO1_CLK, NULL);
1213 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
1214
e9103e74
KM
1215 /* enable KEYSC */
1216 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
1217 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
1218 gpio_request(GPIO_FN_KEYOUT3, NULL);
1219 gpio_request(GPIO_FN_KEYOUT2, NULL);
1220 gpio_request(GPIO_FN_KEYOUT1, NULL);
1221 gpio_request(GPIO_FN_KEYOUT0, NULL);
1222 gpio_request(GPIO_FN_KEYIN0, NULL);
1223
064a16dc
KM
1224 /* enable user debug switch */
1225 gpio_request(GPIO_PTR0, NULL);
1226 gpio_request(GPIO_PTR4, NULL);
1227 gpio_request(GPIO_PTR5, NULL);
1228 gpio_request(GPIO_PTR6, NULL);
1229 gpio_direction_input(GPIO_PTR0);
1230 gpio_direction_input(GPIO_PTR4);
1231 gpio_direction_input(GPIO_PTR5);
1232 gpio_direction_input(GPIO_PTR6);
1233
5744c881 1234#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1ce4da7a 1235 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
96987d96
KM
1236 gpio_request(GPIO_FN_SDHI0CD, NULL);
1237 gpio_request(GPIO_FN_SDHI0WP, NULL);
1238 gpio_request(GPIO_FN_SDHI0CMD, NULL);
1239 gpio_request(GPIO_FN_SDHI0CLK, NULL);
1240 gpio_request(GPIO_FN_SDHI0D3, NULL);
1241 gpio_request(GPIO_FN_SDHI0D2, NULL);
1242 gpio_request(GPIO_FN_SDHI0D1, NULL);
1243 gpio_request(GPIO_FN_SDHI0D0, NULL);
98779ad8
MD
1244 gpio_request(GPIO_PTB6, NULL);
1245 gpio_direction_output(GPIO_PTB6, 0);
96987d96 1246
5744c881 1247#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1ce4da7a 1248 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
96987d96
KM
1249 gpio_request(GPIO_FN_SDHI1CD, NULL);
1250 gpio_request(GPIO_FN_SDHI1WP, NULL);
1251 gpio_request(GPIO_FN_SDHI1CMD, NULL);
1252 gpio_request(GPIO_FN_SDHI1CLK, NULL);
1253 gpio_request(GPIO_FN_SDHI1D3, NULL);
1254 gpio_request(GPIO_FN_SDHI1D2, NULL);
1255 gpio_request(GPIO_FN_SDHI1D1, NULL);
1256 gpio_request(GPIO_FN_SDHI1D0, NULL);
96987d96 1257 gpio_request(GPIO_PTB7, NULL);
98779ad8 1258 gpio_direction_output(GPIO_PTB7, 0);
96987d96
KM
1259
1260 /* I/O buffer drive ability is high for SDHI1 */
9d56dd3b 1261 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1238c684 1262#endif /* CONFIG_MMC_SH_MMCIF */
1ce4da7a
MD
1263#else
1264 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1265 gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1266 gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1267 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1268 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
1269 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
1270 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1271 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1272 gpio_request(GPIO_PTY6, NULL); /* write protect */
1273 gpio_direction_input(GPIO_PTY6);
1274 gpio_request(GPIO_PTY7, NULL); /* card detect */
1275 gpio_direction_input(GPIO_PTY7);
1276
1277 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1278#endif
96987d96 1279
207efd07
KM
1280 /* enable Video */
1281 gpio_request(GPIO_PTU2, NULL);
1282 gpio_direction_output(GPIO_PTU2, 1);
1283
9aa25d64
KM
1284 /* enable Camera */
1285 gpio_request(GPIO_PTA3, NULL);
1286 gpio_request(GPIO_PTA4, NULL);
1287 gpio_direction_output(GPIO_PTA3, 0);
1288 gpio_direction_output(GPIO_PTA4, 0);
1289
1980fdc4
KM
1290 /* enable FSI */
1291 gpio_request(GPIO_FN_FSIMCKB, NULL);
1292 gpio_request(GPIO_FN_FSIIBSD, NULL);
1293 gpio_request(GPIO_FN_FSIOBSD, NULL);
1294 gpio_request(GPIO_FN_FSIIBBCK, NULL);
1295 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
1296 gpio_request(GPIO_FN_FSIOBBCK, NULL);
1297 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
1298 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1299
16afc9fb
KM
1300 /* set SPU2 clock to 83.4 MHz */
1301 clk = clk_get(NULL, "spu_clk");
56ea5109 1302 if (!IS_ERR(clk)) {
10305853
KM
1303 clk_set_rate(clk, clk_round_rate(clk, 83333333));
1304 clk_put(clk);
1305 }
16afc9fb 1306
1980fdc4
KM
1307 /* change parent of FSI B */
1308 clk = clk_get(NULL, "fsib_clk");
56ea5109 1309 if (!IS_ERR(clk)) {
4bd5d259
KM
1310 /* 48kHz dummy clock was used to make sure 1/1 divide */
1311 clk_set_rate(&sh7724_fsimckb_clk, 48000);
1312 clk_set_parent(clk, &sh7724_fsimckb_clk);
1313 clk_set_rate(clk, 48000);
10305853
KM
1314 clk_put(clk);
1315 }
1980fdc4
KM
1316
1317 gpio_request(GPIO_PTU0, NULL);
1318 gpio_direction_output(GPIO_PTU0, 0);
1319 mdelay(20);
1320
ea440783
NH
1321 /* enable motion sensor */
1322 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1323 gpio_direction_input(GPIO_FN_INTC_IRQ1);
1324
6f26d19f
MD
1325 /* set VPU clock to 166 MHz */
1326 clk = clk_get(NULL, "vpu_clk");
56ea5109 1327 if (!IS_ERR(clk)) {
10305853
KM
1328 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1329 clk_put(clk);
1330 }
6f26d19f 1331
26365716
KM
1332 /* enable IrDA */
1333 gpio_request(GPIO_FN_IRDA_OUT, NULL);
1334 gpio_request(GPIO_FN_IRDA_IN, NULL);
1335 gpio_request(GPIO_PTU5, NULL);
1336 gpio_direction_output(GPIO_PTU5, 0);
1337
5744c881 1338#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1238c684
YG
1339 /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
1340 gpio_request(GPIO_FN_MMC_D7, NULL);
1341 gpio_request(GPIO_FN_MMC_D6, NULL);
1342 gpio_request(GPIO_FN_MMC_D5, NULL);
1343 gpio_request(GPIO_FN_MMC_D4, NULL);
1344 gpio_request(GPIO_FN_MMC_D3, NULL);
1345 gpio_request(GPIO_FN_MMC_D2, NULL);
1346 gpio_request(GPIO_FN_MMC_D1, NULL);
1347 gpio_request(GPIO_FN_MMC_D0, NULL);
1348 gpio_request(GPIO_FN_MMC_CLK, NULL);
1349 gpio_request(GPIO_FN_MMC_CMD, NULL);
1350 gpio_request(GPIO_PTB7, NULL);
1351 gpio_direction_output(GPIO_PTB7, 0);
1352
1353 /* I/O buffer drive ability is high for MMCIF */
1354 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1355#endif
1356
125ecce6 1357 /* enable I2C device */
1980fdc4
KM
1358 i2c_register_board_info(0, i2c0_devices,
1359 ARRAY_SIZE(i2c0_devices));
1360
125ecce6
KM
1361 i2c_register_board_info(1, i2c1_devices,
1362 ARRAY_SIZE(i2c1_devices));
1363
92359a70 1364#if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
aee5ab0b
GL
1365 /* VOU */
1366 gpio_request(GPIO_FN_DV_D15, NULL);
1367 gpio_request(GPIO_FN_DV_D14, NULL);
1368 gpio_request(GPIO_FN_DV_D13, NULL);
1369 gpio_request(GPIO_FN_DV_D12, NULL);
1370 gpio_request(GPIO_FN_DV_D11, NULL);
1371 gpio_request(GPIO_FN_DV_D10, NULL);
1372 gpio_request(GPIO_FN_DV_D9, NULL);
1373 gpio_request(GPIO_FN_DV_D8, NULL);
1374 gpio_request(GPIO_FN_DV_CLKI, NULL);
1375 gpio_request(GPIO_FN_DV_CLK, NULL);
1376 gpio_request(GPIO_FN_DV_VSYNC, NULL);
1377 gpio_request(GPIO_FN_DV_HSYNC, NULL);
1378
1379 /* AK8813 power / reset sequence */
1380 gpio_request(GPIO_PTG4, NULL);
1381 gpio_request(GPIO_PTU3, NULL);
1382 /* Reset */
1383 gpio_direction_output(GPIO_PTG4, 0);
1384 /* Power down */
1385 gpio_direction_output(GPIO_PTU3, 1);
1386
1387 udelay(10);
1388
1389 /* Power up, reset */
1390 gpio_set_value(GPIO_PTU3, 0);
1391
1392 udelay(10);
1393
1394 /* Remove reset */
1395 gpio_set_value(GPIO_PTG4, 1);
92359a70 1396#endif
aee5ab0b 1397
4138b740
KM
1398 return platform_add_devices(ecovec_devices,
1399 ARRAY_SIZE(ecovec_devices));
1400}
4907d57f
KM
1401arch_initcall(arch_setup);
1402
1403static int __init devices_setup(void)
1404{
376abbb4 1405 sh_eth_init(&sh_eth_plat);
4907d57f
KM
1406 return 0;
1407}
1408device_initcall(devices_setup);
1409
4138b740
KM
1410static struct sh_machine_vector mv_ecovec __initmv = {
1411 .mv_name = "R0P7724 (EcoVec)",
1412};