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1/*
2 * Copyright (C) 2009 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/device.h>
13#include <linux/platform_device.h>
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YG
14#include <linux/mmc/host.h>
15#include <linux/mmc/sh_mmcif.h>
4138b740 16#include <linux/mtd/physmap.h>
357002b9 17#include <linux/mfd/tmio.h>
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18#include <linux/gpio.h>
19#include <linux/interrupt.h>
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20#include <linux/io.h>
21#include <linux/delay.h>
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22#include <linux/regulator/fixed.h>
23#include <linux/regulator/machine.h>
907050a3 24#include <linux/usb/r8a66597.h>
fb2e7394 25#include <linux/usb/renesas_usbhs.h>
4907d57f 26#include <linux/i2c.h>
8fd70815 27#include <linux/platform_data/tsc2007.h>
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28#include <linux/spi/spi.h>
29#include <linux/spi/sh_msiof.h>
30#include <linux/spi/mmc_spi.h>
e9103e74 31#include <linux/input.h>
fc1d003d 32#include <linux/input/sh_keysc.h>
fe79f919 33#include <linux/platform_data/gpio_backlight.h>
cf8e56bf 34#include <linux/sh_eth.h>
9307d115 35#include <linux/sh_intc.h>
a1ad8033 36#include <linux/videodev2.h>
fa3ba51b 37#include <video/sh_mobile_lcdc.h>
1980fdc4 38#include <sound/sh_fsi.h>
064bfada 39#include <sound/simple_card.h>
d647f0b7 40#include <media/drv-intf/sh_mobile_ceu.h>
a1ad8033 41#include <media/soc_camera.h>
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42#include <media/i2c/tw9910.h>
43#include <media/i2c/mt9t112.h>
4138b740 44#include <asm/heartbeat.h>
a991801a 45#include <asm/clock.h>
eb0cd9e8 46#include <asm/suspend.h>
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47#include <cpu/sh7724.h>
48
49/*
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50 * Address Interface BusWidth
51 *-----------------------------------------
52 * 0x0000_0000 uboot 16bit
53 * 0x0004_0000 Linux romImage 16bit
54 * 0x0014_0000 MTD for Linux 16bit
55 * 0x0400_0000 Internal I/O 16/32bit
56 * 0x0800_0000 DRAM 32bit
57 * 0x1800_0000 MFI 16bit
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58 */
59
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60/* SWITCH
61 *------------------------------
62 * DS2[1] = FlashROM write protect ON : write protect
63 * OFF : No write protect
64 * DS2[2] = RMII / TS, SCIF ON : RMII
65 * OFF : TS, SCIF3
66 * DS2[3] = Camera / Video ON : Camera
67 * OFF : NTSC/PAL (IN)
68 * DS2[5] = NTSC_OUT Clock ON : On board OSC
69 * OFF : SH7724 DV_CLK
70 * DS2[6-7] = MMC / SD ON-OFF : SD
71 * OFF-ON : MMC
72 */
73
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74/*
75 * FSI - DA7210
76 *
77 * it needs amixer settings for playing
78 *
79 * amixer set 'HeadPhone' 80
80 * amixer set 'Out Mixer Left DAC Left' on
81 * amixer set 'Out Mixer Right DAC Right' on
82 */
83
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84/* Heartbeat */
85static unsigned char led_pos[] = { 0, 1, 2, 3 };
a09d2831 86
4138b740 87static struct heartbeat_data heartbeat_data = {
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88 .nr_bits = 4,
89 .bit_pos = led_pos,
90};
91
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92static struct resource heartbeat_resource = {
93 .start = 0xA405012C, /* PTG */
94 .end = 0xA405012E - 1,
95 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
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96};
97
98static struct platform_device heartbeat_device = {
99 .name = "heartbeat",
100 .id = -1,
101 .dev = {
102 .platform_data = &heartbeat_data,
103 },
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104 .num_resources = 1,
105 .resource = &heartbeat_resource,
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106};
107
108/* MTD */
109static struct mtd_partition nor_flash_partitions[] = {
110 {
b7056bc1 111 .name = "boot loader",
4138b740 112 .offset = 0,
b7056bc1 113 .size = (5 * 1024 * 1024),
d5ce010c 114 .mask_flags = MTD_WRITEABLE, /* force read-only */
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115 }, {
116 .name = "free-area",
117 .offset = MTDPART_OFS_APPEND,
118 .size = MTDPART_SIZ_FULL,
119 },
120};
121
122static struct physmap_flash_data nor_flash_data = {
123 .width = 2,
124 .parts = nor_flash_partitions,
125 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
126};
127
128static struct resource nor_flash_resources[] = {
129 [0] = {
130 .name = "NOR Flash",
131 .start = 0x00000000,
132 .end = 0x03ffffff,
133 .flags = IORESOURCE_MEM,
134 }
135};
136
137static struct platform_device nor_flash_device = {
138 .name = "physmap-flash",
139 .resource = nor_flash_resources,
140 .num_resources = ARRAY_SIZE(nor_flash_resources),
141 .dev = {
142 .platform_data = &nor_flash_data,
143 },
144};
145
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146/* SH Eth */
147#define SH_ETH_ADDR (0xA4600000)
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148static struct resource sh_eth_resources[] = {
149 [0] = {
150 .start = SH_ETH_ADDR,
151 .end = SH_ETH_ADDR + 0x1FC,
152 .flags = IORESOURCE_MEM,
153 },
154 [1] = {
9307d115 155 .start = evt2irq(0xd60),
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156 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
157 },
158};
159
3ce09334 160static struct sh_eth_plat_data sh_eth_plat = {
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161 .phy = 0x1f, /* SMSC LAN8700 */
162 .edmac_endian = EDMAC_LITTLE_ENDIAN,
9055f895 163 .phy_interface = PHY_INTERFACE_MODE_MII,
acf3cc28 164 .ether_link_active_low = 1
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165};
166
167static struct platform_device sh_eth_device = {
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168 .name = "sh7724-ether",
169 .id = 0,
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170 .dev = {
171 .platform_data = &sh_eth_plat,
172 },
173 .num_resources = ARRAY_SIZE(sh_eth_resources),
174 .resource = sh_eth_resources,
175};
176
907050a3 177/* USB0 host */
3ce09334 178static void usb0_port_power(int port, int power)
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179{
180 gpio_set_value(GPIO_PTB4, power);
181}
182
183static struct r8a66597_platdata usb0_host_data = {
184 .on_chip = 1,
185 .port_power = usb0_port_power,
186};
187
188static struct resource usb0_host_resources[] = {
189 [0] = {
190 .start = 0xa4d80000,
191 .end = 0xa4d80124 - 1,
192 .flags = IORESOURCE_MEM,
193 },
194 [1] = {
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195 .start = evt2irq(0xa20),
196 .end = evt2irq(0xa20),
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197 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
198 },
199};
200
201static struct platform_device usb0_host_device = {
202 .name = "r8a66597_hcd",
203 .id = 0,
204 .dev = {
205 .dma_mask = NULL, /* not use dma */
206 .coherent_dma_mask = 0xffffffff,
207 .platform_data = &usb0_host_data,
208 },
209 .num_resources = ARRAY_SIZE(usb0_host_resources),
210 .resource = usb0_host_resources,
211};
212
3714a9a0 213/* USB1 host/function */
3ce09334 214static void usb1_port_power(int port, int power)
907050a3 215{
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216 gpio_set_value(GPIO_PTB5, power);
217}
218
3714a9a0 219static struct r8a66597_platdata usb1_common_data = {
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220 .on_chip = 1,
221 .port_power = usb1_port_power,
222};
223
3714a9a0 224static struct resource usb1_common_resources[] = {
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225 [0] = {
226 .start = 0xa4d90000,
227 .end = 0xa4d90124 - 1,
228 .flags = IORESOURCE_MEM,
229 },
230 [1] = {
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231 .start = evt2irq(0xa40),
232 .end = evt2irq(0xa40),
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233 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
234 },
235};
236
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237static struct platform_device usb1_common_device = {
238 /* .name will be added in arch_setup */
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239 .id = 1,
240 .dev = {
241 .dma_mask = NULL, /* not use dma */
242 .coherent_dma_mask = 0xffffffff,
3714a9a0 243 .platform_data = &usb1_common_data,
907050a3 244 },
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245 .num_resources = ARRAY_SIZE(usb1_common_resources),
246 .resource = usb1_common_resources,
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247};
248
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249/*
250 * USBHS
251 */
252static int usbhs_get_id(struct platform_device *pdev)
253{
254 return gpio_get_value(GPIO_PTB3);
255}
256
225da3e3 257static int usbhs_phy_reset(struct platform_device *pdev)
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258{
259 /* enable vbus if HOST */
260 if (!gpio_get_value(GPIO_PTB3))
261 gpio_set_value(GPIO_PTB5, 1);
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262
263 return 0;
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264}
265
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266static struct renesas_usbhs_platform_info usbhs_info = {
267 .platform_callback = {
268 .get_id = usbhs_get_id,
1ca8fe38 269 .phy_reset = usbhs_phy_reset,
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270 },
271 .driver_param = {
272 .buswait_bwait = 4,
273 .detection_delay = 5,
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274 .d0_tx_id = SHDMA_SLAVE_USB1D0_TX,
275 .d0_rx_id = SHDMA_SLAVE_USB1D0_RX,
276 .d1_tx_id = SHDMA_SLAVE_USB1D1_TX,
277 .d1_rx_id = SHDMA_SLAVE_USB1D1_RX,
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278 },
279};
280
281static struct resource usbhs_resources[] = {
282 [0] = {
283 .start = 0xa4d90000,
284 .end = 0xa4d90124 - 1,
285 .flags = IORESOURCE_MEM,
286 },
287 [1] = {
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288 .start = evt2irq(0xa40),
289 .end = evt2irq(0xa40),
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290 .flags = IORESOURCE_IRQ,
291 },
292};
293
294static struct platform_device usbhs_device = {
295 .name = "renesas_usbhs",
296 .id = 1,
297 .dev = {
298 .dma_mask = NULL, /* not use dma */
299 .coherent_dma_mask = 0xffffffff,
300 .platform_data = &usbhs_info,
301 },
302 .num_resources = ARRAY_SIZE(usbhs_resources),
303 .resource = usbhs_resources,
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304};
305
fe79f919 306/* LCDC and backlight */
e04008eb 307static const struct fb_videomode ecovec_lcd_modes[] = {
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308 {
309 .name = "Panel",
310 .xres = 800,
311 .yres = 480,
312 .left_margin = 220,
313 .right_margin = 110,
314 .hsync_len = 70,
315 .upper_margin = 20,
316 .lower_margin = 5,
317 .vsync_len = 5,
318 .sync = 0, /* hsync and vsync are active low */
319 },
320};
321
e04008eb 322static const struct fb_videomode ecovec_dvi_modes[] = {
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GL
323 {
324 .name = "DVI",
325 .xres = 1280,
326 .yres = 720,
327 .left_margin = 220,
328 .right_margin = 110,
329 .hsync_len = 40,
330 .upper_margin = 20,
331 .lower_margin = 5,
332 .vsync_len = 5,
333 .sync = 0, /* hsync and vsync are active low */
334 },
335};
336
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337static struct sh_mobile_lcdc_info lcdc_info = {
338 .ch[0] = {
339 .interface_type = RGB18,
340 .chan = LCDC_CHAN_MAINLCD,
edd153a3 341 .fourcc = V4L2_PIX_FMT_RGB565,
afaad83b 342 .panel_cfg = { /* 7.0 inch */
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343 .width = 152,
344 .height = 91,
345 },
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346 }
347};
348
349static struct resource lcdc_resources[] = {
350 [0] = {
351 .name = "LCDC",
352 .start = 0xfe940000,
a6f15ade 353 .end = 0xfe942fff,
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354 .flags = IORESOURCE_MEM,
355 },
356 [1] = {
9307d115 357 .start = evt2irq(0xf40),
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358 .flags = IORESOURCE_IRQ,
359 },
360};
361
362static struct platform_device lcdc_device = {
363 .name = "sh_mobile_lcdc_fb",
364 .num_resources = ARRAY_SIZE(lcdc_resources),
365 .resource = lcdc_resources,
366 .dev = {
367 .platform_data = &lcdc_info,
368 },
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369};
370
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371static struct gpio_backlight_platform_data gpio_backlight_data = {
372 .fbdev = &lcdc_device.dev,
373 .gpio = GPIO_PTR1,
374 .def_value = 1,
375 .name = "backlight",
376};
377
378static struct platform_device gpio_backlight_device = {
379 .name = "gpio-backlight",
380 .dev = {
381 .platform_data = &gpio_backlight_data,
382 },
383};
384
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385/* CEU0 */
386static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
387 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
388};
389
390static struct resource ceu0_resources[] = {
391 [0] = {
392 .name = "CEU0",
393 .start = 0xfe910000,
394 .end = 0xfe91009f,
395 .flags = IORESOURCE_MEM,
396 },
397 [1] = {
9307d115 398 .start = evt2irq(0x880),
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399 .flags = IORESOURCE_IRQ,
400 },
401 [2] = {
402 /* place holder for contiguous memory */
403 },
404};
405
406static struct platform_device ceu0_device = {
407 .name = "sh_mobile_ceu",
408 .id = 0, /* "ceu0" clock */
409 .num_resources = ARRAY_SIZE(ceu0_resources),
410 .resource = ceu0_resources,
411 .dev = {
412 .platform_data = &sh_mobile_ceu0_info,
413 },
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414};
415
416/* CEU1 */
417static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
418 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
419};
420
421static struct resource ceu1_resources[] = {
422 [0] = {
423 .name = "CEU1",
424 .start = 0xfe914000,
425 .end = 0xfe91409f,
426 .flags = IORESOURCE_MEM,
427 },
428 [1] = {
9307d115 429 .start = evt2irq(0x9e0),
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430 .flags = IORESOURCE_IRQ,
431 },
432 [2] = {
433 /* place holder for contiguous memory */
434 },
435};
436
437static struct platform_device ceu1_device = {
438 .name = "sh_mobile_ceu",
439 .id = 1, /* "ceu1" clock */
440 .num_resources = ARRAY_SIZE(ceu1_resources),
441 .resource = ceu1_resources,
442 .dev = {
443 .platform_data = &sh_mobile_ceu1_info,
444 },
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445};
446
125ecce6 447/* I2C device */
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448static struct i2c_board_info i2c0_devices[] = {
449 {
450 I2C_BOARD_INFO("da7210", 0x1a),
451 },
452};
453
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454static struct i2c_board_info i2c1_devices[] = {
455 {
456 I2C_BOARD_INFO("r2025sd", 0x32),
457 },
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458 {
459 I2C_BOARD_INFO("lis3lv02d", 0x1c),
9307d115 460 .irq = evt2irq(0x620),
ea440783 461 }
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462};
463
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464/* KEYSC */
465static struct sh_keysc_info keysc_info = {
466 .mode = SH_KEYSC_MODE_1,
467 .scan_timing = 3,
468 .delay = 50,
469 .kycr2_delay = 100,
470 .keycodes = { KEY_1, 0, 0, 0, 0,
471 KEY_2, 0, 0, 0, 0,
472 KEY_3, 0, 0, 0, 0,
473 KEY_4, 0, 0, 0, 0,
474 KEY_5, 0, 0, 0, 0,
475 KEY_6, 0, 0, 0, 0, },
476};
477
478static struct resource keysc_resources[] = {
479 [0] = {
480 .name = "KEYSC",
481 .start = 0x044b0000,
482 .end = 0x044b000f,
483 .flags = IORESOURCE_MEM,
484 },
485 [1] = {
9307d115 486 .start = evt2irq(0xbe0),
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487 .flags = IORESOURCE_IRQ,
488 },
489};
490
491static struct platform_device keysc_device = {
492 .name = "sh_keysc",
493 .id = 0, /* keysc0 clock */
494 .num_resources = ARRAY_SIZE(keysc_resources),
495 .resource = keysc_resources,
496 .dev = {
497 .platform_data = &keysc_info,
498 },
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499};
500
8810e055 501/* TouchScreen */
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502#define IRQ0 evt2irq(0x600)
503
07f9e5cf 504static int ts_get_pendown_state(struct device *dev)
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PM
505{
506 int val = 0;
507 gpio_free(GPIO_FN_INTC_IRQ0);
508 gpio_request(GPIO_PTZ0, NULL);
509 gpio_direction_input(GPIO_PTZ0);
510
511 val = gpio_get_value(GPIO_PTZ0);
512
513 gpio_free(GPIO_PTZ0);
514 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
515
516 return val ? 0 : 1;
517}
518
519static int ts_init(void)
520{
521 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
522 return 0;
523}
524
3ce09334 525static struct tsc2007_platform_data tsc2007_info = {
8810e055 526 .model = 2007,
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527 .x_plate_ohms = 180,
528 .get_pendown_state = ts_get_pendown_state,
529 .init_platform_hw = ts_init,
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530};
531
532static struct i2c_board_info ts_i2c_clients = {
533 I2C_BOARD_INFO("tsc2007", 0x48),
534 .type = "tsc2007",
535 .platform_data = &tsc2007_info,
536 .irq = IRQ0,
537};
538
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GL
539static struct regulator_consumer_supply cn12_power_consumers[] =
540{
541 REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
542 REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
543 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
544 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
545};
546
547static struct regulator_init_data cn12_power_init_data = {
548 .constraints = {
549 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
550 },
551 .num_consumer_supplies = ARRAY_SIZE(cn12_power_consumers),
552 .consumer_supplies = cn12_power_consumers,
553};
554
555static struct fixed_voltage_config cn12_power_info = {
556 .supply_name = "CN12 SD/MMC Vdd",
557 .microvolts = 3300000,
558 .gpio = GPIO_PTB7,
559 .enable_high = 1,
560 .init_data = &cn12_power_init_data,
561};
562
563static struct platform_device cn12_power = {
564 .name = "reg-fixed-voltage",
565 .id = 0,
566 .dev = {
567 .platform_data = &cn12_power_info,
568 },
569};
570
5744c881 571#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1238c684 572/* SDHI0 */
d4c191df
GL
573static struct regulator_consumer_supply sdhi0_power_consumers[] =
574{
575 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
576 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
577};
578
579static struct regulator_init_data sdhi0_power_init_data = {
580 .constraints = {
581 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
582 },
583 .num_consumer_supplies = ARRAY_SIZE(sdhi0_power_consumers),
584 .consumer_supplies = sdhi0_power_consumers,
585};
586
587static struct fixed_voltage_config sdhi0_power_info = {
588 .supply_name = "CN11 SD/MMC Vdd",
589 .microvolts = 3300000,
590 .gpio = GPIO_PTB6,
591 .enable_high = 1,
592 .init_data = &sdhi0_power_init_data,
593};
594
595static struct platform_device sdhi0_power = {
596 .name = "reg-fixed-voltage",
597 .id = 1,
598 .dev = {
599 .platform_data = &sdhi0_power_info,
600 },
601};
602
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603static struct tmio_mmc_data sdhi0_info = {
604 .chan_priv_tx = (void *)SHDMA_SLAVE_SDHI0_TX,
605 .chan_priv_rx = (void *)SHDMA_SLAVE_SDHI0_RX,
606 .capabilities = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
4eb80146 607 MMC_CAP_NEEDS_POLL,
84f11d5b 608 .flags = TMIO_MMC_USE_GPIO_CD,
afa2c940 609 .cd_gpio = GPIO_PTY7,
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MD
610};
611
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612static struct resource sdhi0_resources[] = {
613 [0] = {
614 .name = "SDHI0",
615 .start = 0x04ce0000,
d80e9221 616 .end = 0x04ce00ff,
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617 .flags = IORESOURCE_MEM,
618 },
619 [1] = {
9307d115 620 .start = evt2irq(0xe80),
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KM
621 .flags = IORESOURCE_IRQ,
622 },
623};
624
625static struct platform_device sdhi0_device = {
626 .name = "sh_mobile_sdhi",
627 .num_resources = ARRAY_SIZE(sdhi0_resources),
628 .resource = sdhi0_resources,
629 .id = 0,
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MD
630 .dev = {
631 .platform_data = &sdhi0_info,
632 },
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KM
633};
634
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GL
635#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
636/* SDHI1 */
84f11d5b
KM
637static struct tmio_mmc_data sdhi1_info = {
638 .chan_priv_tx = (void *)SHDMA_SLAVE_SDHI1_TX,
639 .chan_priv_rx = (void *)SHDMA_SLAVE_SDHI1_RX,
640 .capabilities = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
4eb80146 641 MMC_CAP_NEEDS_POLL,
84f11d5b 642 .flags = TMIO_MMC_USE_GPIO_CD,
afa2c940 643 .cd_gpio = GPIO_PTW7,
98779ad8
MD
644};
645
96987d96
KM
646static struct resource sdhi1_resources[] = {
647 [0] = {
648 .name = "SDHI1",
649 .start = 0x04cf0000,
d80e9221 650 .end = 0x04cf00ff,
96987d96
KM
651 .flags = IORESOURCE_MEM,
652 },
653 [1] = {
9307d115 654 .start = evt2irq(0x4e0),
96987d96
KM
655 .flags = IORESOURCE_IRQ,
656 },
657};
658
659static struct platform_device sdhi1_device = {
660 .name = "sh_mobile_sdhi",
661 .num_resources = ARRAY_SIZE(sdhi1_resources),
662 .resource = sdhi1_resources,
663 .id = 1,
98779ad8
MD
664 .dev = {
665 .platform_data = &sdhi1_info,
666 },
96987d96 667};
1238c684 668#endif /* CONFIG_MMC_SH_MMCIF */
96987d96 669
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MD
670#else
671
9503e891 672/* MMC SPI */
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MD
673static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
674{
675 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
676}
677
678static struct mmc_spi_platform_data mmc_spi_info = {
1ce4da7a 679 .caps = MMC_CAP_NEEDS_POLL,
afa2c940 680 .caps2 = MMC_CAP2_RO_ACTIVE_HIGH,
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MD
681 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
682 .setpower = mmc_spi_setpower,
afa2c940
LP
683 .flags = MMC_SPI_USE_CD_GPIO | MMC_SPI_USE_RO_GPIO,
684 .cd_gpio = GPIO_PTY7,
685 .ro_gpio = GPIO_PTY6,
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MD
686};
687
688static struct spi_board_info spi_bus[] = {
689 {
690 .modalias = "mmc_spi",
691 .platform_data = &mmc_spi_info,
692 .max_speed_hz = 5000000,
693 .mode = SPI_MODE_0,
694 .controller_data = (void *) GPIO_PTM4,
695 },
696};
697
9503e891 698/* MSIOF0 */
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MD
699static struct sh_msiof_spi_info msiof0_data = {
700 .num_chipselect = 1,
701};
702
703static struct resource msiof0_resources[] = {
704 [0] = {
705 .name = "MSIOF0",
706 .start = 0xa4c40000,
707 .end = 0xa4c40063,
708 .flags = IORESOURCE_MEM,
709 },
710 [1] = {
9307d115 711 .start = evt2irq(0xc80),
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MD
712 .flags = IORESOURCE_IRQ,
713 },
714};
715
716static struct platform_device msiof0_device = {
717 .name = "spi_sh_msiof",
718 .id = 0, /* MSIOF0 */
719 .dev = {
720 .platform_data = &msiof0_data,
721 },
722 .num_resources = ARRAY_SIZE(msiof0_resources),
723 .resource = msiof0_resources,
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MD
724};
725
726#endif
727
9aa25d64 728/* I2C Video/Camera */
207efd07
KM
729static struct i2c_board_info i2c_camera[] = {
730 {
731 I2C_BOARD_INFO("tw9910", 0x45),
732 },
9aa25d64
KM
733 {
734 /* 1st camera */
735 I2C_BOARD_INFO("mt9t112", 0x3c),
736 },
737 {
738 /* 2nd camera */
739 I2C_BOARD_INFO("mt9t112", 0x3c),
740 },
207efd07
KM
741};
742
743/* tw9910 */
744static int tw9910_power(struct device *dev, int mode)
745{
746 int val = mode ? 0 : 1;
747
748 gpio_set_value(GPIO_PTU2, val);
749 if (mode)
750 mdelay(100);
751
752 return 0;
753}
754
755static struct tw9910_video_info tw9910_info = {
756 .buswidth = SOCAM_DATAWIDTH_8,
757 .mpout = TW9910_MPO_FIELD,
758};
759
760static struct soc_camera_link tw9910_link = {
761 .i2c_adapter_id = 0,
762 .bus_id = 1,
763 .power = tw9910_power,
764 .board_info = &i2c_camera[0],
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KM
765 .priv = &tw9910_info,
766};
767
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KM
768/* mt9t112 */
769static int mt9t112_power1(struct device *dev, int mode)
770{
771 gpio_set_value(GPIO_PTA3, mode);
772 if (mode)
773 mdelay(100);
774
775 return 0;
776}
777
778static struct mt9t112_camera_info mt9t112_info1 = {
779 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
780 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
781};
782
783static struct soc_camera_link mt9t112_link1 = {
784 .i2c_adapter_id = 0,
785 .power = mt9t112_power1,
786 .bus_id = 0,
787 .board_info = &i2c_camera[1],
9aa25d64
KM
788 .priv = &mt9t112_info1,
789};
790
791static int mt9t112_power2(struct device *dev, int mode)
792{
793 gpio_set_value(GPIO_PTA4, mode);
794 if (mode)
795 mdelay(100);
796
797 return 0;
798}
799
800static struct mt9t112_camera_info mt9t112_info2 = {
801 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
802 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
803};
804
805static struct soc_camera_link mt9t112_link2 = {
806 .i2c_adapter_id = 1,
807 .power = mt9t112_power2,
808 .bus_id = 1,
809 .board_info = &i2c_camera[2],
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KM
810 .priv = &mt9t112_info2,
811};
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KM
812
813static struct platform_device camera_devices[] = {
814 {
815 .name = "soc-camera-pdrv",
816 .id = 0,
817 .dev = {
818 .platform_data = &tw9910_link,
819 },
820 },
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KM
821 {
822 .name = "soc-camera-pdrv",
823 .id = 1,
824 .dev = {
825 .platform_data = &mt9t112_link1,
826 },
827 },
828 {
829 .name = "soc-camera-pdrv",
830 .id = 2,
831 .dev = {
832 .platform_data = &mt9t112_link2,
833 },
834 },
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KM
835};
836
1980fdc4 837/* FSI */
1980fdc4
KM
838static struct resource fsi_resources[] = {
839 [0] = {
840 .name = "FSI",
841 .start = 0xFE3C0000,
842 .end = 0xFE3C021d,
843 .flags = IORESOURCE_MEM,
844 },
845 [1] = {
9307d115 846 .start = evt2irq(0xf80),
1980fdc4
KM
847 .flags = IORESOURCE_IRQ,
848 },
849};
850
851static struct platform_device fsi_device = {
852 .name = "sh_fsi",
853 .id = 0,
854 .num_resources = ARRAY_SIZE(fsi_resources),
855 .resource = fsi_resources,
1980fdc4
KM
856};
857
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KM
858static struct asoc_simple_card_info fsi_da7210_info = {
859 .name = "DA7210",
860 .card = "FSIB-DA7210",
064bfada
KM
861 .codec = "da7210.0-001a",
862 .platform = "sh_fsi.0",
c7a507ee 863 .daifmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM,
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KM
864 .cpu_dai = {
865 .name = "fsib-dai",
a4a2992c
KM
866 },
867 .codec_dai = {
868 .name = "da7210-hifi",
a4a2992c 869 },
064bfada
KM
870};
871
872static struct platform_device fsi_da7210_device = {
873 .name = "asoc-simple-card",
874 .dev = {
875 .platform_data = &fsi_da7210_info,
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KM
876 .coherent_dma_mask = DMA_BIT_MASK(32),
877 .dma_mask = &fsi_da7210_device.dev.coherent_dma_mask,
064bfada
KM
878 },
879};
880
881
26365716
KM
882/* IrDA */
883static struct resource irda_resources[] = {
884 [0] = {
885 .name = "IrDA",
886 .start = 0xA45D0000,
887 .end = 0xA45D0049,
888 .flags = IORESOURCE_MEM,
889 },
890 [1] = {
9307d115 891 .start = evt2irq(0x480),
26365716
KM
892 .flags = IORESOURCE_IRQ,
893 },
894};
895
896static struct platform_device irda_device = {
897 .name = "sh_sir",
898 .num_resources = ARRAY_SIZE(irda_resources),
899 .resource = irda_resources,
900};
901
b5dcee22 902#include <media/i2c/ak881x.h>
d647f0b7 903#include <media/drv-intf/sh_vou.h>
aee5ab0b 904
3ce09334 905static struct ak881x_pdata ak881x_pdata = {
aee5ab0b
GL
906 .flags = AK881X_IF_MODE_SLAVE,
907};
908
909static struct i2c_board_info ak8813 = {
910 I2C_BOARD_INFO("ak8813", 0x20),
911 .platform_data = &ak881x_pdata,
912};
913
3ce09334 914static struct sh_vou_pdata sh_vou_pdata = {
aee5ab0b
GL
915 .bus_fmt = SH_VOU_BUS_8BIT,
916 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
917 .board_info = &ak8813,
918 .i2c_adap = 0,
aee5ab0b
GL
919};
920
921static struct resource sh_vou_resources[] = {
922 [0] = {
923 .start = 0xfe960000,
924 .end = 0xfe962043,
925 .flags = IORESOURCE_MEM,
926 },
927 [1] = {
9307d115 928 .start = evt2irq(0x8e0),
aee5ab0b
GL
929 .flags = IORESOURCE_IRQ,
930 },
931};
932
933static struct platform_device vou_device = {
934 .name = "sh-vou",
935 .id = -1,
936 .num_resources = ARRAY_SIZE(sh_vou_resources),
937 .resource = sh_vou_resources,
938 .dev = {
939 .platform_data = &sh_vou_pdata,
940 },
aee5ab0b
GL
941};
942
5744c881 943#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1238c684 944/* SH_MMCIF */
1238c684
YG
945static struct resource sh_mmcif_resources[] = {
946 [0] = {
947 .name = "SH_MMCIF",
948 .start = 0xA4CA0000,
949 .end = 0xA4CA00FF,
950 .flags = IORESOURCE_MEM,
951 },
952 [1] = {
953 /* MMC2I */
9307d115 954 .start = evt2irq(0x5a0),
1238c684
YG
955 .flags = IORESOURCE_IRQ,
956 },
957 [2] = {
958 /* MMC3I */
9307d115 959 .start = evt2irq(0x5c0),
1238c684
YG
960 .flags = IORESOURCE_IRQ,
961 },
962};
963
3ce09334 964static struct sh_mmcif_plat_data sh_mmcif_plat = {
1238c684
YG
965 .sup_pclk = 0, /* SH7724: Max Pclk/2 */
966 .caps = MMC_CAP_4_BIT_DATA |
967 MMC_CAP_8_BIT_DATA |
968 MMC_CAP_NEEDS_POLL,
969 .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
970};
971
972static struct platform_device sh_mmcif_device = {
973 .name = "sh_mmcif",
974 .id = 0,
975 .dev = {
976 .platform_data = &sh_mmcif_plat,
977 },
978 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
979 .resource = sh_mmcif_resources,
980};
981#endif
982
4138b740
KM
983static struct platform_device *ecovec_devices[] __initdata = {
984 &heartbeat_device,
985 &nor_flash_device,
35a35408 986 &sh_eth_device,
907050a3 987 &usb0_host_device,
3714a9a0 988 &usb1_common_device,
fb2e7394 989 &usbhs_device,
fa3ba51b 990 &lcdc_device,
fe79f919 991 &gpio_backlight_device,
2153ad32
KM
992 &ceu0_device,
993 &ceu1_device,
e9103e74 994 &keysc_device,
d4c191df 995 &cn12_power,
5744c881 996#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
d4c191df 997 &sdhi0_power,
96987d96 998 &sdhi0_device,
5744c881 999#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
96987d96 1000 &sdhi1_device,
1238c684 1001#endif
1ce4da7a
MD
1002#else
1003 &msiof0_device,
1004#endif
207efd07 1005 &camera_devices[0],
9aa25d64
KM
1006 &camera_devices[1],
1007 &camera_devices[2],
1980fdc4 1008 &fsi_device,
064bfada 1009 &fsi_da7210_device,
26365716 1010 &irda_device,
aee5ab0b 1011 &vou_device,
5744c881 1012#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1238c684
YG
1013 &sh_mmcif_device,
1014#endif
4138b740
KM
1015};
1016
6b3b5575 1017#ifdef CONFIG_I2C
4907d57f
KM
1018#define EEPROM_ADDR 0x50
1019static u8 mac_read(struct i2c_adapter *a, u8 command)
1020{
1021 struct i2c_msg msg[2];
1022 u8 buf;
1023 int ret;
1024
1025 msg[0].addr = EEPROM_ADDR;
1026 msg[0].flags = 0;
1027 msg[0].len = 1;
1028 msg[0].buf = &command;
1029
1030 msg[1].addr = EEPROM_ADDR;
1031 msg[1].flags = I2C_M_RD;
1032 msg[1].len = 1;
1033 msg[1].buf = &buf;
1034
1035 ret = i2c_transfer(a, msg, 2);
1036 if (ret < 0) {
1037 printk(KERN_ERR "error %d\n", ret);
1038 buf = 0xff;
1039 }
1040
1041 return buf;
1042}
1043
376abbb4 1044static void __init sh_eth_init(struct sh_eth_plat_data *pd)
4907d57f
KM
1045{
1046 struct i2c_adapter *a = i2c_get_adapter(1);
4907d57f
KM
1047 int i;
1048
1049 if (!a) {
1050 pr_err("can not get I2C 1\n");
1051 return;
1052 }
1053
25985edc 1054 /* read MAC address from EEPROM */
376abbb4
MD
1055 for (i = 0; i < sizeof(pd->mac_addr); i++) {
1056 pd->mac_addr[i] = mac_read(a, 0x10 + i);
4907d57f
KM
1057 msleep(10);
1058 }
b230eb32
KM
1059
1060 i2c_put_adapter(a);
4907d57f 1061}
6b3b5575
MD
1062#else
1063static void __init sh_eth_init(struct sh_eth_plat_data *pd)
1064{
1065 pr_err("unable to read sh_eth MAC address\n");
1066}
1067#endif
4907d57f 1068
fa3ba51b 1069#define PORT_HIZA 0xA4050158
ea15edb2 1070#define IODRIVEA 0xA405018A
eb0cd9e8
MD
1071
1072extern char ecovec24_sdram_enter_start;
1073extern char ecovec24_sdram_enter_end;
1074extern char ecovec24_sdram_leave_start;
1075extern char ecovec24_sdram_leave_end;
1076
4907d57f 1077static int __init arch_setup(void)
4138b740 1078{
1980fdc4 1079 struct clk *clk;
4eb80146 1080 bool cn12_enabled = false;
1980fdc4 1081
eb0cd9e8 1082 /* register board specific self-refresh code */
2839bd61
MD
1083 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
1084 SUSP_SH_RSTANDBY,
eb0cd9e8
MD
1085 &ecovec24_sdram_enter_start,
1086 &ecovec24_sdram_enter_end,
1087 &ecovec24_sdram_leave_start,
1088 &ecovec24_sdram_leave_end);
1089
f78bab30
MD
1090 /* enable STATUS0, STATUS2 and PDSTATUS */
1091 gpio_request(GPIO_FN_STATUS0, NULL);
1092 gpio_request(GPIO_FN_STATUS2, NULL);
1093 gpio_request(GPIO_FN_PDSTATUS, NULL);
1094
4138b740
KM
1095 /* enable SCIFA0 */
1096 gpio_request(GPIO_FN_SCIF0_TXD, NULL);
1097 gpio_request(GPIO_FN_SCIF0_RXD, NULL);
4138b740
KM
1098
1099 /* enable debug LED */
1100 gpio_request(GPIO_PTG0, NULL);
1101 gpio_request(GPIO_PTG1, NULL);
1102 gpio_request(GPIO_PTG2, NULL);
1103 gpio_request(GPIO_PTG3, NULL);
b7056bc1
KM
1104 gpio_direction_output(GPIO_PTG0, 0);
1105 gpio_direction_output(GPIO_PTG1, 0);
1106 gpio_direction_output(GPIO_PTG2, 0);
1107 gpio_direction_output(GPIO_PTG3, 0);
9d56dd3b 1108 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
4138b740 1109
35a35408
KM
1110 /* enable SH-Eth */
1111 gpio_request(GPIO_PTA1, NULL);
1112 gpio_direction_output(GPIO_PTA1, 1);
1113 mdelay(20);
1114
1115 gpio_request(GPIO_FN_RMII_RXD0, NULL);
1116 gpio_request(GPIO_FN_RMII_RXD1, NULL);
1117 gpio_request(GPIO_FN_RMII_TXD0, NULL);
1118 gpio_request(GPIO_FN_RMII_TXD1, NULL);
1119 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
1120 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
1121 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
1122 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
1123 gpio_request(GPIO_FN_MDIO, NULL);
1124 gpio_request(GPIO_FN_MDC, NULL);
1125 gpio_request(GPIO_FN_LNKSTA, NULL);
1126
907050a3 1127 /* enable USB */
9d56dd3b
PM
1128 __raw_writew(0x0000, 0xA4D80000);
1129 __raw_writew(0x0000, 0xA4D90000);
907050a3
KM
1130 gpio_request(GPIO_PTB3, NULL);
1131 gpio_request(GPIO_PTB4, NULL);
1132 gpio_request(GPIO_PTB5, NULL);
1133 gpio_direction_input(GPIO_PTB3);
1134 gpio_direction_output(GPIO_PTB4, 0);
1135 gpio_direction_output(GPIO_PTB5, 0);
9d56dd3b
PM
1136 __raw_writew(0x0600, 0xa40501d4);
1137 __raw_writew(0x0600, 0xa4050192);
907050a3 1138
3714a9a0
KM
1139 if (gpio_get_value(GPIO_PTB3)) {
1140 printk(KERN_INFO "USB1 function is selected\n");
1141 usb1_common_device.name = "r8a66597_udc";
1142 } else {
1143 printk(KERN_INFO "USB1 host is selected\n");
1144 usb1_common_device.name = "r8a66597_hcd";
1145 }
1146
fa3ba51b
KM
1147 /* enable LCDC */
1148 gpio_request(GPIO_FN_LCDD23, NULL);
1149 gpio_request(GPIO_FN_LCDD22, NULL);
1150 gpio_request(GPIO_FN_LCDD21, NULL);
1151 gpio_request(GPIO_FN_LCDD20, NULL);
1152 gpio_request(GPIO_FN_LCDD19, NULL);
1153 gpio_request(GPIO_FN_LCDD18, NULL);
1154 gpio_request(GPIO_FN_LCDD17, NULL);
1155 gpio_request(GPIO_FN_LCDD16, NULL);
1156 gpio_request(GPIO_FN_LCDD15, NULL);
1157 gpio_request(GPIO_FN_LCDD14, NULL);
1158 gpio_request(GPIO_FN_LCDD13, NULL);
1159 gpio_request(GPIO_FN_LCDD12, NULL);
1160 gpio_request(GPIO_FN_LCDD11, NULL);
1161 gpio_request(GPIO_FN_LCDD10, NULL);
1162 gpio_request(GPIO_FN_LCDD9, NULL);
1163 gpio_request(GPIO_FN_LCDD8, NULL);
1164 gpio_request(GPIO_FN_LCDD7, NULL);
1165 gpio_request(GPIO_FN_LCDD6, NULL);
1166 gpio_request(GPIO_FN_LCDD5, NULL);
1167 gpio_request(GPIO_FN_LCDD4, NULL);
1168 gpio_request(GPIO_FN_LCDD3, NULL);
1169 gpio_request(GPIO_FN_LCDD2, NULL);
1170 gpio_request(GPIO_FN_LCDD1, NULL);
1171 gpio_request(GPIO_FN_LCDD0, NULL);
1172 gpio_request(GPIO_FN_LCDDISP, NULL);
1173 gpio_request(GPIO_FN_LCDHSYN, NULL);
1174 gpio_request(GPIO_FN_LCDDCK, NULL);
1175 gpio_request(GPIO_FN_LCDVSYN, NULL);
1176 gpio_request(GPIO_FN_LCDDON, NULL);
1177 gpio_request(GPIO_FN_LCDLCLK, NULL);
9d56dd3b 1178 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
fa3ba51b
KM
1179
1180 gpio_request(GPIO_PTE6, NULL);
1181 gpio_request(GPIO_PTU1, NULL);
fa3ba51b
KM
1182 gpio_request(GPIO_PTA2, NULL);
1183 gpio_direction_input(GPIO_PTE6);
1184 gpio_direction_output(GPIO_PTU1, 0);
fa3ba51b
KM
1185 gpio_direction_output(GPIO_PTA2, 0);
1186
82b33221 1187 /* I/O buffer drive ability is high */
9d56dd3b 1188 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
ea15edb2 1189
fa3ba51b
KM
1190 if (gpio_get_value(GPIO_PTE6)) {
1191 /* DVI */
1192 lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
44432407 1193 lcdc_info.ch[0].clock_divider = 1;
93ff2598
LP
1194 lcdc_info.ch[0].lcd_modes = ecovec_dvi_modes;
1195 lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_dvi_modes);
fa3ba51b 1196
fe79f919
LP
1197 /* No backlight */
1198 gpio_backlight_data.fbdev = NULL;
1199
fa3ba51b
KM
1200 gpio_set_value(GPIO_PTA2, 1);
1201 gpio_set_value(GPIO_PTU1, 1);
1202 } else {
1203 /* Panel */
ea15edb2 1204 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
44432407 1205 lcdc_info.ch[0].clock_divider = 2;
93ff2598
LP
1206 lcdc_info.ch[0].lcd_modes = ecovec_lcd_modes;
1207 lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_lcd_modes);
ea15edb2 1208
ea15edb2
KM
1209 /* FIXME
1210 *
1211 * LCDDON control is needed for Panel,
1212 * but current sh_mobile_lcdc driver doesn't control it.
1213 * It is temporary correspondence
1214 */
1215 gpio_request(GPIO_PTF4, NULL);
1216 gpio_direction_output(GPIO_PTF4, 1);
8810e055
KM
1217
1218 /* enable TouchScreen */
1219 i2c_register_board_info(0, &ts_i2c_clients, 1);
fcb8918f 1220 irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
fa3ba51b
KM
1221 }
1222
2153ad32
KM
1223 /* enable CEU0 */
1224 gpio_request(GPIO_FN_VIO0_D15, NULL);
1225 gpio_request(GPIO_FN_VIO0_D14, NULL);
1226 gpio_request(GPIO_FN_VIO0_D13, NULL);
1227 gpio_request(GPIO_FN_VIO0_D12, NULL);
1228 gpio_request(GPIO_FN_VIO0_D11, NULL);
1229 gpio_request(GPIO_FN_VIO0_D10, NULL);
1230 gpio_request(GPIO_FN_VIO0_D9, NULL);
1231 gpio_request(GPIO_FN_VIO0_D8, NULL);
1232 gpio_request(GPIO_FN_VIO0_D7, NULL);
1233 gpio_request(GPIO_FN_VIO0_D6, NULL);
1234 gpio_request(GPIO_FN_VIO0_D5, NULL);
1235 gpio_request(GPIO_FN_VIO0_D4, NULL);
1236 gpio_request(GPIO_FN_VIO0_D3, NULL);
1237 gpio_request(GPIO_FN_VIO0_D2, NULL);
1238 gpio_request(GPIO_FN_VIO0_D1, NULL);
1239 gpio_request(GPIO_FN_VIO0_D0, NULL);
1240 gpio_request(GPIO_FN_VIO0_VD, NULL);
1241 gpio_request(GPIO_FN_VIO0_CLK, NULL);
1242 gpio_request(GPIO_FN_VIO0_FLD, NULL);
1243 gpio_request(GPIO_FN_VIO0_HD, NULL);
1244 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
1245
1246 /* enable CEU1 */
1247 gpio_request(GPIO_FN_VIO1_D7, NULL);
1248 gpio_request(GPIO_FN_VIO1_D6, NULL);
1249 gpio_request(GPIO_FN_VIO1_D5, NULL);
1250 gpio_request(GPIO_FN_VIO1_D4, NULL);
1251 gpio_request(GPIO_FN_VIO1_D3, NULL);
1252 gpio_request(GPIO_FN_VIO1_D2, NULL);
1253 gpio_request(GPIO_FN_VIO1_D1, NULL);
1254 gpio_request(GPIO_FN_VIO1_D0, NULL);
1255 gpio_request(GPIO_FN_VIO1_FLD, NULL);
1256 gpio_request(GPIO_FN_VIO1_HD, NULL);
1257 gpio_request(GPIO_FN_VIO1_VD, NULL);
1258 gpio_request(GPIO_FN_VIO1_CLK, NULL);
1259 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
1260
e9103e74
KM
1261 /* enable KEYSC */
1262 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
1263 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
1264 gpio_request(GPIO_FN_KEYOUT3, NULL);
1265 gpio_request(GPIO_FN_KEYOUT2, NULL);
1266 gpio_request(GPIO_FN_KEYOUT1, NULL);
1267 gpio_request(GPIO_FN_KEYOUT0, NULL);
1268 gpio_request(GPIO_FN_KEYIN0, NULL);
1269
064a16dc
KM
1270 /* enable user debug switch */
1271 gpio_request(GPIO_PTR0, NULL);
1272 gpio_request(GPIO_PTR4, NULL);
1273 gpio_request(GPIO_PTR5, NULL);
1274 gpio_request(GPIO_PTR6, NULL);
1275 gpio_direction_input(GPIO_PTR0);
1276 gpio_direction_input(GPIO_PTR4);
1277 gpio_direction_input(GPIO_PTR5);
1278 gpio_direction_input(GPIO_PTR6);
1279
4eb80146 1280 /* SD-card slot CN11 */
5744c881 1281#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1ce4da7a 1282 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
96987d96
KM
1283 gpio_request(GPIO_FN_SDHI0WP, NULL);
1284 gpio_request(GPIO_FN_SDHI0CMD, NULL);
1285 gpio_request(GPIO_FN_SDHI0CLK, NULL);
1286 gpio_request(GPIO_FN_SDHI0D3, NULL);
1287 gpio_request(GPIO_FN_SDHI0D2, NULL);
1288 gpio_request(GPIO_FN_SDHI0D1, NULL);
1289 gpio_request(GPIO_FN_SDHI0D0, NULL);
1ce4da7a
MD
1290#else
1291 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1292 gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1293 gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1294 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1295 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
1296 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
1297 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1298 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1ce4da7a
MD
1299
1300 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1301#endif
96987d96 1302
4eb80146
GL
1303 /* MMC/SD-card slot CN12 */
1304#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1305 /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
1306 gpio_request(GPIO_FN_MMC_D7, NULL);
1307 gpio_request(GPIO_FN_MMC_D6, NULL);
1308 gpio_request(GPIO_FN_MMC_D5, NULL);
1309 gpio_request(GPIO_FN_MMC_D4, NULL);
1310 gpio_request(GPIO_FN_MMC_D3, NULL);
1311 gpio_request(GPIO_FN_MMC_D2, NULL);
1312 gpio_request(GPIO_FN_MMC_D1, NULL);
1313 gpio_request(GPIO_FN_MMC_D0, NULL);
1314 gpio_request(GPIO_FN_MMC_CLK, NULL);
1315 gpio_request(GPIO_FN_MMC_CMD, NULL);
4eb80146
GL
1316
1317 cn12_enabled = true;
1318#elif defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1319 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
1320 gpio_request(GPIO_FN_SDHI1WP, NULL);
1321 gpio_request(GPIO_FN_SDHI1CMD, NULL);
1322 gpio_request(GPIO_FN_SDHI1CLK, NULL);
1323 gpio_request(GPIO_FN_SDHI1D3, NULL);
1324 gpio_request(GPIO_FN_SDHI1D2, NULL);
1325 gpio_request(GPIO_FN_SDHI1D1, NULL);
1326 gpio_request(GPIO_FN_SDHI1D0, NULL);
4eb80146 1327
4eb80146
GL
1328 cn12_enabled = true;
1329#endif
1330
1331 if (cn12_enabled)
1332 /* I/O buffer drive ability is high for CN12 */
1333 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000,
1334 IODRIVEA);
1335
207efd07
KM
1336 /* enable Video */
1337 gpio_request(GPIO_PTU2, NULL);
1338 gpio_direction_output(GPIO_PTU2, 1);
1339
9aa25d64
KM
1340 /* enable Camera */
1341 gpio_request(GPIO_PTA3, NULL);
1342 gpio_request(GPIO_PTA4, NULL);
1343 gpio_direction_output(GPIO_PTA3, 0);
1344 gpio_direction_output(GPIO_PTA4, 0);
1345
1980fdc4
KM
1346 /* enable FSI */
1347 gpio_request(GPIO_FN_FSIMCKB, NULL);
1348 gpio_request(GPIO_FN_FSIIBSD, NULL);
1349 gpio_request(GPIO_FN_FSIOBSD, NULL);
1350 gpio_request(GPIO_FN_FSIIBBCK, NULL);
1351 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
1352 gpio_request(GPIO_FN_FSIOBBCK, NULL);
1353 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
1354 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1355
16afc9fb
KM
1356 /* set SPU2 clock to 83.4 MHz */
1357 clk = clk_get(NULL, "spu_clk");
56ea5109 1358 if (!IS_ERR(clk)) {
10305853
KM
1359 clk_set_rate(clk, clk_round_rate(clk, 83333333));
1360 clk_put(clk);
1361 }
16afc9fb 1362
1980fdc4
KM
1363 /* change parent of FSI B */
1364 clk = clk_get(NULL, "fsib_clk");
56ea5109 1365 if (!IS_ERR(clk)) {
4bd5d259
KM
1366 /* 48kHz dummy clock was used to make sure 1/1 divide */
1367 clk_set_rate(&sh7724_fsimckb_clk, 48000);
1368 clk_set_parent(clk, &sh7724_fsimckb_clk);
1369 clk_set_rate(clk, 48000);
10305853
KM
1370 clk_put(clk);
1371 }
1980fdc4
KM
1372
1373 gpio_request(GPIO_PTU0, NULL);
1374 gpio_direction_output(GPIO_PTU0, 0);
1375 mdelay(20);
1376
ea440783
NH
1377 /* enable motion sensor */
1378 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1379 gpio_direction_input(GPIO_FN_INTC_IRQ1);
1380
6f26d19f
MD
1381 /* set VPU clock to 166 MHz */
1382 clk = clk_get(NULL, "vpu_clk");
56ea5109 1383 if (!IS_ERR(clk)) {
10305853
KM
1384 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1385 clk_put(clk);
1386 }
6f26d19f 1387
26365716
KM
1388 /* enable IrDA */
1389 gpio_request(GPIO_FN_IRDA_OUT, NULL);
1390 gpio_request(GPIO_FN_IRDA_IN, NULL);
1391 gpio_request(GPIO_PTU5, NULL);
1392 gpio_direction_output(GPIO_PTU5, 0);
1393
125ecce6 1394 /* enable I2C device */
1980fdc4
KM
1395 i2c_register_board_info(0, i2c0_devices,
1396 ARRAY_SIZE(i2c0_devices));
1397
125ecce6
KM
1398 i2c_register_board_info(1, i2c1_devices,
1399 ARRAY_SIZE(i2c1_devices));
1400
92359a70 1401#if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
aee5ab0b
GL
1402 /* VOU */
1403 gpio_request(GPIO_FN_DV_D15, NULL);
1404 gpio_request(GPIO_FN_DV_D14, NULL);
1405 gpio_request(GPIO_FN_DV_D13, NULL);
1406 gpio_request(GPIO_FN_DV_D12, NULL);
1407 gpio_request(GPIO_FN_DV_D11, NULL);
1408 gpio_request(GPIO_FN_DV_D10, NULL);
1409 gpio_request(GPIO_FN_DV_D9, NULL);
1410 gpio_request(GPIO_FN_DV_D8, NULL);
1411 gpio_request(GPIO_FN_DV_CLKI, NULL);
1412 gpio_request(GPIO_FN_DV_CLK, NULL);
1413 gpio_request(GPIO_FN_DV_VSYNC, NULL);
1414 gpio_request(GPIO_FN_DV_HSYNC, NULL);
1415
1416 /* AK8813 power / reset sequence */
1417 gpio_request(GPIO_PTG4, NULL);
1418 gpio_request(GPIO_PTU3, NULL);
1419 /* Reset */
1420 gpio_direction_output(GPIO_PTG4, 0);
1421 /* Power down */
1422 gpio_direction_output(GPIO_PTU3, 1);
1423
1424 udelay(10);
1425
1426 /* Power up, reset */
1427 gpio_set_value(GPIO_PTU3, 0);
1428
1429 udelay(10);
1430
1431 /* Remove reset */
1432 gpio_set_value(GPIO_PTG4, 1);
92359a70 1433#endif
aee5ab0b 1434
4138b740
KM
1435 return platform_add_devices(ecovec_devices,
1436 ARRAY_SIZE(ecovec_devices));
1437}
4907d57f
KM
1438arch_initcall(arch_setup);
1439
1440static int __init devices_setup(void)
1441{
376abbb4 1442 sh_eth_init(&sh_eth_plat);
4907d57f
KM
1443 return 0;
1444}
1445device_initcall(devices_setup);
1446
4138b740
KM
1447static struct sh_machine_vector mv_ecovec __initmv = {
1448 .mv_name = "R0P7724 (EcoVec)",
1449};