[mirror_ubuntu-focal-kernel.git] / arch / sh / boards / mach-migor / setup.c

/*
 * Renesas System Solutions Asia Pte. Ltd - Migo-R
 *
 * Copyright (C) 2008 Magnus Damm
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/input.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/nand.h>
#include <linux/i2c.h>
#include <linux/smc91x.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/gpio.h>
#include <media/sh_mobile_ceu.h>
#include <media/ov772x.h>
#include <media/tw9910.h>
#include <video/sh_mobile_lcdc.h>
#include <asm/clock.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/sh_keysc.h>
#include <mach/migor.h>
#include <cpu/sh7722.h>

/* Address     IRQ  Size  Bus  Description
 * 0x00000000       64MB  16   NOR Flash (SP29PL256N)
 * 0x0c000000       64MB  64   SDRAM (2xK4M563233G)
 * 0x10000000  IRQ0       16   Ethernet (SMC91C111)
 * 0x14000000  IRQ4       16   USB 2.0 Host Controller (M66596)
 * 0x18000000       8GB    8   NAND Flash (K9K8G08U0A)
 */

static struct smc91x_platdata smc91x_info = {
	.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
};

static struct resource smc91x_eth_resources[] = {
	[0] = {
		.name   = "SMC91C111" ,
		.start  = 0x10000300,
		.end    = 0x1000030f,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = 32, /* IRQ0 */
		.flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device smc91x_eth_device = {
	.name           = "smc91x",
	.num_resources  = ARRAY_SIZE(smc91x_eth_resources),
	.resource       = smc91x_eth_resources,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
};

static struct sh_keysc_info sh_keysc_info = {
	.mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
	.scan_timing = 3,
	.delay = 5,
	.keycodes = {
		0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
		0, KEY_F, KEY_C, KEY_D,	KEY_H, KEY_1,
		0, KEY_2, KEY_3, KEY_4,	KEY_5, KEY_6,
		0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
		0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
	},
};

static struct resource sh_keysc_resources[] = {
	[0] = {
		.start  = 0x044b0000,
		.end    = 0x044b000f,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = 79,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device sh_keysc_device = {
	.name           = "sh_keysc",
	.id             = 0, /* "keysc0" clock */
	.num_resources  = ARRAY_SIZE(sh_keysc_resources),
	.resource       = sh_keysc_resources,
	.dev	= {
		.platform_data	= &sh_keysc_info,
	},
};

static struct mtd_partition migor_nor_flash_partitions[] =
{
	{
		.name = "uboot",
		.offset = 0,
		.size = (1 * 1024 * 1024),
		.mask_flags = MTD_WRITEABLE,	/* Read-only */
	},
	{
		.name = "rootfs",
		.offset = MTDPART_OFS_APPEND,
		.size = (15 * 1024 * 1024),
	},
	{
		.name = "other",
		.offset = MTDPART_OFS_APPEND,
		.size = MTDPART_SIZ_FULL,
	},
};

static struct physmap_flash_data migor_nor_flash_data = {
	.width		= 2,
	.parts		= migor_nor_flash_partitions,
	.nr_parts	= ARRAY_SIZE(migor_nor_flash_partitions),
};

static struct resource migor_nor_flash_resources[] = {
	[0] = {
		.name		= "NOR Flash",
		.start		= 0x00000000,
		.end		= 0x03ffffff,
		.flags		= IORESOURCE_MEM,
	}
};

static struct platform_device migor_nor_flash_device = {
	.name		= "physmap-flash",
	.resource	= migor_nor_flash_resources,
	.num_resources	= ARRAY_SIZE(migor_nor_flash_resources),
	.dev		= {
		.platform_data = &migor_nor_flash_data,
	},
};

static struct mtd_partition migor_nand_flash_partitions[] = {
	{
		.name		= "nanddata1",
		.offset		= 0x0,
		.size		= 512 * 1024 * 1024,
	},
	{
		.name		= "nanddata2",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 512 * 1024 * 1024,
	},
};

static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
				     unsigned int ctrl)
{
	struct nand_chip *chip = mtd->priv;

	if (cmd == NAND_CMD_NONE)
		return;

	if (ctrl & NAND_CLE)
		writeb(cmd, chip->IO_ADDR_W + 0x00400000);
	else if (ctrl & NAND_ALE)
		writeb(cmd, chip->IO_ADDR_W + 0x00800000);
	else
		writeb(cmd, chip->IO_ADDR_W);
}

static int migor_nand_flash_ready(struct mtd_info *mtd)
{
	return gpio_get_value(GPIO_PTA1); /* NAND_RBn */
}

struct platform_nand_data migor_nand_flash_data = {
	.chip = {
		.nr_chips = 1,
		.partitions = migor_nand_flash_partitions,
		.nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
		.chip_delay = 20,
		.part_probe_types = (const char *[]) { "cmdlinepart", NULL },
	},
	.ctrl = {
		.dev_ready = migor_nand_flash_ready,
		.cmd_ctrl = migor_nand_flash_cmd_ctl,
	},
};

static struct resource migor_nand_flash_resources[] = {
	[0] = {
		.name		= "NAND Flash",
		.start		= 0x18000000,
		.end		= 0x18ffffff,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device migor_nand_flash_device = {
	.name		= "gen_nand",
	.resource	= migor_nand_flash_resources,
	.num_resources	= ARRAY_SIZE(migor_nand_flash_resources),
	.dev		= {
		.platform_data = &migor_nand_flash_data,
	}
};

static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
#ifdef CONFIG_SH_MIGOR_RTA_WVGA
	.clock_source = LCDC_CLK_BUS,
	.ch[0] = {
		.chan = LCDC_CHAN_MAINLCD,
		.bpp = 16,
		.interface_type = RGB16,
		.clock_divider = 2,
		.lcd_cfg = {
			.name = "LB070WV1",
			.xres = 800,
			.yres = 480,
			.left_margin = 64,
			.right_margin = 16,
			.hsync_len = 120,
			.upper_margin = 1,
			.lower_margin = 17,
			.vsync_len = 2,
			.sync = 0,
		},
		.lcd_size_cfg = { /* 7.0 inch */
			.width = 152,
			.height = 91,
		},
	}
#endif
#ifdef CONFIG_SH_MIGOR_QVGA
	.clock_source = LCDC_CLK_PERIPHERAL,
	.ch[0] = {
		.chan = LCDC_CHAN_MAINLCD,
		.bpp = 16,
		.interface_type = SYS16A,
		.clock_divider = 10,
		.lcd_cfg = {
			.name = "PH240320T",
			.xres = 320,
			.yres = 240,
			.left_margin = 0,
			.right_margin = 16,
			.hsync_len = 8,
			.upper_margin = 1,
			.lower_margin = 17,
			.vsync_len = 2,
			.sync = FB_SYNC_HOR_HIGH_ACT,
		},
		.lcd_size_cfg = { /* 2.4 inch */
			.width = 49,
			.height = 37,
		},
		.board_cfg = {
			.setup_sys = migor_lcd_qvga_setup,
		},
		.sys_bus_cfg = {
			.ldmt2r = 0x06000a09,
			.ldmt3r = 0x180e3418,
			/* set 1s delay to encourage fsync() */
			.deferred_io_msec = 1000,
		},
	}
#endif
};

static struct resource migor_lcdc_resources[] = {
	[0] = {
		.name	= "LCDC",
		.start	= 0xfe940000, /* P4-only space */
		.end	= 0xfe941fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= 28,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device migor_lcdc_device = {
	.name		= "sh_mobile_lcdc_fb",
	.num_resources	= ARRAY_SIZE(migor_lcdc_resources),
	.resource	= migor_lcdc_resources,
	.dev	= {
		.platform_data	= &sh_mobile_lcdc_info,
	},
};

static struct clk *camera_clk;
static DEFINE_MUTEX(camera_lock);

static void camera_power_on(int is_tw)
{
	mutex_lock(&camera_lock);

	/* Use 10 MHz VIO_CKO instead of 24 MHz to work
	 * around signal quality issues on Panel Board V2.1.
	 */
	camera_clk = clk_get(NULL, "video_clk");
	clk_set_rate(camera_clk, 10000000);
	clk_enable(camera_clk);	/* start VIO_CKO */

	/* use VIO_RST to take camera out of reset */
	mdelay(10);
	if (is_tw) {
		gpio_set_value(GPIO_PTT2, 0);
		gpio_set_value(GPIO_PTT0, 0);
	} else {
		gpio_set_value(GPIO_PTT0, 1);
	}
	gpio_set_value(GPIO_PTT3, 0);
	mdelay(10);
	gpio_set_value(GPIO_PTT3, 1);
	mdelay(10); /* wait to let chip come out of reset */
}

static void camera_power_off(void)
{
	clk_disable(camera_clk); /* stop VIO_CKO */
	clk_put(camera_clk);

	gpio_set_value(GPIO_PTT3, 0);
	mutex_unlock(&camera_lock);
}

static int ov7725_power(struct device *dev, int mode)
{
	if (mode)
		camera_power_on(0);
	else
		camera_power_off();

	return 0;
}

static int tw9910_power(struct device *dev, int mode)
{
	if (mode)
		camera_power_on(1);
	else
		camera_power_off();

	return 0;
}

static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
	.flags = SOCAM_MASTER | SOCAM_DATAWIDTH_8 | SOCAM_PCLK_SAMPLE_RISING \
	| SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH,
};

static struct resource migor_ceu_resources[] = {
	[0] = {
		.name	= "CEU",
		.start	= 0xfe910000,
		.end	= 0xfe91009f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start  = 52,
		.flags  = IORESOURCE_IRQ,
	},
	[2] = {
		/* place holder for contiguous memory */
	},
};

static struct platform_device migor_ceu_device = {
	.name		= "sh_mobile_ceu",
	.id             = 0, /* "ceu0" clock */
	.num_resources	= ARRAY_SIZE(migor_ceu_resources),
	.resource	= migor_ceu_resources,
	.dev	= {
		.platform_data	= &sh_mobile_ceu_info,
	},
};

static struct ov772x_camera_info ov7725_info = {
	.buswidth  = SOCAM_DATAWIDTH_8,
	.link = {
		.power  = ov7725_power,
	},
};

static struct tw9910_video_info tw9910_info = {
	.buswidth = SOCAM_DATAWIDTH_8,
	.mpout    = TW9910_MPO_FIELD,
	.link = {
		.power  = tw9910_power,
	}
};

static struct platform_device *migor_devices[] __initdata = {
	&smc91x_eth_device,
	&sh_keysc_device,
	&migor_lcdc_device,
	&migor_ceu_device,
	&migor_nor_flash_device,
	&migor_nand_flash_device,
};

static struct i2c_board_info migor_i2c_devices[] = {
	{
		I2C_BOARD_INFO("rs5c372b", 0x32),
	},
	{
		I2C_BOARD_INFO("migor_ts", 0x51),
		.irq = 38, /* IRQ6 */
	},
	{
		I2C_BOARD_INFO("ov772x", 0x21),
		.platform_data = &ov7725_info,
	},
	{
		I2C_BOARD_INFO("tw9910", 0x45),
		.platform_data = &tw9910_info,
	},
};

static int __init migor_devices_setup(void)
{
	/* Lit D11 LED */
	gpio_request(GPIO_PTJ7, NULL);
	gpio_direction_output(GPIO_PTJ7, 1);
	gpio_export(GPIO_PTJ7, 0);

	/* Lit D12 LED */
	gpio_request(GPIO_PTJ5, NULL);
	gpio_direction_output(GPIO_PTJ5, 1);
	gpio_export(GPIO_PTJ5, 0);

	/* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
	gpio_request(GPIO_FN_IRQ0, NULL);
	ctrl_outl(0x00003400, BSC_CS4BCR);
	ctrl_outl(0x00110080, BSC_CS4WCR);

	/* KEYSC */
	gpio_request(GPIO_FN_KEYOUT0, NULL);
	gpio_request(GPIO_FN_KEYOUT1, NULL);
	gpio_request(GPIO_FN_KEYOUT2, NULL);
	gpio_request(GPIO_FN_KEYOUT3, NULL);
	gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
	gpio_request(GPIO_FN_KEYIN1, NULL);
	gpio_request(GPIO_FN_KEYIN2, NULL);
	gpio_request(GPIO_FN_KEYIN3, NULL);
	gpio_request(GPIO_FN_KEYIN4, NULL);
	gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);

	/* NAND Flash */
	gpio_request(GPIO_FN_CS6A_CE2B, NULL);
	ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
	gpio_request(GPIO_PTA1, NULL);
	gpio_direction_input(GPIO_PTA1);

	/* Touch Panel */
	gpio_request(GPIO_FN_IRQ6, NULL);

	/* LCD Panel */
#ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */
	gpio_request(GPIO_FN_LCDD17, NULL);
	gpio_request(GPIO_FN_LCDD16, NULL);
	gpio_request(GPIO_FN_LCDD15, NULL);
	gpio_request(GPIO_FN_LCDD14, NULL);
	gpio_request(GPIO_FN_LCDD13, NULL);
	gpio_request(GPIO_FN_LCDD12, NULL);
	gpio_request(GPIO_FN_LCDD11, NULL);
	gpio_request(GPIO_FN_LCDD10, NULL);
	gpio_request(GPIO_FN_LCDD8, NULL);
	gpio_request(GPIO_FN_LCDD7, NULL);
	gpio_request(GPIO_FN_LCDD6, NULL);
	gpio_request(GPIO_FN_LCDD5, NULL);
	gpio_request(GPIO_FN_LCDD4, NULL);
	gpio_request(GPIO_FN_LCDD3, NULL);
	gpio_request(GPIO_FN_LCDD2, NULL);
	gpio_request(GPIO_FN_LCDD1, NULL);
	gpio_request(GPIO_FN_LCDRS, NULL);
	gpio_request(GPIO_FN_LCDCS, NULL);
	gpio_request(GPIO_FN_LCDRD, NULL);
	gpio_request(GPIO_FN_LCDWR, NULL);
	gpio_request(GPIO_PTH2, NULL); /* LCD_DON */
	gpio_direction_output(GPIO_PTH2, 1);
#endif
#ifdef CONFIG_SH_MIGOR_RTA_WVGA /* LCDC - WVGA - Enable RGB Interface signals */
	gpio_request(GPIO_FN_LCDD15, NULL);
	gpio_request(GPIO_FN_LCDD14, NULL);
	gpio_request(GPIO_FN_LCDD13, NULL);
	gpio_request(GPIO_FN_LCDD12, NULL);
	gpio_request(GPIO_FN_LCDD11, NULL);
	gpio_request(GPIO_FN_LCDD10, NULL);
	gpio_request(GPIO_FN_LCDD9, NULL);
	gpio_request(GPIO_FN_LCDD8, NULL);
	gpio_request(GPIO_FN_LCDD7, NULL);
	gpio_request(GPIO_FN_LCDD6, NULL);
	gpio_request(GPIO_FN_LCDD5, NULL);
	gpio_request(GPIO_FN_LCDD4, NULL);
	gpio_request(GPIO_FN_LCDD3, NULL);
	gpio_request(GPIO_FN_LCDD2, NULL);
	gpio_request(GPIO_FN_LCDD1, NULL);
	gpio_request(GPIO_FN_LCDD0, NULL);
	gpio_request(GPIO_FN_LCDLCLK, NULL);
	gpio_request(GPIO_FN_LCDDCK, NULL);
	gpio_request(GPIO_FN_LCDVEPWC, NULL);
	gpio_request(GPIO_FN_LCDVCPWC, NULL);
	gpio_request(GPIO_FN_LCDVSYN, NULL);
	gpio_request(GPIO_FN_LCDHSYN, NULL);
	gpio_request(GPIO_FN_LCDDISP, NULL);
	gpio_request(GPIO_FN_LCDDON, NULL);
#endif

	/* CEU */
	gpio_request(GPIO_FN_VIO_CLK2, NULL);
	gpio_request(GPIO_FN_VIO_VD2, NULL);
	gpio_request(GPIO_FN_VIO_HD2, NULL);
	gpio_request(GPIO_FN_VIO_FLD, NULL);
	gpio_request(GPIO_FN_VIO_CKO, NULL);
	gpio_request(GPIO_FN_VIO_D15, NULL);
	gpio_request(GPIO_FN_VIO_D14, NULL);
	gpio_request(GPIO_FN_VIO_D13, NULL);
	gpio_request(GPIO_FN_VIO_D12, NULL);
	gpio_request(GPIO_FN_VIO_D11, NULL);
	gpio_request(GPIO_FN_VIO_D10, NULL);
	gpio_request(GPIO_FN_VIO_D9, NULL);
	gpio_request(GPIO_FN_VIO_D8, NULL);

	gpio_request(GPIO_PTT3, NULL); /* VIO_RST */
	gpio_direction_output(GPIO_PTT3, 0);
	gpio_request(GPIO_PTT2, NULL); /* TV_IN_EN */
	gpio_direction_output(GPIO_PTT2, 1);
	gpio_request(GPIO_PTT0, NULL); /* CAM_EN */
#ifdef CONFIG_SH_MIGOR_RTA_WVGA
	gpio_direction_output(GPIO_PTT0, 0);
#else
	gpio_direction_output(GPIO_PTT0, 1);
#endif
	ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */

	platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);

	i2c_register_board_info(0, migor_i2c_devices,
				ARRAY_SIZE(migor_i2c_devices));

	return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
}
__initcall(migor_devices_setup);
Commit	Line	Data
70f784ec MD	1	/*
	2	* Renesas System Solutions Asia Pte. Ltd - Migo-R
	3	*
	4	* Copyright (C) 2008 Magnus Damm
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*/
	10	#include <linux/init.h>
	11	#include <linux/platform_device.h>
	12	#include <linux/interrupt.h>
92cfeb61	13	#include <linux/input.h>
b8808786	14	#include <linux/mtd/physmap.h>
3c803a9a	15	#include <linux/mtd/nand.h>
0c6111ec	16	#include <linux/i2c.h>
8a3ee0fc	17	#include <linux/smc91x.h>
1765534c MD	18	#include <linux/delay.h>
1765534c MD	19	#include <linux/clk.h>
91b6f3c5	20	#include <linux/gpio.h>
1765534c	21	#include <media/sh_mobile_ceu.h>
ff04ea40	22	#include <media/ov772x.h>
deae7b86	23	#include <media/tw9910.h>
225c9a8d	24	#include <video/sh_mobile_lcdc.h>
6c7d826c	25	#include <asm/clock.h>
70f784ec MD	26	#include <asm/machvec.h>
70f784ec MD	27	#include <asm/io.h>
92cfeb61	28	#include <asm/sh_keysc.h>
7639a454	29	#include <mach/migor.h>
f7275650	30	#include <cpu/sh7722.h>
70f784ec MD	31
	32	/* Address IRQ Size Bus Description
	33	* 0x00000000 64MB 16 NOR Flash (SP29PL256N)
	34	* 0x0c000000 64MB 64 SDRAM (2xK4M563233G)
	35	* 0x10000000 IRQ0 16 Ethernet (SMC91C111)
	36	* 0x14000000 IRQ4 16 USB 2.0 Host Controller (M66596)
	37	* 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
	38	*/
	39
8a3ee0fc	40	static struct smc91x_platdata smc91x_info = {
a30c89ad	41	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
8a3ee0fc MD	42	};
8a3ee0fc MD	43
70f784ec MD	44	static struct resource smc91x_eth_resources[] = {
70f784ec MD	45	[0] = {
b026a23c MD	46	.name = "SMC91C111" ,
	47	.start = 0x10000300,
	48	.end = 0x1000030f,
70f784ec MD	49	.flags = IORESOURCE_MEM,
	50	},
	51	[1] = {
	52	.start = 32, /* IRQ0 */
d280eadc	53	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
70f784ec MD	54	},
	55	};
	56
	57	static struct platform_device smc91x_eth_device = {
	58	.name = "smc91x",
	59	.num_resources = ARRAY_SIZE(smc91x_eth_resources),
	60	.resource = smc91x_eth_resources,
8a3ee0fc MD	61	.dev = {
	62	.platform_data = &smc91x_info,
	63	},
70f784ec MD	64	};
70f784ec MD	65
92cfeb61 MD	66	static struct sh_keysc_info sh_keysc_info = {
	67	.mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
	68	.scan_timing = 3,
	69	.delay = 5,
	70	.keycodes = {
	71	0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
	72	0, KEY_F, KEY_C, KEY_D, KEY_H, KEY_1,
	73	0, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6,
	74	0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
	75	0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
	76	},
	77	};
	78
	79	static struct resource sh_keysc_resources[] = {
	80	[0] = {
	81	.start = 0x044b0000,
	82	.end = 0x044b000f,
	83	.flags = IORESOURCE_MEM,
	84	},
	85	[1] = {
	86	.start = 79,
	87	.flags = IORESOURCE_IRQ,
	88	},
	89	};
	90
	91	static struct platform_device sh_keysc_device = {
	92	.name = "sh_keysc",
090d951b	93	.id = 0, /* "keysc0" clock */
92cfeb61 MD	94	.num_resources = ARRAY_SIZE(sh_keysc_resources),
	95	.resource = sh_keysc_resources,
	96	.dev = {
	97	.platform_data = &sh_keysc_info,
	98	},
	99	};
	100
b8808786 MD	101	static struct mtd_partition migor_nor_flash_partitions[] =
	102	{
	103	{
	104	.name = "uboot",
	105	.offset = 0,
	106	.size = (1 * 1024 * 1024),
	107	.mask_flags = MTD_WRITEABLE, /* Read-only */
	108	},
	109	{
	110	.name = "rootfs",
	111	.offset = MTDPART_OFS_APPEND,
	112	.size = (15 * 1024 * 1024),
	113	},
	114	{
	115	.name = "other",
	116	.offset = MTDPART_OFS_APPEND,
	117	.size = MTDPART_SIZ_FULL,
	118	},
	119	};
	120
	121	static struct physmap_flash_data migor_nor_flash_data = {
	122	.width = 2,
	123	.parts = migor_nor_flash_partitions,
	124	.nr_parts = ARRAY_SIZE(migor_nor_flash_partitions),
	125	};
	126
	127	static struct resource migor_nor_flash_resources[] = {
	128	[0] = {
	129	.name = "NOR Flash",
	130	.start = 0x00000000,
	131	.end = 0x03ffffff,
	132	.flags = IORESOURCE_MEM,
	133	}
	134	};
	135
	136	static struct platform_device migor_nor_flash_device = {
	137	.name = "physmap-flash",
	138	.resource = migor_nor_flash_resources,
	139	.num_resources = ARRAY_SIZE(migor_nor_flash_resources),
	140	.dev = {
	141	.platform_data = &migor_nor_flash_data,
	142	},
	143	};
	144
3c803a9a MD	145	static struct mtd_partition migor_nand_flash_partitions[] = {
	146	{
	147	.name = "nanddata1",
	148	.offset = 0x0,
	149	.size = 512 * 1024 * 1024,
	150	},
	151	{
	152	.name = "nanddata2",
	153	.offset = MTDPART_OFS_APPEND,
	154	.size = 512 * 1024 * 1024,
	155	},
	156	};
	157
	158	static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
	159	unsigned int ctrl)
	160	{
	161	struct nand_chip *chip = mtd->priv;
	162
	163	if (cmd == NAND_CMD_NONE)
	164	return;
	165
	166	if (ctrl & NAND_CLE)
	167	writeb(cmd, chip->IO_ADDR_W + 0x00400000);
	168	else if (ctrl & NAND_ALE)
	169	writeb(cmd, chip->IO_ADDR_W + 0x00800000);
	170	else
	171	writeb(cmd, chip->IO_ADDR_W);
	172	}
	173
	174	static int migor_nand_flash_ready(struct mtd_info *mtd)
	175	{
91b6f3c5	176	return gpio_get_value(GPIO_PTA1); /* NAND_RBn */
3c803a9a MD	177	}
	178
	179	struct platform_nand_data migor_nand_flash_data = {
	180	.chip = {
	181	.nr_chips = 1,
	182	.partitions = migor_nand_flash_partitions,
	183	.nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
	184	.chip_delay = 20,
	185	.part_probe_types = (const char *[]) { "cmdlinepart", NULL },
	186	},
	187	.ctrl = {
	188	.dev_ready = migor_nand_flash_ready,
	189	.cmd_ctrl = migor_nand_flash_cmd_ctl,
	190	},
	191	};
	192
	193	static struct resource migor_nand_flash_resources[] = {
	194	[0] = {
	195	.name = "NAND Flash",
	196	.start = 0x18000000,
	197	.end = 0x18ffffff,
	198	.flags = IORESOURCE_MEM,
	199	},
	200	};
	201
	202	static struct platform_device migor_nand_flash_device = {
	203	.name = "gen_nand",
	204	.resource = migor_nand_flash_resources,
	205	.num_resources = ARRAY_SIZE(migor_nand_flash_resources),
	206	.dev = {
	207	.platform_data = &migor_nand_flash_data,
	208	}
	209	};
	210
8b1285f1 MD	211	static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
	212	#ifdef CONFIG_SH_MIGOR_RTA_WVGA
	213	.clock_source = LCDC_CLK_BUS,
	214	.ch[0] = {
	215	.chan = LCDC_CHAN_MAINLCD,
	216	.bpp = 16,
	217	.interface_type = RGB16,
	218	.clock_divider = 2,
	219	.lcd_cfg = {
	220	.name = "LB070WV1",
	221	.xres = 800,
	222	.yres = 480,
	223	.left_margin = 64,
	224	.right_margin = 16,
	225	.hsync_len = 120,
	226	.upper_margin = 1,
	227	.lower_margin = 17,
	228	.vsync_len = 2,
	229	.sync = 0,
	230	},
ce9c008c MD	231	.lcd_size_cfg = { /* 7.0 inch */
	232	.width = 152,
	233	.height = 91,
	234	},
8b1285f1 MD	235	}
	236	#endif
	237	#ifdef CONFIG_SH_MIGOR_QVGA
	238	.clock_source = LCDC_CLK_PERIPHERAL,
	239	.ch[0] = {
	240	.chan = LCDC_CHAN_MAINLCD,
	241	.bpp = 16,
	242	.interface_type = SYS16A,
	243	.clock_divider = 10,
	244	.lcd_cfg = {
	245	.name = "PH240320T",
	246	.xres = 320,
	247	.yres = 240,
	248	.left_margin = 0,
	249	.right_margin = 16,
	250	.hsync_len = 8,
	251	.upper_margin = 1,
	252	.lower_margin = 17,
	253	.vsync_len = 2,
	254	.sync = FB_SYNC_HOR_HIGH_ACT,
	255	},
ce9c008c MD	256	.lcd_size_cfg = { /* 2.4 inch */
	257	.width = 49,
	258	.height = 37,
	259	},
8b1285f1 MD	260	.board_cfg = {
	261	.setup_sys = migor_lcd_qvga_setup,
	262	},
	263	.sys_bus_cfg = {
	264	.ldmt2r = 0x06000a09,
	265	.ldmt3r = 0x180e3418,
b5868e8c MD	266	/* set 1s delay to encourage fsync() */
b5868e8c MD	267	.deferred_io_msec = 1000,
8b1285f1 MD	268	},
	269	}
	270	#endif
	271	};
	272
	273	static struct resource migor_lcdc_resources[] = {
	274	[0] = {
	275	.name = "LCDC",
	276	.start = 0xfe940000, /* P4-only space */
	277	.end = 0xfe941fff,
	278	.flags = IORESOURCE_MEM,
	279	},
07905554 MD	280	[1] = {
	281	.start = 28,
	282	.flags = IORESOURCE_IRQ,
	283	},
8b1285f1 MD	284	};
	285
	286	static struct platform_device migor_lcdc_device = {
	287	.name = "sh_mobile_lcdc_fb",
	288	.num_resources = ARRAY_SIZE(migor_lcdc_resources),
	289	.resource = migor_lcdc_resources,
	290	.dev = {
	291	.platform_data = &sh_mobile_lcdc_info,
	292	},
	293	};
	294
1765534c	295	static struct clk *camera_clk;
deae7b86	296	static DEFINE_MUTEX(camera_lock);
1765534c	297
deae7b86	298	static void camera_power_on(int is_tw)
1765534c	299	{
deae7b86 KM	300	mutex_lock(&camera_lock);
deae7b86 KM	301
22ee3ba6 MD	302	/* Use 10 MHz VIO_CKO instead of 24 MHz to work
	303	* around signal quality issues on Panel Board V2.1.
	304	*/
1765534c	305	camera_clk = clk_get(NULL, "video_clk");
22ee3ba6	306	clk_set_rate(camera_clk, 10000000);
1765534c MD	307	clk_enable(camera_clk); /* start VIO_CKO */
1765534c MD	308
91b6f3c5	309	/* use VIO_RST to take camera out of reset */
1765534c	310	mdelay(10);
deae7b86 KM	311	if (is_tw) {
	312	gpio_set_value(GPIO_PTT2, 0);
	313	gpio_set_value(GPIO_PTT0, 0);
	314	} else {
	315	gpio_set_value(GPIO_PTT0, 1);
	316	}
91b6f3c5	317	gpio_set_value(GPIO_PTT3, 0);
1765534c	318	mdelay(10);
91b6f3c5	319	gpio_set_value(GPIO_PTT3, 1);
4545bfa0	320	mdelay(10); /* wait to let chip come out of reset */
1765534c MD	321	}
	322
	323	static void camera_power_off(void)
	324	{
	325	clk_disable(camera_clk); /* stop VIO_CKO */
	326	clk_put(camera_clk);
	327
91b6f3c5	328	gpio_set_value(GPIO_PTT3, 0);
deae7b86	329	mutex_unlock(&camera_lock);
1765534c MD	330	}
1765534c MD	331
ff04ea40 KM	332	static int ov7725_power(struct device *dev, int mode)
	333	{
	334	if (mode)
deae7b86 KM	335	camera_power_on(0);
	336	else
	337	camera_power_off();
	338
	339	return 0;
	340	}
	341
	342	static int tw9910_power(struct device *dev, int mode)
	343	{
	344	if (mode)
	345	camera_power_on(1);
ff04ea40 KM	346	else
	347	camera_power_off();
	348
	349	return 0;
	350	}
	351
1765534c MD	352	static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
	353	.flags = SOCAM_MASTER \| SOCAM_DATAWIDTH_8 \| SOCAM_PCLK_SAMPLE_RISING \
	354	\| SOCAM_HSYNC_ACTIVE_HIGH \| SOCAM_VSYNC_ACTIVE_HIGH,
1765534c MD	355	};
	356
	357	static struct resource migor_ceu_resources[] = {
	358	[0] = {
	359	.name = "CEU",
	360	.start = 0xfe910000,
	361	.end = 0xfe91009f,
	362	.flags = IORESOURCE_MEM,
	363	},
	364	[1] = {
	365	.start = 52,
	366	.flags = IORESOURCE_IRQ,
	367	},
	368	[2] = {
	369	/* place holder for contiguous memory */
	370	},
	371	};
	372
	373	static struct platform_device migor_ceu_device = {
	374	.name = "sh_mobile_ceu",
a42b6dd6	375	.id = 0, /* "ceu0" clock */
1765534c MD	376	.num_resources = ARRAY_SIZE(migor_ceu_resources),
	377	.resource = migor_ceu_resources,
	378	.dev = {
	379	.platform_data = &sh_mobile_ceu_info,
	380	},
	381	};
	382
ff04ea40 KM	383	static struct ov772x_camera_info ov7725_info = {
	384	.buswidth = SOCAM_DATAWIDTH_8,
	385	.link = {
	386	.power = ov7725_power,
	387	},
	388	};
	389
deae7b86 KM	390	static struct tw9910_video_info tw9910_info = {
	391	.buswidth = SOCAM_DATAWIDTH_8,
	392	.mpout = TW9910_MPO_FIELD,
	393	.link = {
	394	.power = tw9910_power,
	395	}
	396	};
	397
70f784ec MD	398	static struct platform_device *migor_devices[] __initdata = {
70f784ec MD	399	&smc91x_eth_device,
92cfeb61	400	&sh_keysc_device,
8b1285f1	401	&migor_lcdc_device,
1765534c	402	&migor_ceu_device,
b8808786	403	&migor_nor_flash_device,
3c803a9a	404	&migor_nand_flash_device,
70f784ec MD	405	};
70f784ec MD	406
1765534c	407	static struct i2c_board_info migor_i2c_devices[] = {
57795867	408	{
3760f736	409	I2C_BOARD_INFO("rs5c372b", 0x32),
57795867	410	},
67908abf MD	411	{
	412	I2C_BOARD_INFO("migor_ts", 0x51),
	413	.irq = 38, /* IRQ6 */
	414	},
ff04ea40 KM	415	{
	416	I2C_BOARD_INFO("ov772x", 0x21),
	417	.platform_data = &ov7725_info,
	418	},
deae7b86 KM	419	{
	420	I2C_BOARD_INFO("tw9910", 0x45),
	421	.platform_data = &tw9910_info,
	422	},
0c6111ec MD	423	};
0c6111ec MD	424
70f784ec MD	425	static int __init migor_devices_setup(void)
70f784ec MD	426	{
91b6f3c5 MD	427	/* Lit D11 LED */
	428	gpio_request(GPIO_PTJ7, NULL);
	429	gpio_direction_output(GPIO_PTJ7, 1);
	430	gpio_export(GPIO_PTJ7, 0);
	431
	432	/* Lit D12 LED */
	433	gpio_request(GPIO_PTJ5, NULL);
	434	gpio_direction_output(GPIO_PTJ5, 1);
	435	gpio_export(GPIO_PTJ5, 0);
	436
a30c89ad	437	/* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
91b6f3c5	438	gpio_request(GPIO_FN_IRQ0, NULL);
a30c89ad MD	439	ctrl_outl(0x00003400, BSC_CS4BCR);
a30c89ad MD	440	ctrl_outl(0x00110080, BSC_CS4WCR);
91b6f3c5 MD	441
91b6f3c5 MD	442	/* KEYSC */
91b6f3c5 MD	443	gpio_request(GPIO_FN_KEYOUT0, NULL);
	444	gpio_request(GPIO_FN_KEYOUT1, NULL);
	445	gpio_request(GPIO_FN_KEYOUT2, NULL);
	446	gpio_request(GPIO_FN_KEYOUT3, NULL);
	447	gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
	448	gpio_request(GPIO_FN_KEYIN1, NULL);
	449	gpio_request(GPIO_FN_KEYIN2, NULL);
	450	gpio_request(GPIO_FN_KEYIN3, NULL);
	451	gpio_request(GPIO_FN_KEYIN4, NULL);
	452	gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
	453
	454	/* NAND Flash */
	455	gpio_request(GPIO_FN_CS6A_CE2B, NULL);
	456	ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) \| 0x0200, BSC_CS6ABCR);
	457	gpio_request(GPIO_PTA1, NULL);
	458	gpio_direction_input(GPIO_PTA1);
	459
	460	/* Touch Panel */
	461	gpio_request(GPIO_FN_IRQ6, NULL);
	462
	463	/* LCD Panel */
91b6f3c5 MD	464	#ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */
	465	gpio_request(GPIO_FN_LCDD17, NULL);
	466	gpio_request(GPIO_FN_LCDD16, NULL);
	467	gpio_request(GPIO_FN_LCDD15, NULL);
	468	gpio_request(GPIO_FN_LCDD14, NULL);
	469	gpio_request(GPIO_FN_LCDD13, NULL);
	470	gpio_request(GPIO_FN_LCDD12, NULL);
	471	gpio_request(GPIO_FN_LCDD11, NULL);
	472	gpio_request(GPIO_FN_LCDD10, NULL);
	473	gpio_request(GPIO_FN_LCDD8, NULL);
	474	gpio_request(GPIO_FN_LCDD7, NULL);
	475	gpio_request(GPIO_FN_LCDD6, NULL);
	476	gpio_request(GPIO_FN_LCDD5, NULL);
	477	gpio_request(GPIO_FN_LCDD4, NULL);
	478	gpio_request(GPIO_FN_LCDD3, NULL);
	479	gpio_request(GPIO_FN_LCDD2, NULL);
	480	gpio_request(GPIO_FN_LCDD1, NULL);
	481	gpio_request(GPIO_FN_LCDRS, NULL);
	482	gpio_request(GPIO_FN_LCDCS, NULL);
	483	gpio_request(GPIO_FN_LCDRD, NULL);
	484	gpio_request(GPIO_FN_LCDWR, NULL);
	485	gpio_request(GPIO_PTH2, NULL); /* LCD_DON */
	486	gpio_direction_output(GPIO_PTH2, 1);
	487	#endif
	488	#ifdef CONFIG_SH_MIGOR_RTA_WVGA /* LCDC - WVGA - Enable RGB Interface signals */
	489	gpio_request(GPIO_FN_LCDD15, NULL);
	490	gpio_request(GPIO_FN_LCDD14, NULL);
	491	gpio_request(GPIO_FN_LCDD13, NULL);
	492	gpio_request(GPIO_FN_LCDD12, NULL);
	493	gpio_request(GPIO_FN_LCDD11, NULL);
	494	gpio_request(GPIO_FN_LCDD10, NULL);
	495	gpio_request(GPIO_FN_LCDD9, NULL);
	496	gpio_request(GPIO_FN_LCDD8, NULL);
	497	gpio_request(GPIO_FN_LCDD7, NULL);
	498	gpio_request(GPIO_FN_LCDD6, NULL);
	499	gpio_request(GPIO_FN_LCDD5, NULL);
	500	gpio_request(GPIO_FN_LCDD4, NULL);
	501	gpio_request(GPIO_FN_LCDD3, NULL);
	502	gpio_request(GPIO_FN_LCDD2, NULL);
	503	gpio_request(GPIO_FN_LCDD1, NULL);
	504	gpio_request(GPIO_FN_LCDD0, NULL);
	505	gpio_request(GPIO_FN_LCDLCLK, NULL);
	506	gpio_request(GPIO_FN_LCDDCK, NULL);
	507	gpio_request(GPIO_FN_LCDVEPWC, NULL);
	508	gpio_request(GPIO_FN_LCDVCPWC, NULL);
	509	gpio_request(GPIO_FN_LCDVSYN, NULL);
	510	gpio_request(GPIO_FN_LCDHSYN, NULL);
	511	gpio_request(GPIO_FN_LCDDISP, NULL);
	512	gpio_request(GPIO_FN_LCDDON, NULL);
	513	#endif
	514
	515	/* CEU */
91b6f3c5 MD	516	gpio_request(GPIO_FN_VIO_CLK2, NULL);
	517	gpio_request(GPIO_FN_VIO_VD2, NULL);
	518	gpio_request(GPIO_FN_VIO_HD2, NULL);
	519	gpio_request(GPIO_FN_VIO_FLD, NULL);
	520	gpio_request(GPIO_FN_VIO_CKO, NULL);
	521	gpio_request(GPIO_FN_VIO_D15, NULL);
	522	gpio_request(GPIO_FN_VIO_D14, NULL);
	523	gpio_request(GPIO_FN_VIO_D13, NULL);
	524	gpio_request(GPIO_FN_VIO_D12, NULL);
	525	gpio_request(GPIO_FN_VIO_D11, NULL);
	526	gpio_request(GPIO_FN_VIO_D10, NULL);
	527	gpio_request(GPIO_FN_VIO_D9, NULL);
	528	gpio_request(GPIO_FN_VIO_D8, NULL);
	529
	530	gpio_request(GPIO_PTT3, NULL); /* VIO_RST */
	531	gpio_direction_output(GPIO_PTT3, 0);
	532	gpio_request(GPIO_PTT2, NULL); /* TV_IN_EN */
	533	gpio_direction_output(GPIO_PTT2, 1);
	534	gpio_request(GPIO_PTT0, NULL); /* CAM_EN */
	535	#ifdef CONFIG_SH_MIGOR_RTA_WVGA
	536	gpio_direction_output(GPIO_PTT0, 0);
	537	#else
	538	gpio_direction_output(GPIO_PTT0, 1);
	539	#endif
	540	ctrl_outw(ctrl_inw(PORT_MSELCRB) \| 0x2000, PORT_MSELCRB); /* D15->D8 */
1765534c MD	541
1765534c MD	542	platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
6c7d826c	543
0c6111ec MD	544	i2c_register_board_info(0, migor_i2c_devices,
0c6111ec MD	545	ARRAY_SIZE(migor_i2c_devices));
91b6f3c5	546
70f784ec MD	547	return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
	548	}
	549	__initcall(migor_devices_setup);