]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * arch/sh/drivers/dma/dma-sh.h | |
3 | * | |
4 | * Copyright (C) 2000 Takashi YOSHII | |
5 | * Copyright (C) 2003 Paul Mundt | |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file "COPYING" in the main directory of this archive | |
9 | * for more details. | |
10 | */ | |
11 | #ifndef __DMA_SH_H | |
12 | #define __DMA_SH_H | |
13 | ||
14 | /* Definitions for the SuperH DMAC */ | |
15 | #define REQ_L 0x00000000 | |
16 | #define REQ_E 0x00080000 | |
17 | #define RACK_H 0x00000000 | |
18 | #define RACK_L 0x00040000 | |
19 | #define ACK_R 0x00000000 | |
20 | #define ACK_W 0x00020000 | |
21 | #define ACK_H 0x00000000 | |
22 | #define ACK_L 0x00010000 | |
23 | #define DM_INC 0x00004000 | |
24 | #define DM_DEC 0x00008000 | |
25 | #define SM_INC 0x00001000 | |
26 | #define SM_DEC 0x00002000 | |
27 | #define RS_IN 0x00000200 | |
28 | #define RS_OUT 0x00000300 | |
29 | #define TM_BURST 0x0000080 | |
30 | #define TS_8 0x00000010 | |
31 | #define TS_16 0x00000020 | |
32 | #define TS_32 0x00000030 | |
33 | #define TS_64 0x00000000 | |
34 | #define TS_BLK 0x00000040 | |
35 | #define CHCR_DE 0x00000001 | |
36 | #define CHCR_TE 0x00000002 | |
37 | #define CHCR_IE 0x00000004 | |
38 | ||
39 | /* Define the default configuration for dual address memory-memory transfer. | |
40 | * The 0x400 value represents auto-request, external->external. | |
41 | */ | |
42 | #define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32) | |
43 | ||
44 | #define DMAOR_COD 0x00000008 | |
45 | #define DMAOR_AE 0x00000004 | |
46 | #define DMAOR_NMIF 0x00000002 | |
47 | #define DMAOR_DME 0x00000001 | |
48 | ||
49 | #define MAX_DMAC_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS) | |
50 | ||
51 | #endif /* __DMA_SH_H */ | |
52 |