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1da177e4 LT |
1 | #ifndef __ASM_SH_PAGE_H |
2 | #define __ASM_SH_PAGE_H | |
3 | ||
4 | /* | |
5 | * Copyright (C) 1999 Niibe Yutaka | |
6 | */ | |
7 | ||
d02b08f6 SM |
8 | #include <linux/const.h> |
9 | ||
1da177e4 | 10 | /* PAGE_SHIFT determines the page size */ |
21440cf0 PM |
11 | #if defined(CONFIG_PAGE_SIZE_4KB) |
12 | # define PAGE_SHIFT 12 | |
13 | #elif defined(CONFIG_PAGE_SIZE_8KB) | |
14 | # define PAGE_SHIFT 13 | |
66dfe181 PM |
15 | #elif defined(CONFIG_PAGE_SIZE_16KB) |
16 | # define PAGE_SHIFT 14 | |
21440cf0 PM |
17 | #elif defined(CONFIG_PAGE_SIZE_64KB) |
18 | # define PAGE_SHIFT 16 | |
19 | #else | |
20 | # error "Bogus kernel page size?" | |
21 | #endif | |
8c12b5dc | 22 | |
d02b08f6 | 23 | #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) |
1da177e4 LT |
24 | #define PAGE_MASK (~(PAGE_SIZE-1)) |
25 | #define PTE_MASK PAGE_MASK | |
26 | ||
27 | #if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) | |
28 | #define HPAGE_SHIFT 16 | |
21440cf0 PM |
29 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K) |
30 | #define HPAGE_SHIFT 18 | |
1da177e4 LT |
31 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) |
32 | #define HPAGE_SHIFT 20 | |
21440cf0 PM |
33 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) |
34 | #define HPAGE_SHIFT 22 | |
35 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) | |
36 | #define HPAGE_SHIFT 26 | |
caff44e7 PM |
37 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_512MB) |
38 | #define HPAGE_SHIFT 29 | |
1da177e4 LT |
39 | #endif |
40 | ||
41 | #ifdef CONFIG_HUGETLB_PAGE | |
42 | #define HPAGE_SIZE (1UL << HPAGE_SHIFT) | |
43 | #define HPAGE_MASK (~(HPAGE_SIZE-1)) | |
44 | #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT) | |
45 | #endif | |
46 | ||
1da177e4 | 47 | #ifndef __ASSEMBLY__ |
d01447b3 | 48 | #include <asm/uncached.h> |
1da177e4 | 49 | |
f3c25758 | 50 | extern unsigned long shm_align_mask; |
01066625 | 51 | extern unsigned long max_low_pfn, min_low_pfn; |
5e2ff328 | 52 | extern unsigned long memory_start, memory_end, memory_limit; |
f3c25758 | 53 | |
2277ab4a PM |
54 | static inline unsigned long |
55 | pages_do_alias(unsigned long addr1, unsigned long addr2) | |
56 | { | |
57 | return (addr1 ^ addr2) & shm_align_mask; | |
58 | } | |
59 | ||
dfff0fa6 | 60 | #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) |
379a95d1 | 61 | extern void copy_page(void *to, void *from); |
1da177e4 | 62 | |
dfff0fa6 PM |
63 | struct page; |
64 | struct vm_area_struct; | |
65 | ||
7747b9a4 PM |
66 | extern void copy_user_highpage(struct page *to, struct page *from, |
67 | unsigned long vaddr, struct vm_area_struct *vma); | |
68 | #define __HAVE_ARCH_COPY_USER_HIGHPAGE | |
dfff0fa6 PM |
69 | extern void clear_user_highpage(struct page *page, unsigned long vaddr); |
70 | #define clear_user_highpage clear_user_highpage | |
0dfae7d5 | 71 | |
1da177e4 LT |
72 | /* |
73 | * These are used to make use of C type-checking.. | |
74 | */ | |
21440cf0 PM |
75 | #ifdef CONFIG_X2TLB |
76 | typedef struct { unsigned long pte_low, pte_high; } pte_t; | |
77 | typedef struct { unsigned long long pgprot; } pgprot_t; | |
d04a0f79 | 78 | typedef struct { unsigned long long pgd; } pgd_t; |
21440cf0 PM |
79 | #define pte_val(x) \ |
80 | ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) | |
81 | #define __pte(x) \ | |
82 | ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) | |
249cfea9 | 83 | #elif defined(CONFIG_SUPERH32) |
21440cf0 | 84 | typedef struct { unsigned long pte_low; } pte_t; |
1da177e4 | 85 | typedef struct { unsigned long pgprot; } pgprot_t; |
d04a0f79 | 86 | typedef struct { unsigned long pgd; } pgd_t; |
21440cf0 | 87 | #define pte_val(x) ((x).pte_low) |
249cfea9 PM |
88 | #define __pte(x) ((pte_t) { (x) } ) |
89 | #else | |
90 | typedef struct { unsigned long long pte_low; } pte_t; | |
24ef7fc4 | 91 | typedef struct { unsigned long long pgprot; } pgprot_t; |
249cfea9 PM |
92 | typedef struct { unsigned long pgd; } pgd_t; |
93 | #define pte_val(x) ((x).pte_low) | |
94 | #define __pte(x) ((pte_t) { (x) } ) | |
21440cf0 PM |
95 | #endif |
96 | ||
1da177e4 LT |
97 | #define pgd_val(x) ((x).pgd) |
98 | #define pgprot_val(x) ((x).pgprot) | |
99 | ||
1da177e4 LT |
100 | #define __pgd(x) ((pgd_t) { (x) } ) |
101 | #define __pgprot(x) ((pgprot_t) { (x) } ) | |
102 | ||
2f569afd MS |
103 | typedef struct page *pgtable_t; |
104 | ||
cb700aa4 PM |
105 | #define pte_pgprot(x) __pgprot(pte_val(x) & PTE_FLAGS_MASK) |
106 | ||
1da177e4 LT |
107 | #endif /* !__ASSEMBLY__ */ |
108 | ||
d02b08f6 SM |
109 | /* |
110 | * __MEMORY_START and SIZE are the physical addresses and size of RAM. | |
111 | */ | |
1da177e4 LT |
112 | #define __MEMORY_START CONFIG_MEMORY_START |
113 | #define __MEMORY_SIZE CONFIG_MEMORY_SIZE | |
1da177e4 | 114 | |
d02b08f6 SM |
115 | /* |
116 | * PAGE_OFFSET is the virtual address of the start of kernel address | |
117 | * space. | |
118 | */ | |
e7f93a35 | 119 | #define PAGE_OFFSET CONFIG_PAGE_OFFSET |
1da177e4 | 120 | |
d02b08f6 SM |
121 | /* |
122 | * Virtual to physical RAM address translation. | |
123 | * | |
124 | * In 29 bit mode, the physical offset of RAM from address 0 is visible in | |
125 | * the kernel virtual address space, and thus we don't have to take | |
126 | * this into account when translating. However in 32 bit mode this offset | |
127 | * is not visible (it is part of the PMB mapping) and so needs to be | |
128 | * added or subtracted as required. | |
129 | */ | |
1d5cfcdf | 130 | #ifdef CONFIG_PMB |
7c4584d3 MF |
131 | #define ___pa(x) ((x)-PAGE_OFFSET+__MEMORY_START) |
132 | #define ___va(x) ((x)+PAGE_OFFSET-__MEMORY_START) | |
d02b08f6 | 133 | #else |
7c4584d3 MF |
134 | #define ___pa(x) ((x)-PAGE_OFFSET) |
135 | #define ___va(x) ((x)+PAGE_OFFSET) | |
d02b08f6 SM |
136 | #endif |
137 | ||
7c4584d3 MF |
138 | #ifndef __ASSEMBLY__ |
139 | #define __pa(x) ___pa((unsigned long)x) | |
140 | #define __va(x) (void *)___va((unsigned long)x) | |
141 | #endif /* !__ASSEMBLY__ */ | |
142 | ||
9edef286 PM |
143 | #ifdef CONFIG_UNCACHED_MAPPING |
144 | #define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + uncached_start) | |
145 | #define CAC_ADDR(addr) ((addr) - uncached_start + PAGE_OFFSET) | |
146 | #else | |
147 | #define UNCAC_ADDR(addr) ((addr)) | |
148 | #define CAC_ADDR(addr) ((addr)) | |
149 | #endif | |
150 | ||
d02b08f6 | 151 | #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) |
01066625 | 152 | #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) |
1da177e4 | 153 | |
d02b08f6 SM |
154 | /* |
155 | * PFN = physical frame number (ie PFN 0 == physical address 0) | |
156 | * PFN_START is the PFN of the first page of RAM. By defining this we | |
157 | * don't have struct page entries for the portion of address space | |
158 | * between physical address 0 and the start of RAM. | |
159 | */ | |
1da177e4 | 160 | #define PFN_START (__MEMORY_START >> PAGE_SHIFT) |
67bb2c69 | 161 | #define ARCH_PFN_OFFSET (PFN_START) |
1da177e4 | 162 | #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) |
5900711a | 163 | #ifdef CONFIG_FLATMEM |
01066625 | 164 | #define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_low_pfn) |
5900711a | 165 | #endif |
1da177e4 LT |
166 | #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) |
167 | ||
168 | #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ | |
169 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) | |
170 | ||
104b8dea | 171 | #include <asm-generic/memory_model.h> |
5b17e1cd | 172 | #include <asm-generic/getorder.h> |
fd4fd5aa | 173 | |
19f9a34f PM |
174 | /* vDSO support */ |
175 | #ifdef CONFIG_VSYSCALL | |
176 | #define __HAVE_ARCH_GATE_AREA | |
177 | #endif | |
178 | ||
cbd2d9d8 | 179 | /* |
66d485b4 PM |
180 | * Some drivers need to perform DMA into kmalloc'ed buffers |
181 | * and so we have to increase the kmalloc minalign for this. | |
cbd2d9d8 | 182 | */ |
a6eb9fe1 | 183 | #define ARCH_DMA_MINALIGN L1_CACHE_BYTES |
01fed931 | 184 | |
66d485b4 | 185 | #ifdef CONFIG_SUPERH64 |
01fed931 | 186 | /* |
66d485b4 PM |
187 | * While BYTES_PER_WORD == 4 on the current sh64 ABI, GCC will still |
188 | * happily generate {ld/st}.q pairs, requiring us to have 8-byte | |
25985edc | 189 | * alignment to avoid traps. The kmalloc alignment is guaranteed by |
66d485b4 PM |
190 | * virtue of L1_CACHE_BYTES, requiring this to only be special cased |
191 | * for slab caches. | |
01fed931 PM |
192 | */ |
193 | #define ARCH_SLAB_MINALIGN 8 | |
194 | #endif | |
cbd2d9d8 | 195 | |
1da177e4 | 196 | #endif /* __ASM_SH_PAGE_H */ |