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a23ba435 PM |
1 | #ifndef __ASM_SH_PGTABLE_64_H |
2 | #define __ASM_SH_PGTABLE_64_H | |
1da177e4 | 3 | |
1da177e4 | 4 | /* |
a23ba435 | 5 | * include/asm-sh/pgtable_64.h |
1da177e4 | 6 | * |
a23ba435 PM |
7 | * This file contains the functions and defines necessary to modify and use |
8 | * the SuperH page table tree. | |
1da177e4 LT |
9 | * |
10 | * Copyright (C) 2000, 2001 Paolo Alberelli | |
11 | * Copyright (C) 2003, 2004 Paul Mundt | |
12 | * Copyright (C) 2003, 2004 Richard Curnow | |
13 | * | |
a23ba435 PM |
14 | * This file is subject to the terms and conditions of the GNU General Public |
15 | * License. See the file "COPYING" in the main directory of this archive | |
16 | * for more details. | |
1da177e4 | 17 | */ |
249cfea9 | 18 | #include <linux/threads.h> |
1da177e4 LT |
19 | #include <asm/processor.h> |
20 | #include <asm/page.h> | |
1da177e4 LT |
21 | |
22 | /* | |
23 | * Error outputs. | |
24 | */ | |
25 | #define pte_ERROR(e) \ | |
26 | printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e)) | |
1da177e4 LT |
27 | #define pgd_ERROR(e) \ |
28 | printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) | |
29 | ||
30 | /* | |
31 | * Table setting routines. Used within arch/mm only. | |
32 | */ | |
1da177e4 LT |
33 | #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) |
34 | ||
35 | static __inline__ void set_pte(pte_t *pteptr, pte_t pteval) | |
36 | { | |
249cfea9 | 37 | unsigned long long x = ((unsigned long long) pteval.pte_low); |
1da177e4 LT |
38 | unsigned long long *xp = (unsigned long long *) pteptr; |
39 | /* | |
40 | * Sign-extend based on NPHYS. | |
41 | */ | |
42 | *(xp) = (x & NPHYS_SIGN) ? (x | NPHYS_MASK) : x; | |
43 | } | |
44 | #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) | |
45 | ||
46 | static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep) | |
47 | { | |
48 | pmd_val(*pmdp) = (unsigned long) ptep; | |
49 | } | |
50 | ||
51 | /* | |
52 | * PGD defines. Top level. | |
53 | */ | |
54 | ||
55 | /* To find an entry in a generic PGD. */ | |
56 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) | |
57 | #define __pgd_offset(address) pgd_index(address) | |
58 | #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) | |
59 | ||
60 | /* To find an entry in a kernel PGD. */ | |
61 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | |
62 | ||
0906a3ad PM |
63 | #define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) |
64 | #define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) | |
65 | ||
1da177e4 LT |
66 | /* |
67 | * PMD level access routines. Same notes as above. | |
68 | */ | |
69 | #define _PMD_EMPTY 0x0 | |
70 | /* Either the PMD is empty or present, it's not paged out */ | |
71 | #define pmd_present(pmd_entry) (pmd_val(pmd_entry) & _PAGE_PRESENT) | |
72 | #define pmd_clear(pmd_entry_p) (set_pmd((pmd_entry_p), __pmd(_PMD_EMPTY))) | |
73 | #define pmd_none(pmd_entry) (pmd_val((pmd_entry)) == _PMD_EMPTY) | |
74 | #define pmd_bad(pmd_entry) ((pmd_val(pmd_entry) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) | |
75 | ||
46a82b2d | 76 | #define pmd_page_vaddr(pmd_entry) \ |
1da177e4 LT |
77 | ((unsigned long) __va(pmd_val(pmd_entry) & PAGE_MASK)) |
78 | ||
79 | #define pmd_page(pmd) \ | |
80 | (virt_to_page(pmd_val(pmd))) | |
81 | ||
82 | /* PMD to PTE dereferencing */ | |
83 | #define pte_index(address) \ | |
84 | ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | |
85 | ||
0906a3ad PM |
86 | #define __pte_offset(address) pte_index(address) |
87 | ||
1da177e4 LT |
88 | #define pte_offset_kernel(dir, addr) \ |
89 | ((pte_t *) ((pmd_val(*(dir))) & PAGE_MASK) + pte_index((addr))) | |
90 | ||
91 | #define pte_offset_map(dir,addr) pte_offset_kernel(dir, addr) | |
92 | #define pte_offset_map_nested(dir,addr) pte_offset_kernel(dir, addr) | |
93 | #define pte_unmap(pte) do { } while (0) | |
94 | #define pte_unmap_nested(pte) do { } while (0) | |
95 | ||
1da177e4 | 96 | #ifndef __ASSEMBLY__ |
1da177e4 LT |
97 | #define IOBASE_VADDR 0xff000000 |
98 | #define IOBASE_END 0xffffffff | |
99 | ||
100 | /* | |
101 | * PTEL coherent flags. | |
102 | * See Chapter 17 ST50 CPU Core Volume 1, Architecture. | |
103 | */ | |
104 | /* The bits that are required in the SH-5 TLB are placed in the h/w-defined | |
105 | positions, to avoid expensive bit shuffling on every refill. The remaining | |
106 | bits are used for s/w purposes and masked out on each refill. | |
107 | ||
108 | Note, the PTE slots are used to hold data of type swp_entry_t when a page is | |
109 | swapped out. Only the _PAGE_PRESENT flag is significant when the page is | |
110 | swapped out, and it must be placed so that it doesn't overlap either the | |
111 | type or offset fields of swp_entry_t. For x86, offset is at [31:8] and type | |
112 | at [6:1], with _PAGE_PRESENT at bit 0 for both pte_t and swp_entry_t. This | |
113 | scheme doesn't map to SH-5 because bit [0] controls cacheability. So bit | |
114 | [2] is used for _PAGE_PRESENT and the type field of swp_entry_t is split | |
115 | into 2 pieces. That is handled by SWP_ENTRY and SWP_TYPE below. */ | |
116 | #define _PAGE_WT 0x001 /* CB0: if cacheable, 1->write-thru, 0->write-back */ | |
117 | #define _PAGE_DEVICE 0x001 /* CB0: if uncacheable, 1->device (i.e. no write-combining or reordering at bus level) */ | |
118 | #define _PAGE_CACHABLE 0x002 /* CB1: uncachable/cachable */ | |
119 | #define _PAGE_PRESENT 0x004 /* software: page referenced */ | |
120 | #define _PAGE_FILE 0x004 /* software: only when !present */ | |
121 | #define _PAGE_SIZE0 0x008 /* SZ0-bit : size of page */ | |
122 | #define _PAGE_SIZE1 0x010 /* SZ1-bit : size of page */ | |
123 | #define _PAGE_SHARED 0x020 /* software: reflects PTEH's SH */ | |
124 | #define _PAGE_READ 0x040 /* PR0-bit : read access allowed */ | |
125 | #define _PAGE_EXECUTE 0x080 /* PR1-bit : execute access allowed */ | |
126 | #define _PAGE_WRITE 0x100 /* PR2-bit : write access allowed */ | |
127 | #define _PAGE_USER 0x200 /* PR3-bit : user space access allowed */ | |
128 | #define _PAGE_DIRTY 0x400 /* software: page accessed in write */ | |
129 | #define _PAGE_ACCESSED 0x800 /* software: page referenced */ | |
130 | ||
131 | /* Mask which drops software flags */ | |
132 | #define _PAGE_FLAGS_HARDWARE_MASK 0xfffffffffffff3dbLL | |
133 | ||
134 | /* | |
135 | * HugeTLB support | |
136 | */ | |
137 | #if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) | |
138 | #define _PAGE_SZHUGE (_PAGE_SIZE0) | |
139 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) | |
140 | #define _PAGE_SZHUGE (_PAGE_SIZE1) | |
141 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_512MB) | |
142 | #define _PAGE_SZHUGE (_PAGE_SIZE0 | _PAGE_SIZE1) | |
143 | #endif | |
144 | ||
52860316 PM |
145 | /* |
146 | * Stub out _PAGE_SZHUGE if we don't have a good definition for it, | |
147 | * to make pte_mkhuge() happy. | |
148 | */ | |
149 | #ifndef _PAGE_SZHUGE | |
150 | # define _PAGE_SZHUGE (0) | |
151 | #endif | |
152 | ||
1da177e4 LT |
153 | /* |
154 | * Default flags for a Kernel page. | |
155 | * This is fundametally also SHARED because the main use of this define | |
156 | * (other than for PGD/PMD entries) is for the VMALLOC pool which is | |
157 | * contextless. | |
158 | * | |
159 | * _PAGE_EXECUTE is required for modules | |
160 | * | |
161 | */ | |
162 | #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ | |
163 | _PAGE_EXECUTE | \ | |
164 | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_DIRTY | \ | |
165 | _PAGE_SHARED) | |
166 | ||
167 | /* Default flags for a User page */ | |
168 | #define _PAGE_TABLE (_KERNPG_TABLE | _PAGE_USER) | |
169 | ||
170 | #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) | |
171 | ||
249cfea9 PM |
172 | /* |
173 | * We have full permissions (Read/Write/Execute/Shared). | |
174 | */ | |
175 | #define _PAGE_COMMON (_PAGE_PRESENT | _PAGE_USER | \ | |
176 | _PAGE_CACHABLE | _PAGE_ACCESSED) | |
177 | ||
1da177e4 | 178 | #define PAGE_NONE __pgprot(_PAGE_CACHABLE | _PAGE_ACCESSED) |
249cfea9 | 179 | #define PAGE_SHARED __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_WRITE | \ |
1da177e4 | 180 | _PAGE_SHARED) |
249cfea9 | 181 | #define PAGE_EXECREAD __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_EXECUTE) |
1da177e4 LT |
182 | |
183 | /* | |
249cfea9 PM |
184 | * We need to include PAGE_EXECUTE in PAGE_COPY because it is the default |
185 | * protection mode for the stack. | |
1da177e4 | 186 | */ |
249cfea9 PM |
187 | #define PAGE_COPY PAGE_EXECREAD |
188 | ||
189 | #define PAGE_READONLY __pgprot(_PAGE_COMMON | _PAGE_READ) | |
190 | #define PAGE_WRITEONLY __pgprot(_PAGE_COMMON | _PAGE_WRITE) | |
191 | #define PAGE_RWX __pgprot(_PAGE_COMMON | _PAGE_READ | \ | |
192 | _PAGE_WRITE | _PAGE_EXECUTE) | |
193 | #define PAGE_KERNEL __pgprot(_KERNPG_TABLE) | |
1da177e4 | 194 | |
5e9c8ac5 PM |
195 | #define PAGE_KERNEL_NOCACHE \ |
196 | __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ | |
197 | _PAGE_EXECUTE | _PAGE_ACCESSED | \ | |
198 | _PAGE_DIRTY | _PAGE_SHARED) | |
199 | ||
1da177e4 LT |
200 | /* Make it a device mapping for maximum safety (e.g. for mapping device |
201 | registers into user-space via /dev/map). */ | |
202 | #define pgprot_noncached(x) __pgprot(((x).pgprot & ~(_PAGE_CACHABLE)) | _PAGE_DEVICE) | |
203 | #define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE) | |
204 | ||
205 | /* | |
206 | * Handling allocation failures during page table setup. | |
207 | */ | |
208 | extern void __handle_bad_pmd_kernel(pmd_t * pmd); | |
209 | #define __handle_bad_pmd(x) __handle_bad_pmd_kernel(x) | |
210 | ||
211 | /* | |
212 | * PTE level access routines. | |
213 | * | |
214 | * Note1: | |
215 | * It's the tree walk leaf. This is physical address to be stored. | |
216 | * | |
217 | * Note 2: | |
218 | * Regarding the choice of _PTE_EMPTY: | |
219 | ||
220 | We must choose a bit pattern that cannot be valid, whether or not the page | |
221 | is present. bit[2]==1 => present, bit[2]==0 => swapped out. If swapped | |
222 | out, bits [31:8], [6:3], [1:0] are under swapper control, so only bit[7] is | |
223 | left for us to select. If we force bit[7]==0 when swapped out, we could use | |
224 | the combination bit[7,2]=2'b10 to indicate an empty PTE. Alternatively, if | |
225 | we force bit[7]==1 when swapped out, we can use all zeroes to indicate | |
226 | empty. This is convenient, because the page tables get cleared to zero | |
227 | when they are allocated. | |
228 | ||
229 | */ | |
230 | #define _PTE_EMPTY 0x0 | |
231 | #define pte_present(x) (pte_val(x) & _PAGE_PRESENT) | |
232 | #define pte_clear(mm,addr,xp) (set_pte_at(mm, addr, xp, __pte(_PTE_EMPTY))) | |
233 | #define pte_none(x) (pte_val(x) == _PTE_EMPTY) | |
234 | ||
235 | /* | |
236 | * Some definitions to translate between mem_map, PTEs, and page | |
237 | * addresses: | |
238 | */ | |
239 | ||
240 | /* | |
241 | * Given a PTE, return the index of the mem_map[] entry corresponding | |
242 | * to the page frame the PTE. Get the absolute physical address, make | |
243 | * a relative physical address and translate it to an index. | |
244 | */ | |
245 | #define pte_pagenr(x) (((unsigned long) (pte_val(x)) - \ | |
246 | __MEMORY_START) >> PAGE_SHIFT) | |
247 | ||
248 | /* | |
249 | * Given a PTE, return the "struct page *". | |
250 | */ | |
251 | #define pte_page(x) (mem_map + pte_pagenr(x)) | |
252 | ||
253 | /* | |
254 | * Return number of (down rounded) MB corresponding to x pages. | |
255 | */ | |
256 | #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) | |
257 | ||
258 | ||
259 | /* | |
260 | * The following have defined behavior only work if pte_present() is true. | |
261 | */ | |
7e675137 NP |
262 | static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } |
263 | static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } | |
264 | static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } | |
265 | static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } | |
266 | static inline int pte_special(pte_t pte){ return 0; } | |
1da177e4 | 267 | |
ca5ed2f5 | 268 | static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_WRITE)); return pte; } |
ca5ed2f5 AB |
269 | static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; } |
270 | static inline pte_t pte_mkold(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; } | |
ca5ed2f5 | 271 | static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_WRITE)); return pte; } |
ca5ed2f5 AB |
272 | static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; } |
273 | static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; } | |
274 | static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; } | |
7e675137 | 275 | static inline pte_t pte_mkspecial(pte_t pte) { return pte; } |
63551ae0 | 276 | |
1da177e4 LT |
277 | |
278 | /* | |
279 | * Conversion functions: convert a page and protection to a page entry. | |
280 | * | |
281 | * extern pte_t mk_pte(struct page *page, pgprot_t pgprot) | |
282 | */ | |
283 | #define mk_pte(page,pgprot) \ | |
284 | ({ \ | |
285 | pte_t __pte; \ | |
286 | \ | |
287 | set_pte(&__pte, __pte((((page)-mem_map) << PAGE_SHIFT) | \ | |
288 | __MEMORY_START | pgprot_val((pgprot)))); \ | |
289 | __pte; \ | |
290 | }) | |
291 | ||
292 | /* | |
293 | * This takes a (absolute) physical page address that is used | |
294 | * by the remapping functions | |
295 | */ | |
296 | #define mk_pte_phys(physpage, pgprot) \ | |
297 | ({ pte_t __pte; set_pte(&__pte, __pte(physpage | pgprot_val(pgprot))); __pte; }) | |
298 | ||
ca5ed2f5 | 299 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) |
1da177e4 LT |
300 | { set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; } |
301 | ||
1da177e4 LT |
302 | /* Encode and decode a swap entry */ |
303 | #define __swp_type(x) (((x).val & 3) + (((x).val >> 1) & 0x3c)) | |
304 | #define __swp_offset(x) ((x).val >> 8) | |
305 | #define __swp_entry(type, offset) ((swp_entry_t) { ((offset << 8) + ((type & 0x3c) << 1) + (type & 3)) }) | |
306 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) | |
307 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) | |
308 | ||
309 | /* Encode and decode a nonlinear file mapping entry */ | |
310 | #define PTE_FILE_MAX_BITS 29 | |
311 | #define pte_to_pgoff(pte) (pte_val(pte)) | |
312 | #define pgoff_to_pte(off) ((pte_t) { (off) | _PAGE_FILE }) | |
313 | ||
1da177e4 LT |
314 | #endif /* !__ASSEMBLY__ */ |
315 | ||
1da177e4 LT |
316 | #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) |
317 | #define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) | |
318 | ||
a23ba435 | 319 | #endif /* __ASM_SH_PGTABLE_64_H */ |