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[mirror_ubuntu-zesty-kernel.git] / arch / sh / include / asm / tlb.h
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1#ifndef __ASM_SH_TLB_H
2#define __ASM_SH_TLB_H
3
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4#ifdef CONFIG_SUPERH64
5# include "tlb_64.h"
6#endif
7
8#ifndef __ASSEMBLY__
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9#include <linux/pagemap.h>
10
11#ifdef CONFIG_MMU
194cd8df 12#include <linux/swap.h>
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13#include <asm/pgalloc.h>
14#include <asm/tlbflush.h>
24ef7fc4 15#include <asm/mmu_context.h>
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16
17/*
18 * TLB handling. This allows us to remove pages from the page
19 * tables, and efficiently handle the TLB issues.
20 */
21struct mmu_gather {
22 struct mm_struct *mm;
23 unsigned int fullmm;
24 unsigned long start, end;
25};
959f7d58 26
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27static inline void init_tlb_gather(struct mmu_gather *tlb)
28{
29 tlb->start = TASK_SIZE;
30 tlb->end = 0;
1da177e4 31
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32 if (tlb->fullmm) {
33 tlb->start = 0;
34 tlb->end = TASK_SIZE;
35 }
36}
37
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38static inline void
39tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned int full_mm_flush)
c2035184 40{
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41 tlb->mm = mm;
42 tlb->fullmm = full_mm_flush;
43
44 init_tlb_gather(tlb);
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45}
46
47static inline void
48tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
49{
50 if (tlb->fullmm)
51 flush_tlb_mm(tlb->mm);
52
53 /* keep the page table cache within bounds */
54 check_pgt_cache();
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55}
56
57static inline void
58tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, unsigned long address)
59{
60 if (tlb->start > address)
61 tlb->start = address;
62 if (tlb->end < address + PAGE_SIZE)
63 tlb->end = address + PAGE_SIZE;
64}
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65
66/*
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67 * In the case of tlb vma handling, we can optimise these away in the
68 * case where we're doing a full MM flush. When we're doing a munmap,
69 * the vmas are adjusted to only cover the region to be torn down.
1da177e4 70 */
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71static inline void
72tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
73{
74 if (!tlb->fullmm)
75 flush_cache_range(vma, vma->vm_start, vma->vm_end);
76}
77
78static inline void
79tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
80{
81 if (!tlb->fullmm && tlb->end) {
82 flush_tlb_range(vma, tlb->start, tlb->end);
83 init_tlb_gather(tlb);
84 }
85}
86
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87static inline void tlb_flush_mmu(struct mmu_gather *tlb)
88{
89}
90
91static inline int __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
92{
93 free_page_and_swap_cache(page);
94 return 1; /* avoid calling tlb_flush_mmu */
95}
96
97static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
98{
99 __tlb_remove_page(tlb, page);
100}
101
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102#define pte_free_tlb(tlb, ptep, addr) pte_free((tlb)->mm, ptep)
103#define pmd_free_tlb(tlb, pmdp, addr) pmd_free((tlb)->mm, pmdp)
104#define pud_free_tlb(tlb, pudp, addr) pud_free((tlb)->mm, pudp)
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105
106#define tlb_migrate_finish(mm) do { } while (0)
107
bb29c677 108#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SUPERH64)
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109extern void tlb_wire_entry(struct vm_area_struct *, unsigned long, pte_t);
110extern void tlb_unwire_entry(void);
111#else
112static inline void tlb_wire_entry(struct vm_area_struct *vma ,
113 unsigned long addr, pte_t pte)
114{
115 BUG();
116}
117
118static inline void tlb_unwire_entry(void)
119{
120 BUG();
121}
bb29c677 122#endif
8eda5514 123
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124#else /* CONFIG_MMU */
125
126#define tlb_start_vma(tlb, vma) do { } while (0)
127#define tlb_end_vma(tlb, vma) do { } while (0)
128#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
129#define tlb_flush(tlb) do { } while (0)
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130
131#include <asm-generic/tlb.h>
959f7d58 132
c2035184 133#endif /* CONFIG_MMU */
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134#endif /* __ASSEMBLY__ */
135#endif /* __ASM_SH_TLB_H */