]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | #ifndef __ASM_CPU_SH4_DMA_H |
2 | #define __ASM_CPU_SH4_DMA_H | |
3 | ||
9f8a5e3a | 4 | /* SH7751/7760/7780 DMA IRQ sources */ |
9f8a5e3a | 5 | |
0d831770 | 6 | #ifdef CONFIG_CPU_SH4A |
5283ecb5 | 7 | |
71b973a4 | 8 | #include <cpu/dma-sh4a.h> |
8b1935e6 | 9 | |
71b973a4 | 10 | #else /* CONFIG_CPU_SH4A */ |
9f380456 PM |
11 | |
12 | #include <linux/sh_intc.h> | |
13 | ||
71b973a4 NI |
14 | /* |
15 | * SH7750/SH7751/SH7760 | |
16 | */ | |
9f380456 PM |
17 | #define DMTE0_IRQ evt2irq(0x640) |
18 | #define DMTE4_IRQ evt2irq(0x780) | |
19 | #define DMTE6_IRQ evt2irq(0x7c0) | |
20 | #define DMAE0_IRQ evt2irq(0x6c0) | |
1da177e4 | 21 | |
71b973a4 NI |
22 | #define SH_DMAC_BASE0 0xffa00000 |
23 | #define SH_DMAC_BASE1 0xffa00070 | |
0d831770 | 24 | /* Definitions for the SuperH DMAC */ |
71b973a4 | 25 | #define TM_BURST 0x00000080 |
0d831770 PM |
26 | #define TS_8 0x00000010 |
27 | #define TS_16 0x00000020 | |
28 | #define TS_32 0x00000030 | |
29 | #define TS_64 0x00000000 | |
1da177e4 | 30 | |
0d831770 PM |
31 | #define DMAOR_COD 0x00000008 |
32 | ||
5283ecb5 | 33 | #endif |
0d831770 PM |
34 | |
35 | #endif /* __ASM_CPU_SH4_DMA_H */ |