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253b0887 PM |
1 | #include <linux/clk.h> |
2 | #include <linux/compiler.h> | |
3 | #include <asm/clock.h> | |
4 | ||
36aa1e32 | 5 | #ifdef CONFIG_SH_CLK_CPG_LEGACY |
253b0887 PM |
6 | static struct clk master_clk = { |
7 | .name = "master_clk", | |
8 | .flags = CLK_ENABLE_ON_INIT, | |
9 | .rate = CONFIG_SH_PCLK_FREQ, | |
10 | }; | |
11 | ||
12 | static struct clk peripheral_clk = { | |
13 | .name = "peripheral_clk", | |
14 | .parent = &master_clk, | |
15 | .flags = CLK_ENABLE_ON_INIT, | |
16 | }; | |
17 | ||
18 | static struct clk bus_clk = { | |
19 | .name = "bus_clk", | |
20 | .parent = &master_clk, | |
21 | .flags = CLK_ENABLE_ON_INIT, | |
22 | }; | |
23 | ||
24 | static struct clk cpu_clk = { | |
25 | .name = "cpu_clk", | |
26 | .parent = &master_clk, | |
27 | .flags = CLK_ENABLE_ON_INIT, | |
28 | }; | |
29 | ||
30 | /* | |
31 | * The ordering of these clocks matters, do not change it. | |
32 | */ | |
33 | static struct clk *onchip_clocks[] = { | |
34 | &master_clk, | |
35 | &peripheral_clk, | |
36 | &bus_clk, | |
37 | &cpu_clk, | |
38 | }; | |
39 | ||
40 | int __init __deprecated cpg_clk_init(void) | |
41 | { | |
42 | int i, ret = 0; | |
43 | ||
44 | for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) { | |
45 | struct clk *clk = onchip_clocks[i]; | |
46 | arch_init_clk_ops(&clk->ops, i); | |
47 | if (clk->ops) | |
48 | ret |= clk_register(clk); | |
49 | } | |
50 | ||
51 | return ret; | |
52 | } | |
53 | ||
54 | /* | |
55 | * Placeholder for compatability, until the lazy CPUs do this | |
56 | * on their own. | |
57 | */ | |
58 | int __init __weak arch_clk_init(void) | |
59 | { | |
60 | return cpg_clk_init(); | |
61 | } | |
36aa1e32 | 62 | #endif /* CONFIG_SH_CPG_CLK_LEGACY */ |