]>
Commit | Line | Data |
---|---|---|
add5ca2c | 1 | // SPDX-License-Identifier: GPL-2.0 |
36ddf31b | 2 | /* |
58862699 | 3 | * arch/sh/kernel/cpu/sh4a/clock-sh7770.c |
36ddf31b PM |
4 | * |
5 | * SH7770 support for the clock framework | |
6 | * | |
7 | * Copyright (C) 2005 Paul Mundt | |
36ddf31b PM |
8 | */ |
9 | #include <linux/init.h> | |
10 | #include <linux/kernel.h> | |
11 | #include <asm/clock.h> | |
12 | #include <asm/freq.h> | |
13 | #include <asm/io.h> | |
14 | ||
15 | static int ifc_divisors[] = { 1, 1, 1, 1, 1, 1, 1, 1 }; | |
16 | static int bfc_divisors[] = { 1, 1, 1, 1, 1, 8,12, 1 }; | |
17 | static int pfc_divisors[] = { 1, 8, 1,10,12,16, 1, 1 }; | |
18 | ||
19 | static void master_clk_init(struct clk *clk) | |
20 | { | |
9d56dd3b | 21 | clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> 28) & 0x000f]; |
36ddf31b PM |
22 | } |
23 | ||
33cb61a4 | 24 | static struct sh_clk_ops sh7770_master_clk_ops = { |
36ddf31b PM |
25 | .init = master_clk_init, |
26 | }; | |
27 | ||
b68d8201 | 28 | static unsigned long module_clk_recalc(struct clk *clk) |
36ddf31b | 29 | { |
9d56dd3b | 30 | int idx = ((__raw_readl(FRQCR) >> 28) & 0x000f); |
b68d8201 | 31 | return clk->parent->rate / pfc_divisors[idx]; |
36ddf31b PM |
32 | } |
33 | ||
33cb61a4 | 34 | static struct sh_clk_ops sh7770_module_clk_ops = { |
36ddf31b PM |
35 | .recalc = module_clk_recalc, |
36 | }; | |
37 | ||
b68d8201 | 38 | static unsigned long bus_clk_recalc(struct clk *clk) |
36ddf31b | 39 | { |
9d56dd3b | 40 | int idx = (__raw_readl(FRQCR) & 0x000f); |
b68d8201 | 41 | return clk->parent->rate / bfc_divisors[idx]; |
36ddf31b PM |
42 | } |
43 | ||
33cb61a4 | 44 | static struct sh_clk_ops sh7770_bus_clk_ops = { |
36ddf31b PM |
45 | .recalc = bus_clk_recalc, |
46 | }; | |
47 | ||
b68d8201 | 48 | static unsigned long cpu_clk_recalc(struct clk *clk) |
36ddf31b | 49 | { |
9d56dd3b | 50 | int idx = ((__raw_readl(FRQCR) >> 24) & 0x000f); |
b68d8201 | 51 | return clk->parent->rate / ifc_divisors[idx]; |
36ddf31b PM |
52 | } |
53 | ||
33cb61a4 | 54 | static struct sh_clk_ops sh7770_cpu_clk_ops = { |
36ddf31b PM |
55 | .recalc = cpu_clk_recalc, |
56 | }; | |
57 | ||
33cb61a4 | 58 | static struct sh_clk_ops *sh7770_clk_ops[] = { |
36ddf31b PM |
59 | &sh7770_master_clk_ops, |
60 | &sh7770_module_clk_ops, | |
61 | &sh7770_bus_clk_ops, | |
62 | &sh7770_cpu_clk_ops, | |
63 | }; | |
64 | ||
33cb61a4 | 65 | void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) |
36ddf31b PM |
66 | { |
67 | if (idx < ARRAY_SIZE(sh7770_clk_ops)) | |
68 | *ops = sh7770_clk_ops[idx]; | |
69 | } | |
70 |