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a6a31139 1/*
1da177e4
LT
2 * linux/arch/sh/kernel/irq.c
3 *
4 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
5 *
6 *
7 * SuperH version: Copyright (C) 1999 Niibe Yutaka
8 */
bf3a00f8 9#include <linux/irq.h>
1da177e4 10#include <linux/interrupt.h>
a6a31139 11#include <linux/module.h>
bf3a00f8 12#include <linux/kernel_stat.h>
1da177e4 13#include <linux/seq_file.h>
ba93483f 14#include <linux/ftrace.h>
763142d1 15#include <linux/delay.h>
9ab3a15d 16#include <linux/ratelimit.h>
bf3a00f8 17#include <asm/processor.h>
be782df5 18#include <asm/machvec.h>
7c0f6ba6 19#include <linux/uaccess.h>
a6a31139 20#include <asm/thread_info.h>
f15cbe6f 21#include <cpu/mmu_context.h>
1da177e4 22
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23atomic_t irq_err_count;
24
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25/*
26 * 'what should we do if we get a hw irq event on an illegal vector'.
27 * each architecture has to answer this themselves, it doesn't deserve
28 * a generic callback i think.
29 */
30void ack_bad_irq(unsigned int irq)
31{
baf4326e 32 atomic_inc(&irq_err_count);
1da177e4
LT
33 printk("unexpected IRQ trap at vector %02x\n", irq);
34}
35
36#if defined(CONFIG_PROC_FS)
fa1d43ab 37/*
3d44ae40 38 * /proc/interrupts printing for arch specific interrupts
fa1d43ab 39 */
3d44ae40 40int arch_show_interrupts(struct seq_file *p, int prec)
fa1d43ab 41{
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42 int j;
43
44 seq_printf(p, "%*s: ", prec, "NMI");
45 for_each_online_cpu(j)
46 seq_printf(p, "%10u ", irq_stat[j].__nmi_count);
47 seq_printf(p, " Non-maskable interrupts\n");
48
fa1d43ab 49 seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
731ba330 50
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51 return 0;
52}
1da177e4
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53#endif
54
110ed282 55#ifdef CONFIG_IRQSTACKS
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56/*
57 * per-CPU IRQ handling contexts (thread information and stack)
58 */
59union irq_ctx {
60 struct thread_info tinfo;
61 u32 stack[THREAD_SIZE/sizeof(u32)];
62};
63
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64static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
65static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
a6a31139 66
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67static char softirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
68static char hardirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
69
70static inline void handle_one_irq(unsigned int irq)
bf3a00f8 71{
a6a31139 72 union irq_ctx *curctx, *irqctx;
a6a31139 73
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74 curctx = (union irq_ctx *)current_thread_info();
75 irqctx = hardirq_ctx[smp_processor_id()];
76
77 /*
78 * this is where we switch to the IRQ stack. However, if we are
79 * already using the IRQ stack (because we interrupted a hardirq
80 * handler) we can't do that and just have to keep using the
81 * current stack (which is the irq stack already after all)
82 */
83 if (curctx != irqctx) {
84 u32 *isp;
85
86 isp = (u32 *)((char *)irqctx + sizeof(*irqctx));
87 irqctx->tinfo.task = curctx->tinfo.task;
88 irqctx->tinfo.previous_sp = current_stack_pointer;
89
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90 /*
91 * Copy the softirq bits in preempt_count so that the
92 * softirq checks work in the hardirq context.
93 */
94 irqctx->tinfo.preempt_count =
95 (irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
96 (curctx->tinfo.preempt_count & SOFTIRQ_MASK);
97
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98 __asm__ __volatile__ (
99 "mov %0, r4 \n"
1dc41e58 100 "mov r15, r8 \n"
baf4326e 101 "jsr @%1 \n"
a6a31139 102 /* swith to the irq stack */
baf4326e 103 " mov %2, r15 \n"
a6a31139 104 /* restore the stack (ring zero) */
1dc41e58 105 "mov r8, r15 \n"
a6a31139 106 : /* no outputs */
35f3c518 107 : "r" (irq), "r" (generic_handle_irq), "r" (isp)
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108 : "memory", "r0", "r1", "r2", "r3", "r4",
109 "r5", "r6", "r7", "r8", "t", "pr"
110 );
111 } else
35f3c518 112 generic_handle_irq(irq);
1da177e4 113}
a6a31139 114
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115/*
116 * allocate per-cpu stacks for hardirq and for softirq processing
117 */
118void irq_ctx_init(int cpu)
119{
120 union irq_ctx *irqctx;
121
122 if (hardirq_ctx[cpu])
123 return;
124
125 irqctx = (union irq_ctx *)&hardirq_stack[cpu * THREAD_SIZE];
126 irqctx->tinfo.task = NULL;
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127 irqctx->tinfo.cpu = cpu;
128 irqctx->tinfo.preempt_count = HARDIRQ_OFFSET;
129 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
130
131 hardirq_ctx[cpu] = irqctx;
132
133 irqctx = (union irq_ctx *)&softirq_stack[cpu * THREAD_SIZE];
134 irqctx->tinfo.task = NULL;
a6a31139 135 irqctx->tinfo.cpu = cpu;
1dc41e58 136 irqctx->tinfo.preempt_count = 0;
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137 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
138
139 softirq_ctx[cpu] = irqctx;
140
141 printk("CPU %u irqstacks, hard=%p soft=%p\n",
142 cpu, hardirq_ctx[cpu], softirq_ctx[cpu]);
143}
144
145void irq_ctx_exit(int cpu)
146{
147 hardirq_ctx[cpu] = NULL;
148}
149
7d65f4a6 150void do_softirq_own_stack(void)
a6a31139 151{
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152 struct thread_info *curctx;
153 union irq_ctx *irqctx;
154 u32 *isp;
155
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156 curctx = current_thread_info();
157 irqctx = softirq_ctx[smp_processor_id()];
158 irqctx->tinfo.task = curctx->task;
159 irqctx->tinfo.previous_sp = current_stack_pointer;
160
161 /* build the stack frame on the softirq stack */
162 isp = (u32 *)((char *)irqctx + sizeof(*irqctx));
163
164 __asm__ __volatile__ (
165 "mov r15, r9 \n"
166 "jsr @%0 \n"
167 /* switch to the softirq stack */
168 " mov %1, r15 \n"
169 /* restore the thread stack */
170 "mov r9, r15 \n"
171 : /* no outputs */
172 : "r" (__do_softirq), "r" (isp)
173 : "memory", "r0", "r1", "r2", "r3", "r4",
174 "r5", "r6", "r7", "r8", "r9", "r15", "t", "pr"
175 );
a6a31139 176}
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177#else
178static inline void handle_one_irq(unsigned int irq)
179{
180 generic_handle_irq(irq);
181}
a6a31139 182#endif
ea0f8fea 183
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184asmlinkage __irq_entry int do_IRQ(unsigned int irq, struct pt_regs *regs)
185{
186 struct pt_regs *old_regs = set_irq_regs(regs);
187
188 irq_enter();
189
190 irq = irq_demux(irq_lookup(irq));
191
192 if (irq != NO_IRQ_IGNORE) {
193 handle_one_irq(irq);
194 irq_finish(irq);
195 }
196
197 irq_exit();
198
199 set_irq_regs(old_regs);
200
201 return IRQ_HANDLED;
202}
203
ea0f8fea
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204void __init init_IRQ(void)
205{
90015c89 206 plat_irq_setup();
ea0f8fea
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207
208 /* Perform the machine specific initialisation */
209 if (sh_mv.mv_init_irq)
210 sh_mv.mv_init_irq();
211
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212 intc_finalize();
213
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214 irq_ctx_init(smp_processor_id());
215}
d8586ba6 216
763142d1 217#ifdef CONFIG_HOTPLUG_CPU
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218/*
219 * The CPU has been marked offline. Migrate IRQs off this CPU. If
220 * the affinity settings do not allow other CPUs, force them onto any
221 * available CPU.
222 */
223void migrate_irqs(void)
224{
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225 unsigned int irq, cpu = smp_processor_id();
226
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227 for_each_active_irq(irq) {
228 struct irq_data *data = irq_get_irq_data(irq);
229
cde5c275 230 if (irq_data_get_node(data) == cpu) {
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231 struct cpumask *mask = irq_data_get_affinity_mask(data);
232 unsigned int newcpu = cpumask_any_and(mask,
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233 cpu_online_mask);
234 if (newcpu >= nr_cpu_ids) {
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235 pr_info_ratelimited("IRQ%u no longer affine to CPU%u\n",
236 irq, cpu);
763142d1 237
8b8149df 238 cpumask_setall(mask);
763142d1 239 }
8b8149df 240 irq_set_affinity(irq, mask);
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241 }
242 }
243}
244#endif