]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - arch/sh/kernel/setup.c
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
[mirror_ubuntu-bionic-kernel.git] / arch / sh / kernel / setup.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
711fa809 2/*
11c19656 3 * arch/sh/kernel/setup.c
1da177e4 4 *
1da177e4 5 * This file handles the architecture-dependent parts of initialization
11c19656
PM
6 *
7 * Copyright (C) 1999 Niibe Yutaka
19d8f84f 8 * Copyright (C) 2002 - 2010 Paul Mundt
1da177e4 9 */
894673ee 10#include <linux/screen_info.h>
1da177e4
LT
11#include <linux/ioport.h>
12#include <linux/init.h>
13#include <linux/initrd.h>
14#include <linux/bootmem.h>
15#include <linux/console.h>
1da177e4
LT
16#include <linux/root_dev.h>
17#include <linux/utsname.h>
01066625 18#include <linux/nodemask.h>
1da177e4 19#include <linux/cpu.h>
22a9835c 20#include <linux/pfn.h>
711fa809 21#include <linux/fs.h>
01066625 22#include <linux/mm.h>
4d5ade5b 23#include <linux/kexec.h>
98d877c4 24#include <linux/module.h>
0016a126 25#include <linux/smp.h>
b9e393c2 26#include <linux/err.h>
daf423db 27#include <linux/crash_dump.h>
fa43972f 28#include <linux/mmzone.h>
cf204fa7
PM
29#include <linux/clk.h>
30#include <linux/delay.h>
87a00dc0 31#include <linux/platform_device.h>
95f72d1e 32#include <linux/memblock.h>
7480e0aa
RF
33#include <linux/of.h>
34#include <linux/of_fdt.h>
7c0f6ba6 35#include <linux/uaccess.h>
1da177e4 36#include <asm/io.h>
7a302a96 37#include <asm/page.h>
cd01204b 38#include <asm/elf.h>
1da177e4
LT
39#include <asm/sections.h>
40#include <asm/irq.h>
41#include <asm/setup.h>
de02797a 42#include <asm/clock.h>
c9f4a3f5 43#include <asm/smp.h>
01066625 44#include <asm/mmu_context.h>
19d8f84f 45#include <asm/mmzone.h>
9cc1cf38 46#include <asm/sparsemem.h>
1da177e4 47
1da177e4
LT
48/*
49 * Initialize loops_per_jiffy as 10000000 (1000MIPS).
50 * This value will be used at the very early stage of serial setup.
51 * The bigger value means no problem.
52 */
2d4a73d5
PM
53struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = {
54 [0] = {
55 .type = CPU_SH_NONE,
e82da214 56 .family = CPU_FAMILY_UNKNOWN,
2d4a73d5 57 .loops_per_jiffy = 10000000,
2f98492c 58 .phys_bits = MAX_PHYSMEM_BITS,
2d4a73d5
PM
59 },
60};
61EXPORT_SYMBOL(cpu_data);
82f81f47
PM
62
63/*
64 * The machine vector. First entry in .machvec.init, or clobbered by
65 * sh_mv= on the command line, prior to .machvec.init teardown.
66 */
fd8f20e8 67struct sh_machine_vector sh_mv = { .mv_name = "generic", };
971ac16d 68EXPORT_SYMBOL(sh_mv);
82f81f47 69
2c7834a6 70#ifdef CONFIG_VT
1da177e4 71struct screen_info screen_info;
2c7834a6 72#endif
1da177e4 73
1da177e4
LT
74extern int root_mountflags;
75
65463b73 76#define RAMDISK_IMAGE_START_MASK 0x07FF
1da177e4 77#define RAMDISK_PROMPT_FLAG 0x8000
65463b73 78#define RAMDISK_LOAD_FLAG 0x4000
1da177e4 79
53c82622 80static char __initdata command_line[COMMAND_LINE_SIZE] = { 0, };
1da177e4 81
69d1ef4c
PM
82static struct resource code_resource = {
83 .name = "Kernel code",
35d98e93 84 .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM,
69d1ef4c
PM
85};
86
87static struct resource data_resource = {
88 .name = "Kernel data",
35d98e93 89 .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM,
69d1ef4c 90};
1da177e4 91
3d83984e
MD
92static struct resource bss_resource = {
93 .name = "Kernel bss",
35d98e93 94 .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM,
3d83984e
MD
95};
96
98d877c4
PM
97unsigned long memory_start;
98EXPORT_SYMBOL(memory_start);
7e5186ea 99unsigned long memory_end = 0;
98d877c4 100EXPORT_SYMBOL(memory_end);
5e2ff328 101unsigned long memory_limit = 0;
1da177e4 102
0146ba78
MD
103static struct resource mem_resources[MAX_NUMNODES];
104
cd01204b
PM
105int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
106
9655ad03 107static int __init early_parse_mem(char *p)
1da177e4 108{
5e2ff328
PM
109 if (!p)
110 return 1;
1da177e4 111
5e2ff328 112 memory_limit = PAGE_ALIGN(memparse(p, &p));
80a68a43 113
5e2ff328 114 pr_notice("Memory limited to %ldMB\n", memory_limit >> 20);
2c7834a6 115
1da177e4
LT
116 return 0;
117}
9655ad03 118early_param("mem", early_parse_mem);
1da177e4 119
4bc277ac 120void __init check_for_initrd(void)
9b7a3785
PM
121{
122#ifdef CONFIG_BLK_DEV_INITRD
123 unsigned long start, end;
124
125 /*
126 * Check for the rare cases where boot loaders adhere to the boot
127 * ABI.
128 */
129 if (!LOADER_TYPE || !INITRD_START || !INITRD_SIZE)
130 goto disable;
131
132 start = INITRD_START + __MEMORY_START;
133 end = start + INITRD_SIZE;
134
135 if (unlikely(end <= start))
136 goto disable;
137 if (unlikely(start & ~PAGE_MASK)) {
138 pr_err("initrd must be page aligned\n");
139 goto disable;
140 }
141
901c28c2
NI
142 if (unlikely(start < __MEMORY_START)) {
143 pr_err("initrd start (%08lx) < __MEMORY_START(%x)\n",
144 start, __MEMORY_START);
9b7a3785
PM
145 goto disable;
146 }
147
95f72d1e 148 if (unlikely(end > memblock_end_of_DRAM())) {
9b7a3785
PM
149 pr_err("initrd extends beyond end of memory "
150 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
95f72d1e 151 end, (unsigned long)memblock_end_of_DRAM());
9b7a3785
PM
152 goto disable;
153 }
154
155 /*
25985edc 156 * If we got this far in spite of the boot loader's best efforts
9b7a3785
PM
157 * to the contrary, assume we actually have a valid initrd and
158 * fix up the root dev.
159 */
160 ROOT_DEV = Root_RAM0;
161
162 /*
163 * Address sanitization
164 */
901c28c2 165 initrd_start = (unsigned long)__va(start);
9b7a3785
PM
166 initrd_end = initrd_start + INITRD_SIZE;
167
95f72d1e 168 memblock_reserve(__pa(initrd_start), INITRD_SIZE);
9b7a3785
PM
169
170 return;
171
172disable:
173 pr_info("initrd disabled\n");
174 initrd_start = initrd_end = 0;
175#endif
176}
177
7480e0aa 178#ifndef CONFIG_GENERIC_CALIBRATE_DELAY
4603f53a 179void calibrate_delay(void)
cf204fa7
PM
180{
181 struct clk *clk = clk_get(NULL, "cpu_clk");
182
183 if (IS_ERR(clk))
184 panic("Need a sane CPU clock definition!");
185
186 loops_per_jiffy = (clk_get_rate(clk) >> 1) / HZ;
187
188 printk(KERN_INFO "Calibrating delay loop (skipped)... "
189 "%lu.%02lu BogoMIPS PRESET (lpj=%lu)\n",
190 loops_per_jiffy/(500000/HZ),
191 (loops_per_jiffy/(5000/HZ)) % 100,
192 loops_per_jiffy);
193}
7480e0aa 194#endif
cf204fa7 195
0146ba78
MD
196void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
197 unsigned long end_pfn)
198{
199 struct resource *res = &mem_resources[nid];
21823259 200 unsigned long start, end;
0146ba78
MD
201
202 WARN_ON(res->name); /* max one active range per node for now */
203
21823259
PM
204 start = start_pfn << PAGE_SHIFT;
205 end = end_pfn << PAGE_SHIFT;
206
0146ba78 207 res->name = "System RAM";
21823259
PM
208 res->start = start;
209 res->end = end - 1;
35d98e93 210 res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;
21823259 211
0146ba78
MD
212 if (request_resource(&iomem_resource, res)) {
213 pr_err("unable to request memory_resource 0x%lx 0x%lx\n",
214 start_pfn, end_pfn);
215 return;
216 }
217
218 /*
41309b7a
SH
219 * We don't know which RAM region contains kernel data or
220 * the reserved crashkernel region, so try it repeatedly
221 * and let the resource manager test it.
0146ba78
MD
222 */
223 request_resource(res, &code_resource);
224 request_resource(res, &data_resource);
225 request_resource(res, &bss_resource);
41309b7a
SH
226#ifdef CONFIG_KEXEC
227 request_resource(res, &crashk_res);
228#endif
0146ba78 229
1da177e4 230 /*
21823259
PM
231 * Also make sure that there is a PMB mapping that covers this
232 * range before we attempt to activate it, to avoid reset by MMU.
233 * We can hit this path with NUMA or memory hot-add.
1da177e4 234 */
21823259
PM
235 pmb_bolt_mapping((unsigned long)__va(start), start, end - start,
236 PAGE_KERNEL);
c601a51a 237
e7e8de59
TC
238 memblock_set_node(PFN_PHYS(start_pfn), PFN_PHYS(end_pfn - start_pfn),
239 &memblock.memory, nid);
01066625 240}
01066625 241
19d8f84f 242void __init __weak plat_early_device_setup(void)
87a00dc0
MD
243{
244}
245
03767daa 246#ifdef CONFIG_OF_FLATTREE
7480e0aa
RF
247void __ref sh_fdt_init(phys_addr_t dt_phys)
248{
249 static int done = 0;
250 void *dt_virt;
251
252 /* Avoid calling an __init function on secondary cpus. */
253 if (done) return;
254
190fe191
RF
255#ifdef CONFIG_USE_BUILTIN_DTB
256 dt_virt = __dtb_start;
257#else
7480e0aa 258 dt_virt = phys_to_virt(dt_phys);
190fe191 259#endif
7480e0aa
RF
260
261 if (!dt_virt || !early_init_dt_scan(dt_virt)) {
262 pr_crit("Error: invalid device tree blob"
263 " at physical address %p\n", (void *)dt_phys);
264
265 while (true)
266 cpu_relax();
267 }
268
269 done = 1;
270}
271#endif
272
01066625
PM
273void __init setup_arch(char **cmdline_p)
274{
275 enable_mmu();
276
01066625
PM
277 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
278
0105346c
PM
279 printk(KERN_NOTICE "Boot params:\n"
280 "... MOUNT_ROOT_RDONLY - %08lx\n"
281 "... RAMDISK_FLAGS - %08lx\n"
282 "... ORIG_ROOT_DEV - %08lx\n"
283 "... LOADER_TYPE - %08lx\n"
284 "... INITRD_START - %08lx\n"
285 "... INITRD_SIZE - %08lx\n",
286 MOUNT_ROOT_RDONLY, RAMDISK_FLAGS,
287 ORIG_ROOT_DEV, LOADER_TYPE,
288 INITRD_START, INITRD_SIZE);
289
01066625
PM
290#ifdef CONFIG_BLK_DEV_RAM
291 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
292 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
293 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
294#endif
295
296 if (!MOUNT_ROOT_RDONLY)
297 root_mountflags &= ~MS_RDONLY;
298 init_mm.start_code = (unsigned long) _text;
299 init_mm.end_code = (unsigned long) _etext;
300 init_mm.end_data = (unsigned long) _edata;
301 init_mm.brk = (unsigned long) _end;
302
303 code_resource.start = virt_to_phys(_text);
304 code_resource.end = virt_to_phys(_etext)-1;
305 data_resource.start = virt_to_phys(_etext);
306 data_resource.end = virt_to_phys(_edata)-1;
3d83984e 307 bss_resource.start = virt_to_phys(__bss_start);
363737d6 308 bss_resource.end = virt_to_phys(__bss_stop)-1;
01066625 309
d724a9c9 310#ifdef CONFIG_CMDLINE_OVERWRITE
ba36197c
PM
311 strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line));
312#else
313 strlcpy(command_line, COMMAND_LINE, sizeof(command_line));
d724a9c9
PM
314#ifdef CONFIG_CMDLINE_EXTEND
315 strlcat(command_line, " ", sizeof(command_line));
316 strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line));
317#endif
ba36197c 318#endif
9655ad03 319
ba36197c
PM
320 /* Save unparsed command line copy for /proc/cmdline */
321 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
9655ad03
PM
322 *cmdline_p = command_line;
323
01066625
PM
324 parse_early_param();
325
87a00dc0
MD
326 plat_early_device_setup();
327
9655ad03 328 sh_mv_setup();
01066625 329
4bc277ac
PM
330 /* Let earlyprintk output early console messages */
331 early_platform_driver_probe("earlyprintk", 1, 1);
dfbb9042 332
4bc277ac 333 paging_init();
1da177e4
LT
334
335#ifdef CONFIG_DUMMY_CONSOLE
336 conswitchp = &dummy_con;
337#endif
338
339 /* Perform the machine specific initialisation */
2c7834a6
PM
340 if (likely(sh_mv.mv_setup))
341 sh_mv.mv_setup(cmdline_p);
1da177e4 342
0016a126 343 plat_smp_setup();
dfbb9042 344}
1da177e4 345
eb9b9b56
MD
346/* processor boot mode configuration */
347int generic_mode_pins(void)
348{
349 pr_warning("generic_mode_pins(): missing mode pin configuration\n");
350 return 0;
351}
352
353int test_mode_pin(int pin)
354{
0d4fdbb6 355 return sh_mv.mv_mode_pins() & pin;
eb9b9b56 356}