[mirror_ubuntu-jammy-kernel.git] / arch / sh / mm / cache-sh2.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * arch/sh/mm/cache-sh2.c
 *
 * Copyright (C) 2002 Paul Mundt
 * Copyright (C) 2008 Yoshinori Sato
 */

#include <linux/init.h>
#include <linux/mm.h>

#include <asm/cache.h>
#include <asm/addrspace.h>
#include <asm/processor.h>
#include <asm/cacheflush.h>
#include <asm/io.h>

static void sh2__flush_wback_region(void *start, int size)
{
	unsigned long v;
	unsigned long begin, end;

	begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
	end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
		& ~(L1_CACHE_BYTES-1);
	for (v = begin; v < end; v+=L1_CACHE_BYTES) {
		unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0);
		int way;
		for (way = 0; way < 4; way++) {
			unsigned long data =  __raw_readl(addr | (way << 12));
			if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
				data &= ~SH_CACHE_UPDATED;
				__raw_writel(data, addr | (way << 12));
			}
		}
	}
}

static void sh2__flush_purge_region(void *start, int size)
{
	unsigned long v;
	unsigned long begin, end;

	begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
	end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
		& ~(L1_CACHE_BYTES-1);

	for (v = begin; v < end; v+=L1_CACHE_BYTES)
		__raw_writel((v & CACHE_PHYSADDR_MASK),
			  CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008);
}

static void sh2__flush_invalidate_region(void *start, int size)
{
#ifdef CONFIG_CACHE_WRITEBACK
	/*
	 * SH-2 does not support individual line invalidation, only a
	 * global invalidate.
	 */
	unsigned long ccr;
	unsigned long flags;
	local_irq_save(flags);
	jump_to_uncached();

	ccr = __raw_readl(SH_CCR);
	ccr |= CCR_CACHE_INVALIDATE;
	__raw_writel(ccr, SH_CCR);

	back_to_cached();
	local_irq_restore(flags);
#else
	unsigned long v;
	unsigned long begin, end;

	begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
	end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
		& ~(L1_CACHE_BYTES-1);

	for (v = begin; v < end; v+=L1_CACHE_BYTES)
		__raw_writel((v & CACHE_PHYSADDR_MASK),
			  CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008);
#endif
}

void __init sh2_cache_init(void)
{
	__flush_wback_region		= sh2__flush_wback_region;
	__flush_purge_region		= sh2__flush_purge_region;
	__flush_invalidate_region	= sh2__flush_invalidate_region;
}
Commit	Line	Data
c456cfc2	1	// SPDX-License-Identifier: GPL-2.0-only
1da177e4 LT	2	/*
	3	* arch/sh/mm/cache-sh2.c
	4	*
	5	* Copyright (C) 2002 Paul Mundt
cce2d453	6	* Copyright (C) 2008 Yoshinori Sato
1da177e4	7	*/
9d4436a6	8
1da177e4 LT	9	#include <linux/init.h>
	10	#include <linux/mm.h>
	11
	12	#include <asm/cache.h>
	13	#include <asm/addrspace.h>
	14	#include <asm/processor.h>
	15	#include <asm/cacheflush.h>
	16	#include <asm/io.h>
	17
109b44a8	18	static void sh2__flush_wback_region(void *start, int size)
1da177e4	19	{
9d4436a6 YS	20	unsigned long v;
	21	unsigned long begin, end;
	22
	23	begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
	24	end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
	25	& ~(L1_CACHE_BYTES-1);
	26	for (v = begin; v < end; v+=L1_CACHE_BYTES) {
cce2d453 YS	27	unsigned long addr = CACHE_OC_ADDRESS_ARRAY \| (v & 0x00000ff0);
	28	int way;
	29	for (way = 0; way < 4; way++) {
9d56dd3b	30	unsigned long data = __raw_readl(addr \| (way << 12));
cce2d453 YS	31	if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
cce2d453 YS	32	data &= ~SH_CACHE_UPDATED;
9d56dd3b	33	__raw_writel(data, addr \| (way << 12));
cce2d453 YS	34	}
cce2d453 YS	35	}
9d4436a6 YS	36	}
	37	}
	38
109b44a8	39	static void sh2__flush_purge_region(void *start, int size)
9d4436a6 YS	40	{
	41	unsigned long v;
	42	unsigned long begin, end;
	43
	44	begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
	45	end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
	46	& ~(L1_CACHE_BYTES-1);
cce2d453 YS	47
cce2d453 YS	48	for (v = begin; v < end; v+=L1_CACHE_BYTES)
9d56dd3b	49	__raw_writel((v & CACHE_PHYSADDR_MASK),
cce2d453	50	CACHE_OC_ADDRESS_ARRAY \| (v & 0x00000ff0) \| 0x00000008);
9d4436a6 YS	51	}
9d4436a6 YS	52
109b44a8	53	static void sh2__flush_invalidate_region(void *start, int size)
9d4436a6	54	{
cce2d453 YS	55	#ifdef CONFIG_CACHE_WRITEBACK
	56	/*
	57	* SH-2 does not support individual line invalidation, only a
	58	* global invalidate.
	59	*/
	60	unsigned long ccr;
	61	unsigned long flags;
	62	local_irq_save(flags);
	63	jump_to_uncached();
	64
a5f6ea29	65	ccr = __raw_readl(SH_CCR);
cce2d453	66	ccr \|= CCR_CACHE_INVALIDATE;
a5f6ea29	67	__raw_writel(ccr, SH_CCR);
cce2d453 YS	68
	69	back_to_cached();
	70	local_irq_restore(flags);
	71	#else
9d4436a6 YS	72	unsigned long v;
	73	unsigned long begin, end;
	74
	75	begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
	76	end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
	77	& ~(L1_CACHE_BYTES-1);
1da177e4	78
cce2d453	79	for (v = begin; v < end; v+=L1_CACHE_BYTES)
9d56dd3b	80	__raw_writel((v & CACHE_PHYSADDR_MASK),
cce2d453 YS	81	CACHE_OC_ADDRESS_ARRAY \| (v & 0x00000ff0) \| 0x00000008);
	82	#endif
	83	}
109b44a8 PM	84
	85	void __init sh2_cache_init(void)
	86	{
	87	__flush_wback_region = sh2__flush_wback_region;
	88	__flush_purge_region = sh2__flush_purge_region;
	89	__flush_invalidate_region = sh2__flush_invalidate_region;
	90	}