[mirror_ubuntu-focal-kernel.git] / arch / sparc / include / asm / irq_64.h

/* SPDX-License-Identifier: GPL-2.0 */
/* irq.h: IRQ registers on the 64-bit Sparc.
 *
 * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
 * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
 */

#ifndef _SPARC64_IRQ_H
#define _SPARC64_IRQ_H

#include <linux/linkage.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <asm/pil.h>
#include <asm/ptrace.h>

/* IMAP/ICLR register defines */
#define IMAP_VALID		0x80000000UL	/* IRQ Enabled		*/
#define IMAP_TID_UPA		0x7c000000UL	/* UPA TargetID		*/
#define IMAP_TID_JBUS		0x7c000000UL	/* JBUS TargetID	*/
#define IMAP_TID_SHIFT		26
#define IMAP_AID_SAFARI		0x7c000000UL	/* Safari AgentID	*/
#define IMAP_AID_SHIFT		26
#define IMAP_NID_SAFARI		0x03e00000UL	/* Safari NodeID	*/
#define IMAP_NID_SHIFT		21
#define IMAP_IGN		0x000007c0UL	/* IRQ Group Number	*/
#define IMAP_INO		0x0000003fUL	/* IRQ Number		*/
#define IMAP_INR		0x000007ffUL	/* Full interrupt number*/

#define ICLR_IDLE		0x00000000UL	/* Idle state		*/
#define ICLR_TRANSMIT		0x00000001UL	/* Transmit state	*/
#define ICLR_PENDING		0x00000003UL	/* Pending state	*/

/* The largest number of unique interrupt sources we support.
 * If this needs to ever be larger than 255, you need to change
 * the type of ino_bucket->irq as appropriate.
 *
 * ino_bucket->irq allocation is made during {sun4v_,}build_irq().
 */
#define NR_IRQS		(2048)

void irq_install_pre_handler(int irq,
			     void (*func)(unsigned int, void *, void *),
			     void *arg1, void *arg2);
#define irq_canonicalize(irq)	(irq)
unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap);
unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino);
unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino);
unsigned int sun4v_build_msi(u32 devhandle, unsigned int *irq_p,
			     unsigned int msi_devino_start,
			     unsigned int msi_devino_end);
void sun4v_destroy_msi(unsigned int irq);
unsigned int sun4u_build_msi(u32 portid, unsigned int *irq_p,
			     unsigned int msi_devino_start,
			     unsigned int msi_devino_end,
			     unsigned long imap_base,
			     unsigned long iclr_base);
void sun4u_destroy_msi(unsigned int irq);

unsigned int irq_alloc(unsigned int dev_handle, unsigned int dev_ino);
void irq_free(unsigned int irq);

void __init init_IRQ(void);
void fixup_irqs(void);

static inline void set_softint(unsigned long bits)
{
	__asm__ __volatile__("wr	%0, 0x0, %%set_softint"
			     : /* No outputs */
			     : "r" (bits));
}

static inline void clear_softint(unsigned long bits)
{
	__asm__ __volatile__("wr	%0, 0x0, %%clear_softint"
			     : /* No outputs */
			     : "r" (bits));
}

static inline unsigned long get_softint(void)
{
	unsigned long retval;

	__asm__ __volatile__("rd	%%softint, %0"
			     : "=r" (retval));
	return retval;
}

void arch_trigger_cpumask_backtrace(const struct cpumask *mask,
				    bool exclude_self);
#define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace

extern void *hardirq_stack[NR_CPUS];
extern void *softirq_stack[NR_CPUS];
#define __ARCH_HAS_DO_SOFTIRQ

#define NO_IRQ		0xffffffff

#endif
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
f5e706ad SR	2	/* irq.h: IRQ registers on the 64-bit Sparc.
	3	*
	4	* Copyright (C) 1996 David S. Miller (davem@davemloft.net)
	5	* Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
	6	*/
	7
	8	#ifndef _SPARC64_IRQ_H
	9	#define _SPARC64_IRQ_H
	10
	11	#include <linux/linkage.h>
	12	#include <linux/kernel.h>
	13	#include <linux/errno.h>
	14	#include <linux/interrupt.h>
	15	#include <asm/pil.h>
	16	#include <asm/ptrace.h>
	17
	18	/* IMAP/ICLR register defines */
	19	#define IMAP_VALID 0x80000000UL /* IRQ Enabled */
	20	#define IMAP_TID_UPA 0x7c000000UL /* UPA TargetID */
	21	#define IMAP_TID_JBUS 0x7c000000UL /* JBUS TargetID */
	22	#define IMAP_TID_SHIFT 26
	23	#define IMAP_AID_SAFARI 0x7c000000UL /* Safari AgentID */
	24	#define IMAP_AID_SHIFT 26
	25	#define IMAP_NID_SAFARI 0x03e00000UL /* Safari NodeID */
	26	#define IMAP_NID_SHIFT 21
	27	#define IMAP_IGN 0x000007c0UL /* IRQ Group Number */
	28	#define IMAP_INO 0x0000003fUL /* IRQ Number */
	29	#define IMAP_INR 0x000007ffUL /* Full interrupt number*/
	30
	31	#define ICLR_IDLE 0x00000000UL /* Idle state */
	32	#define ICLR_TRANSMIT 0x00000001UL /* Transmit state */
	33	#define ICLR_PENDING 0x00000003UL /* Pending state */
	34
	35	/* The largest number of unique interrupt sources we support.
	36	* If this needs to ever be larger than 255, you need to change
44ed3c0c	37	* the type of ino_bucket->irq as appropriate.
f5e706ad	38	*
44ed3c0c	39	* ino_bucket->irq allocation is made during {sun4v_,}build_irq().
f5e706ad	40	*/
ee6a9333	41	#define NR_IRQS (2048)
f5e706ad	42
f05a6865 SR	43	void irq_install_pre_handler(int irq,
	44	void (func)(unsigned int, void , void *),
	45	void arg1, void arg2);
f5e706ad	46	#define irq_canonicalize(irq) (irq)
f05a6865 SR	47	unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap);
	48	unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino);
	49	unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino);
	50	unsigned int sun4v_build_msi(u32 devhandle, unsigned int *irq_p,
	51	unsigned int msi_devino_start,
	52	unsigned int msi_devino_end);
	53	void sun4v_destroy_msi(unsigned int irq);
	54	unsigned int sun4u_build_msi(u32 portid, unsigned int *irq_p,
	55	unsigned int msi_devino_start,
	56	unsigned int msi_devino_end,
	57	unsigned long imap_base,
	58	unsigned long iclr_base);
	59	void sun4u_destroy_msi(unsigned int irq);
	60
ee6a9333	61	unsigned int irq_alloc(unsigned int dev_handle, unsigned int dev_ino);
f05a6865	62	void irq_free(unsigned int irq);
f5e706ad	63
f05a6865 SR	64	void __init init_IRQ(void);
f05a6865 SR	65	void fixup_irqs(void);
f5e706ad SR	66
	67	static inline void set_softint(unsigned long bits)
	68	{
	69	__asm__ __volatile__("wr %0, 0x0, %%set_softint"
	70	: /* No outputs */
	71	: "r" (bits));
	72	}
	73
	74	static inline void clear_softint(unsigned long bits)
	75	{
	76	__asm__ __volatile__("wr %0, 0x0, %%clear_softint"
	77	: /* No outputs */
	78	: "r" (bits));
	79	}
	80
	81	static inline unsigned long get_softint(void)
	82	{
	83	unsigned long retval;
	84
	85	__asm__ __volatile__("rd %%softint, %0"
	86	: "=r" (retval));
	87	return retval;
	88	}
	89
9a01c3ed CM	90	void arch_trigger_cpumask_backtrace(const struct cpumask *mask,
	91	bool exclude_self);
	92	#define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace
09ee167c	93
4f70f7a9 DM	94	extern void *hardirq_stack[NR_CPUS];
	95	extern void *softirq_stack[NR_CPUS];
	96	#define __ARCH_HAS_DO_SOFTIRQ
	97
16550680 DM	98	#define NO_IRQ 0xffffffff
16550680 DM	99
f5e706ad	100	#endif