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cdd6c482 IM |
1 | #ifndef __ASM_SPARC_PERF_EVENT_H |
2 | #define __ASM_SPARC_PERF_EVENT_H | |
3 | ||
cdd6c482 | 4 | #ifdef CONFIG_PERF_EVENTS |
b0f82b81 FW |
5 | #include <asm/ptrace.h> |
6 | ||
b11287e8 DM |
7 | #define perf_arch_fetch_caller_regs(regs, ip) \ |
8 | do { \ | |
9 | unsigned long _pstate, _asi, _pil, _i7, _fp; \ | |
10 | __asm__ __volatile__("rdpr %%pstate, %0\n\t" \ | |
11 | "rd %%asi, %1\n\t" \ | |
12 | "rdpr %%pil, %2\n\t" \ | |
13 | "mov %%i7, %3\n\t" \ | |
14 | "mov %%i6, %4\n\t" \ | |
15 | : "=r" (_pstate), \ | |
16 | "=r" (_asi), \ | |
17 | "=r" (_pil), \ | |
18 | "=r" (_i7), \ | |
19 | "=r" (_fp)); \ | |
20 | (regs)->tstate = (_pstate << 8) | \ | |
21 | (_asi << 24) | (_pil << 20); \ | |
22 | (regs)->tpc = (ip); \ | |
23 | (regs)->tnpc = (regs)->tpc + 4; \ | |
24 | (regs)->u_regs[UREG_I6] = _fp; \ | |
25 | (regs)->u_regs[UREG_I7] = _i7; \ | |
26 | } while (0) | |
cdd6c482 IM |
27 | #endif |
28 | ||
29 | #endif |