]>
Commit | Line | Data |
---|---|---|
f5e706ad | 1 | /* |
a439fe51 | 2 | * include/asm/processor.h |
f5e706ad SR |
3 | * |
4 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | |
5 | */ | |
6 | ||
7 | #ifndef __ASM_SPARC64_PROCESSOR_H | |
8 | #define __ASM_SPARC64_PROCESSOR_H | |
9 | ||
10 | /* | |
11 | * Sparc64 implementation of macro that returns current | |
12 | * instruction pointer ("program counter"). | |
13 | */ | |
14 | #define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; }) | |
15 | ||
16 | #include <asm/asi.h> | |
17 | #include <asm/pstate.h> | |
18 | #include <asm/ptrace.h> | |
19 | #include <asm/page.h> | |
20 | ||
d550bbd4 DH |
21 | /* Don't hold the runqueue lock over context switch */ |
22 | #define __ARCH_WANT_UNLOCKED_CTXSW | |
23 | ||
f5e706ad SR |
24 | /* The sparc has no problems with write protection */ |
25 | #define wp_works_ok 1 | |
26 | #define wp_works_ok__is_a_macro /* for versions in ksyms.c */ | |
27 | ||
28 | /* | |
29 | * User lives in his very own context, and cannot reference us. Note | |
30 | * that TASK_SIZE is a misnomer, it really gives maximum user virtual | |
31 | * address that the kernel will allocate out. | |
32 | * | |
33 | * XXX No longer using virtual page tables, kill this upper limit... | |
34 | */ | |
35 | #define VA_BITS 44 | |
36 | #ifndef __ASSEMBLY__ | |
37 | #define VPTE_SIZE (1UL << (VA_BITS - PAGE_SHIFT + 3)) | |
38 | #else | |
39 | #define VPTE_SIZE (1 << (VA_BITS - PAGE_SHIFT + 3)) | |
40 | #endif | |
41 | ||
f5e706ad SR |
42 | #define TASK_SIZE_OF(tsk) \ |
43 | (test_tsk_thread_flag(tsk,TIF_32BIT) ? \ | |
a1995a65 | 44 | (1UL << 32UL) : ((unsigned long)-VPTE_SIZE)) |
c5389831 DM |
45 | #define TASK_SIZE \ |
46 | (test_thread_flag(TIF_32BIT) ? \ | |
47 | (1UL << 32UL) : ((unsigned long)-VPTE_SIZE)) | |
f5e706ad SR |
48 | #ifdef __KERNEL__ |
49 | ||
50 | #define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE) | |
51 | #define STACK_TOP64 (0x0000080000000000UL - (1UL << 32UL)) | |
52 | ||
53 | #define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ | |
54 | STACK_TOP32 : STACK_TOP64) | |
55 | ||
56 | #define STACK_TOP_MAX STACK_TOP64 | |
57 | ||
58 | #endif | |
59 | ||
60 | #ifndef __ASSEMBLY__ | |
61 | ||
62 | typedef struct { | |
63 | unsigned char seg; | |
64 | } mm_segment_t; | |
65 | ||
66 | /* The Sparc processor specific thread struct. */ | |
67 | /* XXX This should die, everything can go into thread_info now. */ | |
68 | struct thread_struct { | |
69 | #ifdef CONFIG_DEBUG_SPINLOCK | |
70 | /* How many spinlocks held by this thread. | |
71 | * Used with spin lock debugging to catch tasks | |
72 | * sleeping illegally with locks held. | |
73 | */ | |
74 | int smp_lock_count; | |
75 | unsigned int smp_lock_pc; | |
76 | #else | |
77 | int dummy; /* f'in gcc bug... */ | |
78 | #endif | |
79 | }; | |
80 | ||
81 | #endif /* !(__ASSEMBLY__) */ | |
82 | ||
83 | #ifndef CONFIG_DEBUG_SPINLOCK | |
84 | #define INIT_THREAD { \ | |
85 | 0, \ | |
86 | } | |
87 | #else /* CONFIG_DEBUG_SPINLOCK */ | |
88 | #define INIT_THREAD { \ | |
89 | /* smp_lock_count, smp_lock_pc, */ \ | |
90 | 0, 0, \ | |
91 | } | |
92 | #endif /* !(CONFIG_DEBUG_SPINLOCK) */ | |
93 | ||
94 | #ifndef __ASSEMBLY__ | |
95 | ||
96 | #include <linux/types.h> | |
5230429a | 97 | #include <asm/fpumacro.h> |
f5e706ad SR |
98 | |
99 | /* Return saved PC of a blocked thread. */ | |
100 | struct task_struct; | |
101 | extern unsigned long thread_saved_pc(struct task_struct *); | |
102 | ||
103 | /* On Uniprocessor, even in RMO processes see TSO semantics */ | |
104 | #ifdef CONFIG_SMP | |
105 | #define TSTATE_INITIAL_MM TSTATE_TSO | |
106 | #else | |
107 | #define TSTATE_INITIAL_MM TSTATE_RMO | |
108 | #endif | |
109 | ||
110 | /* Do necessary setup to start up a newly executed thread. */ | |
111 | #define start_thread(regs, pc, sp) \ | |
112 | do { \ | |
113 | unsigned long __asi = ASI_PNF; \ | |
114 | regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \ | |
115 | regs->tpc = ((pc & (~3)) - 4); \ | |
116 | regs->tnpc = regs->tpc + 4; \ | |
117 | regs->y = 0; \ | |
118 | set_thread_wstate(1 << 3); \ | |
119 | if (current_thread_info()->utraps) { \ | |
120 | if (*(current_thread_info()->utraps) < 2) \ | |
121 | kfree(current_thread_info()->utraps); \ | |
122 | else \ | |
123 | (*(current_thread_info()->utraps))--; \ | |
124 | current_thread_info()->utraps = NULL; \ | |
125 | } \ | |
126 | __asm__ __volatile__( \ | |
127 | "stx %%g0, [%0 + %2 + 0x00]\n\t" \ | |
128 | "stx %%g0, [%0 + %2 + 0x08]\n\t" \ | |
129 | "stx %%g0, [%0 + %2 + 0x10]\n\t" \ | |
130 | "stx %%g0, [%0 + %2 + 0x18]\n\t" \ | |
131 | "stx %%g0, [%0 + %2 + 0x20]\n\t" \ | |
132 | "stx %%g0, [%0 + %2 + 0x28]\n\t" \ | |
133 | "stx %%g0, [%0 + %2 + 0x30]\n\t" \ | |
134 | "stx %%g0, [%0 + %2 + 0x38]\n\t" \ | |
135 | "stx %%g0, [%0 + %2 + 0x40]\n\t" \ | |
136 | "stx %%g0, [%0 + %2 + 0x48]\n\t" \ | |
137 | "stx %%g0, [%0 + %2 + 0x50]\n\t" \ | |
138 | "stx %%g0, [%0 + %2 + 0x58]\n\t" \ | |
139 | "stx %%g0, [%0 + %2 + 0x60]\n\t" \ | |
140 | "stx %%g0, [%0 + %2 + 0x68]\n\t" \ | |
141 | "stx %1, [%0 + %2 + 0x70]\n\t" \ | |
142 | "stx %%g0, [%0 + %2 + 0x78]\n\t" \ | |
143 | "wrpr %%g0, (1 << 3), %%wstate\n\t" \ | |
144 | : \ | |
145 | : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \ | |
146 | "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ | |
5230429a AV |
147 | fprs_write(0); \ |
148 | current_thread_info()->xfsr[0] = 0; \ | |
149 | current_thread_info()->fpsaved[0] = 0; \ | |
150 | regs->tstate &= ~TSTATE_PEF; \ | |
f5e706ad SR |
151 | } while (0) |
152 | ||
153 | #define start_thread32(regs, pc, sp) \ | |
154 | do { \ | |
155 | unsigned long __asi = ASI_PNF; \ | |
156 | pc &= 0x00000000ffffffffUL; \ | |
157 | sp &= 0x00000000ffffffffUL; \ | |
158 | regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \ | |
159 | regs->tpc = ((pc & (~3)) - 4); \ | |
160 | regs->tnpc = regs->tpc + 4; \ | |
161 | regs->y = 0; \ | |
162 | set_thread_wstate(2 << 3); \ | |
163 | if (current_thread_info()->utraps) { \ | |
164 | if (*(current_thread_info()->utraps) < 2) \ | |
165 | kfree(current_thread_info()->utraps); \ | |
166 | else \ | |
167 | (*(current_thread_info()->utraps))--; \ | |
168 | current_thread_info()->utraps = NULL; \ | |
169 | } \ | |
170 | __asm__ __volatile__( \ | |
171 | "stx %%g0, [%0 + %2 + 0x00]\n\t" \ | |
172 | "stx %%g0, [%0 + %2 + 0x08]\n\t" \ | |
173 | "stx %%g0, [%0 + %2 + 0x10]\n\t" \ | |
174 | "stx %%g0, [%0 + %2 + 0x18]\n\t" \ | |
175 | "stx %%g0, [%0 + %2 + 0x20]\n\t" \ | |
176 | "stx %%g0, [%0 + %2 + 0x28]\n\t" \ | |
177 | "stx %%g0, [%0 + %2 + 0x30]\n\t" \ | |
178 | "stx %%g0, [%0 + %2 + 0x38]\n\t" \ | |
179 | "stx %%g0, [%0 + %2 + 0x40]\n\t" \ | |
180 | "stx %%g0, [%0 + %2 + 0x48]\n\t" \ | |
181 | "stx %%g0, [%0 + %2 + 0x50]\n\t" \ | |
182 | "stx %%g0, [%0 + %2 + 0x58]\n\t" \ | |
183 | "stx %%g0, [%0 + %2 + 0x60]\n\t" \ | |
184 | "stx %%g0, [%0 + %2 + 0x68]\n\t" \ | |
185 | "stx %1, [%0 + %2 + 0x70]\n\t" \ | |
186 | "stx %%g0, [%0 + %2 + 0x78]\n\t" \ | |
187 | "wrpr %%g0, (2 << 3), %%wstate\n\t" \ | |
188 | : \ | |
189 | : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \ | |
190 | "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ | |
5230429a AV |
191 | fprs_write(0); \ |
192 | current_thread_info()->xfsr[0] = 0; \ | |
193 | current_thread_info()->fpsaved[0] = 0; \ | |
194 | regs->tstate &= ~TSTATE_PEF; \ | |
f5e706ad SR |
195 | } while (0) |
196 | ||
197 | /* Free all resources held by a thread. */ | |
198 | #define release_thread(tsk) do { } while (0) | |
199 | ||
f5e706ad SR |
200 | extern unsigned long get_wchan(struct task_struct *task); |
201 | ||
202 | #define task_pt_regs(tsk) (task_thread_info(tsk)->kregs) | |
203 | #define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc) | |
204 | #define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP]) | |
205 | ||
187818cd DM |
206 | /* Please see the commentary in asm/backoff.h for a description of |
207 | * what these instructions are doing and how they have been choosen. | |
208 | * To make a long story short, we are trying to yield the current cpu | |
209 | * strand during busy loops. | |
210 | */ | |
e9b9eb59 DM |
211 | #define cpu_relax() asm volatile("\n99:\n\t" \ |
212 | "rd %%ccr, %%g0\n\t" \ | |
213 | "rd %%ccr, %%g0\n\t" \ | |
214 | "rd %%ccr, %%g0\n\t" \ | |
187818cd | 215 | ".section .pause_3insn_patch,\"ax\"\n\t"\ |
e9b9eb59 DM |
216 | ".word 99b\n\t" \ |
217 | "wr %%g0, 128, %%asr27\n\t" \ | |
218 | "nop\n\t" \ | |
219 | "nop\n\t" \ | |
220 | ".previous" \ | |
270c10e0 | 221 | ::: "memory") |
f5e706ad SR |
222 | |
223 | /* Prefetch support. This is tuned for UltraSPARC-III and later. | |
224 | * UltraSPARC-I will treat these as nops, and UltraSPARC-II has | |
225 | * a shallower prefetch queue than later chips. | |
226 | */ | |
227 | #define ARCH_HAS_PREFETCH | |
228 | #define ARCH_HAS_PREFETCHW | |
229 | #define ARCH_HAS_SPINLOCK_PREFETCH | |
230 | ||
231 | static inline void prefetch(const void *x) | |
232 | { | |
233 | /* We do not use the read prefetch mnemonic because that | |
234 | * prefetches into the prefetch-cache which only is accessible | |
235 | * by floating point operations in UltraSPARC-III and later. | |
236 | * By contrast, "#one_write" prefetches into the L2 cache | |
237 | * in shared state. | |
238 | */ | |
239 | __asm__ __volatile__("prefetch [%0], #one_write" | |
240 | : /* no outputs */ | |
241 | : "r" (x)); | |
242 | } | |
243 | ||
244 | static inline void prefetchw(const void *x) | |
245 | { | |
246 | /* The most optimal prefetch to use for writes is | |
247 | * "#n_writes". This brings the cacheline into the | |
248 | * L2 cache in "owned" state. | |
249 | */ | |
250 | __asm__ __volatile__("prefetch [%0], #n_writes" | |
251 | : /* no outputs */ | |
252 | : "r" (x)); | |
253 | } | |
254 | ||
255 | #define spin_lock_prefetch(x) prefetchw(x) | |
256 | ||
257 | #define HAVE_ARCH_PICK_MMAP_LAYOUT | |
258 | ||
259 | #endif /* !(__ASSEMBLY__) */ | |
260 | ||
261 | #endif /* !(__ASM_SPARC64_PROCESSOR_H) */ |