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f3ec38d5 SR |
1 | #ifndef __SPARC_PTRACE_H |
2 | #define __SPARC_PTRACE_H | |
3 | ||
54579826 | 4 | #include <uapi/asm/ptrace.h> |
f3ec38d5 SR |
5 | |
6 | #if defined(__sparc__) && defined(__arch64__) | |
f3ec38d5 SR |
7 | #ifndef __ASSEMBLY__ |
8 | ||
f3ec38d5 | 9 | #include <linux/threads.h> |
7f55ba9c | 10 | #include <asm/switch_to.h> |
f3ec38d5 SR |
11 | |
12 | static inline int pt_regs_trap_type(struct pt_regs *regs) | |
13 | { | |
14 | return regs->magic & 0x1ff; | |
15 | } | |
16 | ||
17 | static inline bool pt_regs_is_syscall(struct pt_regs *regs) | |
18 | { | |
19 | return (regs->tstate & TSTATE_SYSCALL); | |
20 | } | |
21 | ||
22 | static inline bool pt_regs_clear_syscall(struct pt_regs *regs) | |
23 | { | |
24 | return (regs->tstate &= ~TSTATE_SYSCALL); | |
25 | } | |
26 | ||
27 | #define arch_ptrace_stop_needed(exit_code, info) \ | |
28 | ({ flush_user_windows(); \ | |
29 | get_thread_wsaved() != 0; \ | |
30 | }) | |
31 | ||
32 | #define arch_ptrace_stop(exit_code, info) \ | |
33 | synchronize_user_stack() | |
34 | ||
1918c7f5 AV |
35 | #define current_pt_regs() \ |
36 | ((struct pt_regs *)((unsigned long)current_thread_info() + THREAD_SIZE) - 1) | |
37 | ||
f3ec38d5 SR |
38 | struct global_reg_snapshot { |
39 | unsigned long tstate; | |
40 | unsigned long tpc; | |
41 | unsigned long tnpc; | |
42 | unsigned long o7; | |
43 | unsigned long i7; | |
44 | unsigned long rpc; | |
45 | struct thread_info *thread; | |
46 | unsigned long pad1; | |
47 | }; | |
916ca14a DM |
48 | |
49 | struct global_pmu_snapshot { | |
50 | unsigned long pcr[4]; | |
51 | unsigned long pic[4]; | |
52 | }; | |
53 | ||
54 | union global_cpu_snapshot { | |
55 | struct global_reg_snapshot reg; | |
56 | struct global_pmu_snapshot pmu; | |
57 | }; | |
58 | ||
59 | extern union global_cpu_snapshot global_cpu_snapshot[NR_CPUS]; | |
f3ec38d5 | 60 | |
dff933da | 61 | #define force_successful_syscall_return() set_thread_noerror(1) |
f3ec38d5 SR |
62 | #define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV)) |
63 | #define instruction_pointer(regs) ((regs)->tpc) | |
e8f4aa60 AP |
64 | #define instruction_pointer_set(regs, val) do { \ |
65 | (regs)->tpc = (val); \ | |
66 | (regs)->tnpc = (val)+4; \ | |
67 | } while (0) | |
f3ec38d5 | 68 | #define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) |
d7e7528b EP |
69 | static inline int is_syscall_success(struct pt_regs *regs) |
70 | { | |
71 | return !(regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY)); | |
72 | } | |
73 | ||
74 | static inline long regs_return_value(struct pt_regs *regs) | |
75 | { | |
76 | return regs->u_regs[UREG_I0]; | |
77 | } | |
f3ec38d5 | 78 | #ifdef CONFIG_SMP |
f05a6865 | 79 | unsigned long profile_pc(struct pt_regs *); |
f3ec38d5 SR |
80 | #else |
81 | #define profile_pc(regs) instruction_pointer(regs) | |
1da177e4 | 82 | #endif |
e8f4aa60 AP |
83 | |
84 | #define MAX_REG_OFFSET (offsetof(struct pt_regs, magic)) | |
85 | ||
86 | extern int regs_query_register_offset(const char *name); | |
87 | ||
88 | /** | |
89 | * regs_get_register() - get register value from its offset | |
90 | * @regs: pt_regs from which register value is gotten | |
91 | * @offset: offset number of the register. | |
92 | * | |
93 | * regs_get_register returns the value of a register whose | |
94 | * offset from @regs. The @offset is the offset of the register | |
95 | * in struct pt_regs. If @offset is bigger than MAX_REG_OFFSET, | |
96 | * this returns 0. | |
97 | */ | |
98 | static inline unsigned long regs_get_register(struct pt_regs *regs, | |
99 | unsigned long offset) | |
100 | { | |
101 | if (unlikely(offset >= MAX_REG_OFFSET)) | |
102 | return 0; | |
103 | if (offset == PT_V9_Y) | |
104 | return *(unsigned int *)((unsigned long)regs + offset); | |
105 | return *(unsigned long *)((unsigned long)regs + offset); | |
106 | } | |
107 | ||
108 | /* Valid only for Kernel mode traps. */ | |
109 | static inline unsigned long kernel_stack_pointer(struct pt_regs *regs) | |
110 | { | |
111 | return regs->u_regs[UREG_I6]; | |
112 | } | |
f3ec38d5 | 113 | #else /* __ASSEMBLY__ */ |
f3ec38d5 | 114 | #endif /* __ASSEMBLY__ */ |
f3ec38d5 | 115 | #else /* (defined(__sparc__) && defined(__arch64__)) */ |
f3ec38d5 | 116 | #ifndef __ASSEMBLY__ |
bde4d8b2 | 117 | #include <asm/switch_to.h> |
f3ec38d5 | 118 | |
f3ec38d5 SR |
119 | static inline bool pt_regs_is_syscall(struct pt_regs *regs) |
120 | { | |
121 | return (regs->psr & PSR_SYSCALL); | |
122 | } | |
123 | ||
124 | static inline bool pt_regs_clear_syscall(struct pt_regs *regs) | |
125 | { | |
126 | return (regs->psr &= ~PSR_SYSCALL); | |
127 | } | |
128 | ||
129 | #define arch_ptrace_stop_needed(exit_code, info) \ | |
130 | ({ flush_user_windows(); \ | |
131 | current_thread_info()->w_saved != 0; \ | |
132 | }) | |
133 | ||
134 | #define arch_ptrace_stop(exit_code, info) \ | |
135 | synchronize_user_stack() | |
136 | ||
ab348681 AV |
137 | #define current_pt_regs() \ |
138 | ((struct pt_regs *)((unsigned long)current_thread_info() + THREAD_SIZE) - 1) | |
139 | ||
f3ec38d5 SR |
140 | #define user_mode(regs) (!((regs)->psr & PSR_PS)) |
141 | #define instruction_pointer(regs) ((regs)->pc) | |
142 | #define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) | |
143 | unsigned long profile_pc(struct pt_regs *); | |
f3ec38d5 | 144 | #else /* (!__ASSEMBLY__) */ |
f3ec38d5 | 145 | #endif /* (!__ASSEMBLY__) */ |
f3ec38d5 | 146 | #endif /* (defined(__sparc__) && defined(__arch64__)) */ |
f3ec38d5 | 147 | #define STACK_BIAS 2047 |
f3ec38d5 SR |
148 | |
149 | /* global_reg_snapshot offsets */ | |
150 | #define GR_SNAP_TSTATE 0x00 | |
151 | #define GR_SNAP_TPC 0x08 | |
152 | #define GR_SNAP_TNPC 0x10 | |
153 | #define GR_SNAP_O7 0x18 | |
154 | #define GR_SNAP_I7 0x20 | |
155 | #define GR_SNAP_RPC 0x28 | |
156 | #define GR_SNAP_THREAD 0x30 | |
157 | #define GR_SNAP_PAD1 0x38 | |
158 | ||
f3ec38d5 | 159 | #endif /* !(__SPARC_PTRACE_H) */ |