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Commit | Line | Data |
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88278ca2 | 1 | /* |
1da177e4 LT |
2 | * ioport.c: Simple io mapping allocator. |
3 | * | |
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | |
5 | * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx) | |
6 | * | |
7 | * 1996: sparc_free_io, 1999: ioremap()/iounmap() by Pete Zaitcev. | |
8 | * | |
9 | * 2000/01/29 | |
10 | * <rth> zait: as long as pci_alloc_consistent produces something addressable, | |
11 | * things are ok. | |
12 | * <zaitcev> rth: no, it is relevant, because get_free_pages returns you a | |
13 | * pointer into the big page mapping | |
14 | * <rth> zait: so what? | |
15 | * <rth> zait: remap_it_my_way(virt_to_phys(get_free_page())) | |
16 | * <zaitcev> Hmm | |
17 | * <zaitcev> Suppose I did this remap_it_my_way(virt_to_phys(get_free_page())). | |
18 | * So far so good. | |
19 | * <zaitcev> Now, driver calls pci_free_consistent(with result of | |
20 | * remap_it_my_way()). | |
21 | * <zaitcev> How do you find the address to pass to free_pages()? | |
22 | * <rth> zait: walk the page tables? It's only two or three level after all. | |
23 | * <rth> zait: you have to walk them anyway to remove the mapping. | |
24 | * <zaitcev> Hmm | |
25 | * <zaitcev> Sounds reasonable | |
26 | */ | |
27 | ||
3ca9fab4 | 28 | #include <linux/module.h> |
1da177e4 LT |
29 | #include <linux/sched.h> |
30 | #include <linux/kernel.h> | |
31 | #include <linux/errno.h> | |
32 | #include <linux/types.h> | |
33 | #include <linux/ioport.h> | |
34 | #include <linux/mm.h> | |
35 | #include <linux/slab.h> | |
36 | #include <linux/pci.h> /* struct pci_dev */ | |
37 | #include <linux/proc_fs.h> | |
0912a5db | 38 | #include <linux/scatterlist.h> |
1da177e4 LT |
39 | |
40 | #include <asm/io.h> | |
41 | #include <asm/vaddrs.h> | |
42 | #include <asm/oplib.h> | |
576c352e | 43 | #include <asm/prom.h> |
3ca9fab4 | 44 | #include <asm/of_device.h> |
576c352e | 45 | #include <asm/sbus.h> |
1da177e4 LT |
46 | #include <asm/page.h> |
47 | #include <asm/pgalloc.h> | |
48 | #include <asm/dma.h> | |
49 | ||
50 | #define mmu_inval_dma_area(p, l) /* Anton pulled it out for 2.4.0-xx */ | |
51 | ||
52 | struct resource *_sparc_find_resource(struct resource *r, unsigned long); | |
53 | ||
54 | static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz); | |
55 | static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys, | |
56 | unsigned long size, char *name); | |
57 | static void _sparc_free_io(struct resource *res); | |
58 | ||
59 | /* This points to the next to use virtual memory for DVMA mappings */ | |
60 | static struct resource _sparc_dvma = { | |
61 | .name = "sparc_dvma", .start = DVMA_VADDR, .end = DVMA_END - 1 | |
62 | }; | |
63 | /* This points to the start of I/O mappings, cluable from outside. */ | |
64 | /*ext*/ struct resource sparc_iomap = { | |
65 | .name = "sparc_iomap", .start = IOBASE_VADDR, .end = IOBASE_END - 1 | |
66 | }; | |
67 | ||
68 | /* | |
69 | * Our mini-allocator... | |
70 | * Boy this is gross! We need it because we must map I/O for | |
71 | * timers and interrupt controller before the kmalloc is available. | |
72 | */ | |
73 | ||
74 | #define XNMLN 15 | |
75 | #define XNRES 10 /* SS-10 uses 8 */ | |
76 | ||
77 | struct xresource { | |
78 | struct resource xres; /* Must be first */ | |
79 | int xflag; /* 1 == used */ | |
80 | char xname[XNMLN+1]; | |
81 | }; | |
82 | ||
83 | static struct xresource xresv[XNRES]; | |
84 | ||
85 | static struct xresource *xres_alloc(void) { | |
86 | struct xresource *xrp; | |
87 | int n; | |
88 | ||
89 | xrp = xresv; | |
90 | for (n = 0; n < XNRES; n++) { | |
91 | if (xrp->xflag == 0) { | |
92 | xrp->xflag = 1; | |
93 | return xrp; | |
94 | } | |
95 | xrp++; | |
96 | } | |
97 | return NULL; | |
98 | } | |
99 | ||
100 | static void xres_free(struct xresource *xrp) { | |
101 | xrp->xflag = 0; | |
102 | } | |
103 | ||
104 | /* | |
105 | * These are typically used in PCI drivers | |
106 | * which are trying to be cross-platform. | |
107 | * | |
108 | * Bus type is always zero on IIep. | |
109 | */ | |
110 | void __iomem *ioremap(unsigned long offset, unsigned long size) | |
111 | { | |
112 | char name[14]; | |
113 | ||
114 | sprintf(name, "phys_%08x", (u32)offset); | |
115 | return _sparc_alloc_io(0, offset, size, name); | |
116 | } | |
117 | ||
118 | /* | |
119 | * Comlimentary to ioremap(). | |
120 | */ | |
121 | void iounmap(volatile void __iomem *virtual) | |
122 | { | |
123 | unsigned long vaddr = (unsigned long) virtual & PAGE_MASK; | |
124 | struct resource *res; | |
125 | ||
126 | if ((res = _sparc_find_resource(&sparc_iomap, vaddr)) == NULL) { | |
127 | printk("free_io/iounmap: cannot free %lx\n", vaddr); | |
128 | return; | |
129 | } | |
130 | _sparc_free_io(res); | |
131 | ||
132 | if ((char *)res >= (char*)xresv && (char *)res < (char *)&xresv[XNRES]) { | |
133 | xres_free((struct xresource *)res); | |
134 | } else { | |
135 | kfree(res); | |
136 | } | |
137 | } | |
138 | ||
139 | /* | |
140 | */ | |
141 | void __iomem *sbus_ioremap(struct resource *phyres, unsigned long offset, | |
142 | unsigned long size, char *name) | |
143 | { | |
144 | return _sparc_alloc_io(phyres->flags & 0xF, | |
145 | phyres->start + offset, size, name); | |
146 | } | |
147 | ||
3ca9fab4 DM |
148 | void __iomem *of_ioremap(struct resource *res, unsigned long offset, |
149 | unsigned long size, char *name) | |
150 | { | |
151 | return _sparc_alloc_io(res->flags & 0xF, | |
152 | res->start + offset, | |
153 | size, name); | |
154 | } | |
155 | EXPORT_SYMBOL(of_ioremap); | |
156 | ||
e3a411a3 | 157 | void of_iounmap(struct resource *res, void __iomem *base, unsigned long size) |
3ca9fab4 DM |
158 | { |
159 | iounmap(base); | |
160 | } | |
161 | EXPORT_SYMBOL(of_iounmap); | |
162 | ||
1da177e4 LT |
163 | /* |
164 | */ | |
165 | void sbus_iounmap(volatile void __iomem *addr, unsigned long size) | |
166 | { | |
167 | iounmap(addr); | |
168 | } | |
169 | ||
170 | /* | |
171 | * Meat of mapping | |
172 | */ | |
173 | static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys, | |
174 | unsigned long size, char *name) | |
175 | { | |
176 | static int printed_full; | |
177 | struct xresource *xres; | |
178 | struct resource *res; | |
179 | char *tack; | |
180 | int tlen; | |
181 | void __iomem *va; /* P3 diag */ | |
182 | ||
183 | if (name == NULL) name = "???"; | |
184 | ||
185 | if ((xres = xres_alloc()) != 0) { | |
186 | tack = xres->xname; | |
187 | res = &xres->xres; | |
188 | } else { | |
189 | if (!printed_full) { | |
190 | printk("ioremap: done with statics, switching to malloc\n"); | |
191 | printed_full = 1; | |
192 | } | |
193 | tlen = strlen(name); | |
194 | tack = kmalloc(sizeof (struct resource) + tlen + 1, GFP_KERNEL); | |
195 | if (tack == NULL) return NULL; | |
196 | memset(tack, 0, sizeof(struct resource)); | |
197 | res = (struct resource *) tack; | |
198 | tack += sizeof (struct resource); | |
199 | } | |
200 | ||
201 | strlcpy(tack, name, XNMLN+1); | |
202 | res->name = tack; | |
203 | ||
204 | va = _sparc_ioremap(res, busno, phys, size); | |
205 | /* printk("ioremap(0x%x:%08lx[0x%lx])=%p\n", busno, phys, size, va); */ /* P3 diag */ | |
206 | return va; | |
207 | } | |
208 | ||
209 | /* | |
210 | */ | |
211 | static void __iomem * | |
212 | _sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz) | |
213 | { | |
214 | unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK); | |
215 | ||
216 | if (allocate_resource(&sparc_iomap, res, | |
217 | (offset + sz + PAGE_SIZE-1) & PAGE_MASK, | |
218 | sparc_iomap.start, sparc_iomap.end, PAGE_SIZE, NULL, NULL) != 0) { | |
219 | /* Usually we cannot see printks in this case. */ | |
220 | prom_printf("alloc_io_res(%s): cannot occupy\n", | |
221 | (res->name != NULL)? res->name: "???"); | |
222 | prom_halt(); | |
223 | } | |
224 | ||
225 | pa &= PAGE_MASK; | |
226 | sparc_mapiorange(bus, pa, res->start, res->end - res->start + 1); | |
227 | ||
d75fc8bb | 228 | return (void __iomem *)(unsigned long)(res->start + offset); |
1da177e4 LT |
229 | } |
230 | ||
231 | /* | |
232 | * Comlimentary to _sparc_ioremap(). | |
233 | */ | |
234 | static void _sparc_free_io(struct resource *res) | |
235 | { | |
236 | unsigned long plen; | |
237 | ||
238 | plen = res->end - res->start + 1; | |
30d4d1ff | 239 | BUG_ON((plen & (PAGE_SIZE-1)) != 0); |
1da177e4 LT |
240 | sparc_unmapiorange(res->start, plen); |
241 | release_resource(res); | |
242 | } | |
243 | ||
244 | #ifdef CONFIG_SBUS | |
245 | ||
8fae097d DM |
246 | void sbus_set_sbus64(struct sbus_dev *sdev, int x) |
247 | { | |
1da177e4 LT |
248 | printk("sbus_set_sbus64: unsupported\n"); |
249 | } | |
250 | ||
8fae097d DM |
251 | extern unsigned int sun4d_build_irq(struct sbus_dev *sdev, int irq); |
252 | void __init sbus_fill_device_irq(struct sbus_dev *sdev) | |
253 | { | |
254 | struct linux_prom_irqs irqs[PROMINTR_MAX]; | |
255 | int len; | |
256 | ||
257 | len = prom_getproperty(sdev->prom_node, "intr", | |
258 | (char *)irqs, sizeof(irqs)); | |
259 | if (len != -1) { | |
260 | sdev->num_irqs = len / 8; | |
261 | if (sdev->num_irqs == 0) { | |
262 | sdev->irqs[0] = 0; | |
263 | } else if (sparc_cpu_model == sun4d) { | |
264 | for (len = 0; len < sdev->num_irqs; len++) | |
265 | sdev->irqs[len] = | |
266 | sun4d_build_irq(sdev, irqs[len].pri); | |
267 | } else { | |
268 | for (len = 0; len < sdev->num_irqs; len++) | |
269 | sdev->irqs[len] = irqs[len].pri; | |
270 | } | |
271 | } else { | |
272 | int interrupts[PROMINTR_MAX]; | |
273 | ||
274 | /* No "intr" node found-- check for "interrupts" node. | |
275 | * This node contains SBus interrupt levels, not IPLs | |
276 | * as in "intr", and no vector values. We convert | |
277 | * SBus interrupt levels to PILs (platform specific). | |
278 | */ | |
279 | len = prom_getproperty(sdev->prom_node, "interrupts", | |
280 | (char *)interrupts, sizeof(interrupts)); | |
281 | if (len == -1) { | |
282 | sdev->irqs[0] = 0; | |
283 | sdev->num_irqs = 0; | |
284 | } else { | |
285 | sdev->num_irqs = len / sizeof(int); | |
286 | for (len = 0; len < sdev->num_irqs; len++) { | |
287 | sdev->irqs[len] = | |
288 | sbint_to_irq(sdev, interrupts[len]); | |
289 | } | |
290 | } | |
291 | } | |
292 | } | |
293 | ||
1da177e4 LT |
294 | /* |
295 | * Allocate a chunk of memory suitable for DMA. | |
296 | * Typically devices use them for control blocks. | |
297 | * CPU may access them without any explicit flushing. | |
298 | * | |
299 | * XXX Some clever people know that sdev is not used and supply NULL. Watch. | |
300 | */ | |
301 | void *sbus_alloc_consistent(struct sbus_dev *sdev, long len, u32 *dma_addrp) | |
302 | { | |
303 | unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK; | |
304 | unsigned long va; | |
305 | struct resource *res; | |
306 | int order; | |
307 | ||
efad798b | 308 | /* XXX why are some lengths signed, others unsigned? */ |
1da177e4 LT |
309 | if (len <= 0) { |
310 | return NULL; | |
311 | } | |
312 | /* XXX So what is maxphys for us and how do drivers know it? */ | |
313 | if (len > 256*1024) { /* __get_free_pages() limit */ | |
314 | return NULL; | |
315 | } | |
316 | ||
317 | order = get_order(len_total); | |
f3d48f03 | 318 | if ((va = __get_free_pages(GFP_KERNEL|__GFP_COMP, order)) == 0) |
1da177e4 LT |
319 | goto err_nopages; |
320 | ||
c80892d1 | 321 | if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) |
1da177e4 | 322 | goto err_nomem; |
1da177e4 LT |
323 | |
324 | if (allocate_resource(&_sparc_dvma, res, len_total, | |
325 | _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) { | |
326 | printk("sbus_alloc_consistent: cannot occupy 0x%lx", len_total); | |
327 | goto err_nova; | |
328 | } | |
329 | mmu_inval_dma_area(va, len_total); | |
330 | // XXX The mmu_map_dma_area does this for us below, see comments. | |
331 | // sparc_mapiorange(0, virt_to_phys(va), res->start, len_total); | |
332 | /* | |
333 | * XXX That's where sdev would be used. Currently we load | |
334 | * all iommu tables with the same translations. | |
335 | */ | |
336 | if (mmu_map_dma_area(dma_addrp, va, res->start, len_total) != 0) | |
337 | goto err_noiommu; | |
338 | ||
4cfbd7eb MH |
339 | /* Set the resource name, if known. */ |
340 | if (sdev) { | |
341 | res->name = sdev->prom_name; | |
342 | } | |
343 | ||
d75fc8bb | 344 | return (void *)(unsigned long)res->start; |
1da177e4 LT |
345 | |
346 | err_noiommu: | |
347 | release_resource(res); | |
348 | err_nova: | |
349 | free_pages(va, order); | |
350 | err_nomem: | |
351 | kfree(res); | |
352 | err_nopages: | |
353 | return NULL; | |
354 | } | |
355 | ||
356 | void sbus_free_consistent(struct sbus_dev *sdev, long n, void *p, u32 ba) | |
357 | { | |
358 | struct resource *res; | |
359 | struct page *pgv; | |
360 | ||
361 | if ((res = _sparc_find_resource(&_sparc_dvma, | |
362 | (unsigned long)p)) == NULL) { | |
363 | printk("sbus_free_consistent: cannot free %p\n", p); | |
364 | return; | |
365 | } | |
366 | ||
367 | if (((unsigned long)p & (PAGE_SIZE-1)) != 0) { | |
368 | printk("sbus_free_consistent: unaligned va %p\n", p); | |
369 | return; | |
370 | } | |
371 | ||
372 | n = (n + PAGE_SIZE-1) & PAGE_MASK; | |
373 | if ((res->end-res->start)+1 != n) { | |
374 | printk("sbus_free_consistent: region 0x%lx asked 0x%lx\n", | |
375 | (long)((res->end-res->start)+1), n); | |
376 | return; | |
377 | } | |
378 | ||
379 | release_resource(res); | |
380 | kfree(res); | |
381 | ||
382 | /* mmu_inval_dma_area(va, n); */ /* it's consistent, isn't it */ | |
383 | pgv = mmu_translate_dvma(ba); | |
384 | mmu_unmap_dma_area(ba, n); | |
385 | ||
386 | __free_pages(pgv, get_order(n)); | |
387 | } | |
388 | ||
389 | /* | |
390 | * Map a chunk of memory so that devices can see it. | |
391 | * CPU view of this memory may be inconsistent with | |
392 | * a device view and explicit flushing is necessary. | |
393 | */ | |
394 | dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *va, size_t len, int direction) | |
395 | { | |
efad798b | 396 | /* XXX why are some lengths signed, others unsigned? */ |
1da177e4 LT |
397 | if (len <= 0) { |
398 | return 0; | |
399 | } | |
400 | /* XXX So what is maxphys for us and how do drivers know it? */ | |
401 | if (len > 256*1024) { /* __get_free_pages() limit */ | |
402 | return 0; | |
403 | } | |
404 | return mmu_get_scsi_one(va, len, sdev->bus); | |
405 | } | |
406 | ||
407 | void sbus_unmap_single(struct sbus_dev *sdev, dma_addr_t ba, size_t n, int direction) | |
408 | { | |
409 | mmu_release_scsi_one(ba, n, sdev->bus); | |
410 | } | |
411 | ||
412 | int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sg, int n, int direction) | |
413 | { | |
414 | mmu_get_scsi_sgl(sg, n, sdev->bus); | |
415 | ||
416 | /* | |
417 | * XXX sparc64 can return a partial length here. sun4c should do this | |
418 | * but it currently panics if it can't fulfill the request - Anton | |
419 | */ | |
420 | return n; | |
421 | } | |
422 | ||
423 | void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sg, int n, int direction) | |
424 | { | |
425 | mmu_release_scsi_sgl(sg, n, sdev->bus); | |
426 | } | |
427 | ||
428 | /* | |
429 | */ | |
430 | void sbus_dma_sync_single_for_cpu(struct sbus_dev *sdev, dma_addr_t ba, size_t size, int direction) | |
431 | { | |
432 | #if 0 | |
433 | unsigned long va; | |
434 | struct resource *res; | |
435 | ||
436 | /* We do not need the resource, just print a message if invalid. */ | |
437 | res = _sparc_find_resource(&_sparc_dvma, ba); | |
438 | if (res == NULL) | |
439 | panic("sbus_dma_sync_single: 0x%x\n", ba); | |
440 | ||
441 | va = page_address(mmu_translate_dvma(ba)); /* XXX higmem */ | |
442 | /* | |
443 | * XXX This bogosity will be fixed with the iommu rewrite coming soon | |
444 | * to a kernel near you. - Anton | |
445 | */ | |
446 | /* mmu_inval_dma_area(va, (size + PAGE_SIZE-1) & PAGE_MASK); */ | |
447 | #endif | |
448 | } | |
449 | ||
450 | void sbus_dma_sync_single_for_device(struct sbus_dev *sdev, dma_addr_t ba, size_t size, int direction) | |
451 | { | |
452 | #if 0 | |
453 | unsigned long va; | |
454 | struct resource *res; | |
455 | ||
456 | /* We do not need the resource, just print a message if invalid. */ | |
457 | res = _sparc_find_resource(&_sparc_dvma, ba); | |
458 | if (res == NULL) | |
459 | panic("sbus_dma_sync_single: 0x%x\n", ba); | |
460 | ||
461 | va = page_address(mmu_translate_dvma(ba)); /* XXX higmem */ | |
462 | /* | |
463 | * XXX This bogosity will be fixed with the iommu rewrite coming soon | |
464 | * to a kernel near you. - Anton | |
465 | */ | |
466 | /* mmu_inval_dma_area(va, (size + PAGE_SIZE-1) & PAGE_MASK); */ | |
467 | #endif | |
468 | } | |
469 | ||
470 | void sbus_dma_sync_sg_for_cpu(struct sbus_dev *sdev, struct scatterlist *sg, int n, int direction) | |
471 | { | |
472 | printk("sbus_dma_sync_sg_for_cpu: not implemented yet\n"); | |
473 | } | |
474 | ||
475 | void sbus_dma_sync_sg_for_device(struct sbus_dev *sdev, struct scatterlist *sg, int n, int direction) | |
476 | { | |
477 | printk("sbus_dma_sync_sg_for_device: not implemented yet\n"); | |
478 | } | |
576c352e DM |
479 | |
480 | /* Support code for sbus_init(). */ | |
481 | /* | |
482 | * XXX This functions appears to be a distorted version of | |
483 | * prom_sbus_ranges_init(), with all sun4d stuff cut away. | |
484 | * Ask DaveM what is going on here, how is sun4d supposed to work... XXX | |
485 | */ | |
486 | /* added back sun4d patch from Thomas Bogendoerfer - should be OK (crn) */ | |
487 | void __init sbus_arch_bus_ranges_init(struct device_node *pn, struct sbus_bus *sbus) | |
488 | { | |
489 | int parent_node = pn->node; | |
490 | ||
491 | if (sparc_cpu_model == sun4d) { | |
492 | struct linux_prom_ranges iounit_ranges[PROMREG_MAX]; | |
493 | int num_iounit_ranges, len; | |
494 | ||
495 | len = prom_getproperty(parent_node, "ranges", | |
496 | (char *) iounit_ranges, | |
497 | sizeof (iounit_ranges)); | |
498 | if (len != -1) { | |
499 | num_iounit_ranges = | |
500 | (len / sizeof(struct linux_prom_ranges)); | |
501 | prom_adjust_ranges(sbus->sbus_ranges, | |
502 | sbus->num_sbus_ranges, | |
503 | iounit_ranges, num_iounit_ranges); | |
504 | } | |
505 | } | |
506 | } | |
507 | ||
508 | void __init sbus_setup_iommu(struct sbus_bus *sbus, struct device_node *dp) | |
509 | { | |
5932ef07 | 510 | #ifndef CONFIG_SUN4 |
576c352e DM |
511 | struct device_node *parent = dp->parent; |
512 | ||
513 | if (sparc_cpu_model != sun4d && | |
514 | parent != NULL && | |
515 | !strcmp(parent->name, "iommu")) { | |
516 | extern void iommu_init(int iommu_node, struct sbus_bus *sbus); | |
517 | ||
518 | iommu_init(parent->node, sbus); | |
519 | } | |
520 | ||
521 | if (sparc_cpu_model == sun4d) { | |
522 | extern void iounit_init(int sbi_node, int iounit_node, | |
523 | struct sbus_bus *sbus); | |
524 | ||
525 | iounit_init(dp->node, parent->node, sbus); | |
526 | } | |
5932ef07 | 527 | #endif |
576c352e DM |
528 | } |
529 | ||
530 | void __init sbus_setup_arch_props(struct sbus_bus *sbus, struct device_node *dp) | |
531 | { | |
532 | if (sparc_cpu_model == sun4d) { | |
533 | struct device_node *parent = dp->parent; | |
534 | ||
535 | sbus->devid = of_getintprop_default(parent, "device-id", 0); | |
536 | sbus->board = of_getintprop_default(parent, "board#", 0); | |
537 | } | |
538 | } | |
539 | ||
540 | int __init sbus_arch_preinit(void) | |
541 | { | |
542 | extern void register_proc_sparc_ioport(void); | |
543 | ||
544 | register_proc_sparc_ioport(); | |
545 | ||
546 | #ifdef CONFIG_SUN4 | |
547 | { | |
548 | extern void sun4_dvma_init(void); | |
549 | sun4_dvma_init(); | |
550 | } | |
551 | return 1; | |
552 | #else | |
553 | return 0; | |
554 | #endif | |
555 | } | |
556 | ||
557 | void __init sbus_arch_postinit(void) | |
558 | { | |
559 | if (sparc_cpu_model == sun4d) { | |
560 | extern void sun4d_init_sbi_irq(void); | |
561 | sun4d_init_sbi_irq(); | |
562 | } | |
563 | } | |
1da177e4 LT |
564 | #endif /* CONFIG_SBUS */ |
565 | ||
566 | #ifdef CONFIG_PCI | |
567 | ||
568 | /* Allocate and map kernel buffer using consistent mode DMA for a device. | |
569 | * hwdev should be valid struct pci_dev pointer for PCI devices. | |
570 | */ | |
571 | void *pci_alloc_consistent(struct pci_dev *pdev, size_t len, dma_addr_t *pba) | |
572 | { | |
573 | unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK; | |
574 | unsigned long va; | |
575 | struct resource *res; | |
576 | int order; | |
577 | ||
578 | if (len == 0) { | |
579 | return NULL; | |
580 | } | |
581 | if (len > 256*1024) { /* __get_free_pages() limit */ | |
582 | return NULL; | |
583 | } | |
584 | ||
585 | order = get_order(len_total); | |
586 | va = __get_free_pages(GFP_KERNEL, order); | |
587 | if (va == 0) { | |
588 | printk("pci_alloc_consistent: no %ld pages\n", len_total>>PAGE_SHIFT); | |
589 | return NULL; | |
590 | } | |
591 | ||
c80892d1 | 592 | if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) { |
1da177e4 LT |
593 | free_pages(va, order); |
594 | printk("pci_alloc_consistent: no core\n"); | |
595 | return NULL; | |
596 | } | |
1da177e4 LT |
597 | |
598 | if (allocate_resource(&_sparc_dvma, res, len_total, | |
599 | _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) { | |
600 | printk("pci_alloc_consistent: cannot occupy 0x%lx", len_total); | |
601 | free_pages(va, order); | |
602 | kfree(res); | |
603 | return NULL; | |
604 | } | |
605 | mmu_inval_dma_area(va, len_total); | |
606 | #if 0 | |
607 | /* P3 */ printk("pci_alloc_consistent: kva %lx uncva %lx phys %lx size %lx\n", | |
608 | (long)va, (long)res->start, (long)virt_to_phys(va), len_total); | |
609 | #endif | |
610 | sparc_mapiorange(0, virt_to_phys(va), res->start, len_total); | |
611 | ||
612 | *pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */ | |
613 | return (void *) res->start; | |
614 | } | |
615 | ||
616 | /* Free and unmap a consistent DMA buffer. | |
617 | * cpu_addr is what was returned from pci_alloc_consistent, | |
618 | * size must be the same as what as passed into pci_alloc_consistent, | |
619 | * and likewise dma_addr must be the same as what *dma_addrp was set to. | |
620 | * | |
d1a78c32 | 621 | * References to the memory and mappings associated with cpu_addr/dma_addr |
1da177e4 LT |
622 | * past this call are illegal. |
623 | */ | |
624 | void pci_free_consistent(struct pci_dev *pdev, size_t n, void *p, dma_addr_t ba) | |
625 | { | |
626 | struct resource *res; | |
627 | unsigned long pgp; | |
628 | ||
629 | if ((res = _sparc_find_resource(&_sparc_dvma, | |
630 | (unsigned long)p)) == NULL) { | |
631 | printk("pci_free_consistent: cannot free %p\n", p); | |
632 | return; | |
633 | } | |
634 | ||
635 | if (((unsigned long)p & (PAGE_SIZE-1)) != 0) { | |
636 | printk("pci_free_consistent: unaligned va %p\n", p); | |
637 | return; | |
638 | } | |
639 | ||
640 | n = (n + PAGE_SIZE-1) & PAGE_MASK; | |
641 | if ((res->end-res->start)+1 != n) { | |
642 | printk("pci_free_consistent: region 0x%lx asked 0x%lx\n", | |
643 | (long)((res->end-res->start)+1), (long)n); | |
644 | return; | |
645 | } | |
646 | ||
647 | pgp = (unsigned long) phys_to_virt(ba); /* bus_to_virt actually */ | |
648 | mmu_inval_dma_area(pgp, n); | |
649 | sparc_unmapiorange((unsigned long)p, n); | |
650 | ||
651 | release_resource(res); | |
652 | kfree(res); | |
653 | ||
654 | free_pages(pgp, get_order(n)); | |
655 | } | |
656 | ||
657 | /* Map a single buffer of the indicated size for DMA in streaming mode. | |
658 | * The 32-bit bus address to use is returned. | |
659 | * | |
660 | * Once the device is given the dma address, the device owns this memory | |
661 | * until either pci_unmap_single or pci_dma_sync_single_* is performed. | |
662 | */ | |
663 | dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, | |
664 | int direction) | |
665 | { | |
30d4d1ff | 666 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 LT |
667 | /* IIep is write-through, not flushing. */ |
668 | return virt_to_phys(ptr); | |
669 | } | |
670 | ||
671 | /* Unmap a single streaming mode DMA translation. The dma_addr and size | |
672 | * must match what was provided for in a previous pci_map_single call. All | |
673 | * other usages are undefined. | |
674 | * | |
675 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
676 | * whatever the device wrote there. | |
677 | */ | |
678 | void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t ba, size_t size, | |
679 | int direction) | |
680 | { | |
30d4d1ff | 681 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 LT |
682 | if (direction != PCI_DMA_TODEVICE) { |
683 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), | |
684 | (size + PAGE_SIZE-1) & PAGE_MASK); | |
685 | } | |
686 | } | |
687 | ||
688 | /* | |
689 | * Same as pci_map_single, but with pages. | |
690 | */ | |
691 | dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page, | |
692 | unsigned long offset, size_t size, int direction) | |
693 | { | |
30d4d1ff | 694 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 LT |
695 | /* IIep is write-through, not flushing. */ |
696 | return page_to_phys(page) + offset; | |
697 | } | |
698 | ||
699 | void pci_unmap_page(struct pci_dev *hwdev, | |
700 | dma_addr_t dma_address, size_t size, int direction) | |
701 | { | |
30d4d1ff | 702 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 LT |
703 | /* mmu_inval_dma_area XXX */ |
704 | } | |
705 | ||
706 | /* Map a set of buffers described by scatterlist in streaming | |
707 | * mode for DMA. This is the scather-gather version of the | |
708 | * above pci_map_single interface. Here the scatter gather list | |
709 | * elements are each tagged with the appropriate dma address | |
710 | * and length. They are obtained via sg_dma_{address,length}(SG). | |
711 | * | |
712 | * NOTE: An implementation may be able to use a smaller number of | |
713 | * DMA address/length pairs than there are SG table elements. | |
714 | * (for example via virtual mapping capabilities) | |
715 | * The routine returns the number of addr/length pairs actually | |
716 | * used, at most nents. | |
717 | * | |
718 | * Device ownership issues as mentioned above for pci_map_single are | |
719 | * the same here. | |
720 | */ | |
0912a5db | 721 | int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, |
1da177e4 LT |
722 | int direction) |
723 | { | |
0912a5db | 724 | struct scatterlist *sg; |
1da177e4 LT |
725 | int n; |
726 | ||
30d4d1ff | 727 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 | 728 | /* IIep is write-through, not flushing. */ |
0912a5db | 729 | for_each_sg(sgl, sg, nents, n) { |
58b053e4 JA |
730 | BUG_ON(page_address(sg_page(sg)) == NULL); |
731 | sg->dvma_address = virt_to_phys(sg_virt(sg)); | |
1da177e4 | 732 | sg->dvma_length = sg->length; |
1da177e4 LT |
733 | } |
734 | return nents; | |
735 | } | |
736 | ||
737 | /* Unmap a set of streaming mode DMA translations. | |
738 | * Again, cpu read rules concerning calls here are the same as for | |
739 | * pci_unmap_single() above. | |
740 | */ | |
0912a5db | 741 | void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, |
1da177e4 LT |
742 | int direction) |
743 | { | |
0912a5db | 744 | struct scatterlist *sg; |
1da177e4 LT |
745 | int n; |
746 | ||
30d4d1ff | 747 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 | 748 | if (direction != PCI_DMA_TODEVICE) { |
0912a5db | 749 | for_each_sg(sgl, sg, nents, n) { |
58b053e4 | 750 | BUG_ON(page_address(sg_page(sg)) == NULL); |
1da177e4 | 751 | mmu_inval_dma_area( |
58b053e4 | 752 | (unsigned long) page_address(sg_page(sg)), |
1da177e4 | 753 | (sg->length + PAGE_SIZE-1) & PAGE_MASK); |
1da177e4 LT |
754 | } |
755 | } | |
756 | } | |
757 | ||
758 | /* Make physical memory consistent for a single | |
759 | * streaming mode DMA translation before or after a transfer. | |
760 | * | |
761 | * If you perform a pci_map_single() but wish to interrogate the | |
762 | * buffer using the cpu, yet do not wish to teardown the PCI dma | |
763 | * mapping, you must call this function before doing so. At the | |
764 | * next point you give the PCI dma address back to the card, you | |
765 | * must first perform a pci_dma_sync_for_device, and then the | |
766 | * device again owns the buffer. | |
767 | */ | |
768 | void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t ba, size_t size, int direction) | |
769 | { | |
30d4d1ff | 770 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 LT |
771 | if (direction != PCI_DMA_TODEVICE) { |
772 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), | |
773 | (size + PAGE_SIZE-1) & PAGE_MASK); | |
774 | } | |
775 | } | |
776 | ||
777 | void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t ba, size_t size, int direction) | |
778 | { | |
30d4d1ff | 779 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 LT |
780 | if (direction != PCI_DMA_TODEVICE) { |
781 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), | |
782 | (size + PAGE_SIZE-1) & PAGE_MASK); | |
783 | } | |
784 | } | |
785 | ||
786 | /* Make physical memory consistent for a set of streaming | |
787 | * mode DMA translations after a transfer. | |
788 | * | |
789 | * The same as pci_dma_sync_single_* but for a scatter-gather list, | |
790 | * same rules and usage. | |
791 | */ | |
0912a5db | 792 | void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, int direction) |
1da177e4 | 793 | { |
0912a5db | 794 | struct scatterlist *sg; |
1da177e4 LT |
795 | int n; |
796 | ||
30d4d1ff | 797 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 | 798 | if (direction != PCI_DMA_TODEVICE) { |
0912a5db | 799 | for_each_sg(sgl, sg, nents, n) { |
58b053e4 | 800 | BUG_ON(page_address(sg_page(sg)) == NULL); |
1da177e4 | 801 | mmu_inval_dma_area( |
58b053e4 | 802 | (unsigned long) page_address(sg_page(sg)), |
1da177e4 | 803 | (sg->length + PAGE_SIZE-1) & PAGE_MASK); |
1da177e4 LT |
804 | } |
805 | } | |
806 | } | |
807 | ||
0912a5db | 808 | void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, int direction) |
1da177e4 | 809 | { |
0912a5db | 810 | struct scatterlist *sg; |
1da177e4 LT |
811 | int n; |
812 | ||
30d4d1ff | 813 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 | 814 | if (direction != PCI_DMA_TODEVICE) { |
0912a5db | 815 | for_each_sg(sgl, sg, nents, n) { |
58b053e4 | 816 | BUG_ON(page_address(sg_page(sg)) == NULL); |
1da177e4 | 817 | mmu_inval_dma_area( |
58b053e4 | 818 | (unsigned long) page_address(sg_page(sg)), |
1da177e4 | 819 | (sg->length + PAGE_SIZE-1) & PAGE_MASK); |
1da177e4 LT |
820 | } |
821 | } | |
822 | } | |
823 | #endif /* CONFIG_PCI */ | |
824 | ||
825 | #ifdef CONFIG_PROC_FS | |
826 | ||
827 | static int | |
828 | _sparc_io_get_info(char *buf, char **start, off_t fpos, int length, int *eof, | |
829 | void *data) | |
830 | { | |
831 | char *p = buf, *e = buf + length; | |
832 | struct resource *r; | |
833 | const char *nm; | |
834 | ||
835 | for (r = ((struct resource *)data)->child; r != NULL; r = r->sibling) { | |
836 | if (p + 32 >= e) /* Better than nothing */ | |
837 | break; | |
838 | if ((nm = r->name) == 0) nm = "???"; | |
685143ac GKH |
839 | p += sprintf(p, "%016llx-%016llx: %s\n", |
840 | (unsigned long long)r->start, | |
841 | (unsigned long long)r->end, nm); | |
1da177e4 LT |
842 | } |
843 | ||
844 | return p-buf; | |
845 | } | |
846 | ||
847 | #endif /* CONFIG_PROC_FS */ | |
848 | ||
849 | /* | |
850 | * This is a version of find_resource and it belongs to kernel/resource.c. | |
851 | * Until we have agreement with Linus and Martin, it lingers here. | |
852 | * | |
853 | * XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case. | |
854 | * This probably warrants some sort of hashing. | |
855 | */ | |
856 | struct resource * | |
857 | _sparc_find_resource(struct resource *root, unsigned long hit) | |
858 | { | |
859 | struct resource *tmp; | |
860 | ||
861 | for (tmp = root->child; tmp != 0; tmp = tmp->sibling) { | |
862 | if (tmp->start <= hit && tmp->end >= hit) | |
863 | return tmp; | |
864 | } | |
865 | return NULL; | |
866 | } | |
867 | ||
868 | void register_proc_sparc_ioport(void) | |
869 | { | |
870 | #ifdef CONFIG_PROC_FS | |
871 | create_proc_read_entry("io_map",0,NULL,_sparc_io_get_info,&sparc_iomap); | |
872 | create_proc_read_entry("dvma_map",0,NULL,_sparc_io_get_info,&_sparc_dvma); | |
873 | #endif | |
874 | } |