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Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
88278ca2 | 2 | /* |
1da177e4 LT |
3 | * ioport.c: Simple io mapping allocator. |
4 | * | |
5 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | |
6 | * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx) | |
7 | * | |
8 | * 1996: sparc_free_io, 1999: ioremap()/iounmap() by Pete Zaitcev. | |
9 | * | |
10 | * 2000/01/29 | |
11 | * <rth> zait: as long as pci_alloc_consistent produces something addressable, | |
12 | * things are ok. | |
13 | * <zaitcev> rth: no, it is relevant, because get_free_pages returns you a | |
14 | * pointer into the big page mapping | |
15 | * <rth> zait: so what? | |
16 | * <rth> zait: remap_it_my_way(virt_to_phys(get_free_page())) | |
17 | * <zaitcev> Hmm | |
18 | * <zaitcev> Suppose I did this remap_it_my_way(virt_to_phys(get_free_page())). | |
19 | * So far so good. | |
20 | * <zaitcev> Now, driver calls pci_free_consistent(with result of | |
21 | * remap_it_my_way()). | |
22 | * <zaitcev> How do you find the address to pass to free_pages()? | |
23 | * <rth> zait: walk the page tables? It's only two or three level after all. | |
24 | * <rth> zait: you have to walk them anyway to remove the mapping. | |
25 | * <zaitcev> Hmm | |
26 | * <zaitcev> Sounds reasonable | |
27 | */ | |
28 | ||
3ca9fab4 | 29 | #include <linux/module.h> |
1da177e4 LT |
30 | #include <linux/sched.h> |
31 | #include <linux/kernel.h> | |
32 | #include <linux/errno.h> | |
33 | #include <linux/types.h> | |
34 | #include <linux/ioport.h> | |
35 | #include <linux/mm.h> | |
36 | #include <linux/slab.h> | |
37 | #include <linux/pci.h> /* struct pci_dev */ | |
38 | #include <linux/proc_fs.h> | |
e7a088f9 | 39 | #include <linux/seq_file.h> |
0912a5db | 40 | #include <linux/scatterlist.h> |
764f2579 | 41 | #include <linux/of_device.h> |
1da177e4 LT |
42 | |
43 | #include <asm/io.h> | |
44 | #include <asm/vaddrs.h> | |
45 | #include <asm/oplib.h> | |
576c352e | 46 | #include <asm/prom.h> |
1da177e4 LT |
47 | #include <asm/page.h> |
48 | #include <asm/pgalloc.h> | |
49 | #include <asm/dma.h> | |
e0039348 DM |
50 | #include <asm/iommu.h> |
51 | #include <asm/io-unit.h> | |
8401707f | 52 | #include <asm/leon.h> |
1da177e4 | 53 | |
d894d964 DM |
54 | const struct sparc32_dma_ops *sparc32_dma_ops; |
55 | ||
d81f087f KG |
56 | /* This function must make sure that caches and memory are coherent after DMA |
57 | * On LEON systems without cache snooping it flushes the entire D-CACHE. | |
58 | */ | |
d81f087f KG |
59 | static inline void dma_make_coherent(unsigned long pa, unsigned long len) |
60 | { | |
95835335 SR |
61 | if (sparc_cpu_model == sparc_leon) { |
62 | if (!sparc_leon3_snooping_enabled()) | |
63 | leon_flush_dcache_all(); | |
64 | } | |
d81f087f | 65 | } |
1da177e4 | 66 | |
1da177e4 LT |
67 | static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz); |
68 | static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys, | |
69 | unsigned long size, char *name); | |
70 | static void _sparc_free_io(struct resource *res); | |
71 | ||
c61c65cd AB |
72 | static void register_proc_sparc_ioport(void); |
73 | ||
1da177e4 LT |
74 | /* This points to the next to use virtual memory for DVMA mappings */ |
75 | static struct resource _sparc_dvma = { | |
76 | .name = "sparc_dvma", .start = DVMA_VADDR, .end = DVMA_END - 1 | |
77 | }; | |
78 | /* This points to the start of I/O mappings, cluable from outside. */ | |
79 | /*ext*/ struct resource sparc_iomap = { | |
80 | .name = "sparc_iomap", .start = IOBASE_VADDR, .end = IOBASE_END - 1 | |
81 | }; | |
82 | ||
83 | /* | |
84 | * Our mini-allocator... | |
85 | * Boy this is gross! We need it because we must map I/O for | |
86 | * timers and interrupt controller before the kmalloc is available. | |
87 | */ | |
88 | ||
89 | #define XNMLN 15 | |
90 | #define XNRES 10 /* SS-10 uses 8 */ | |
91 | ||
92 | struct xresource { | |
93 | struct resource xres; /* Must be first */ | |
94 | int xflag; /* 1 == used */ | |
95 | char xname[XNMLN+1]; | |
96 | }; | |
97 | ||
98 | static struct xresource xresv[XNRES]; | |
99 | ||
100 | static struct xresource *xres_alloc(void) { | |
101 | struct xresource *xrp; | |
102 | int n; | |
103 | ||
104 | xrp = xresv; | |
105 | for (n = 0; n < XNRES; n++) { | |
106 | if (xrp->xflag == 0) { | |
107 | xrp->xflag = 1; | |
108 | return xrp; | |
109 | } | |
110 | xrp++; | |
111 | } | |
112 | return NULL; | |
113 | } | |
114 | ||
115 | static void xres_free(struct xresource *xrp) { | |
116 | xrp->xflag = 0; | |
117 | } | |
118 | ||
119 | /* | |
120 | * These are typically used in PCI drivers | |
121 | * which are trying to be cross-platform. | |
122 | * | |
123 | * Bus type is always zero on IIep. | |
124 | */ | |
125 | void __iomem *ioremap(unsigned long offset, unsigned long size) | |
126 | { | |
127 | char name[14]; | |
128 | ||
129 | sprintf(name, "phys_%08x", (u32)offset); | |
130 | return _sparc_alloc_io(0, offset, size, name); | |
131 | } | |
6943f3da | 132 | EXPORT_SYMBOL(ioremap); |
1da177e4 LT |
133 | |
134 | /* | |
08f80073 | 135 | * Complementary to ioremap(). |
1da177e4 LT |
136 | */ |
137 | void iounmap(volatile void __iomem *virtual) | |
138 | { | |
139 | unsigned long vaddr = (unsigned long) virtual & PAGE_MASK; | |
140 | struct resource *res; | |
141 | ||
a0e997c2 GU |
142 | /* |
143 | * XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case. | |
144 | * This probably warrants some sort of hashing. | |
145 | */ | |
146 | if ((res = lookup_resource(&sparc_iomap, vaddr)) == NULL) { | |
1da177e4 LT |
147 | printk("free_io/iounmap: cannot free %lx\n", vaddr); |
148 | return; | |
149 | } | |
150 | _sparc_free_io(res); | |
151 | ||
152 | if ((char *)res >= (char*)xresv && (char *)res < (char *)&xresv[XNRES]) { | |
153 | xres_free((struct xresource *)res); | |
154 | } else { | |
155 | kfree(res); | |
156 | } | |
157 | } | |
6943f3da | 158 | EXPORT_SYMBOL(iounmap); |
1da177e4 | 159 | |
3ca9fab4 DM |
160 | void __iomem *of_ioremap(struct resource *res, unsigned long offset, |
161 | unsigned long size, char *name) | |
162 | { | |
163 | return _sparc_alloc_io(res->flags & 0xF, | |
164 | res->start + offset, | |
165 | size, name); | |
166 | } | |
167 | EXPORT_SYMBOL(of_ioremap); | |
168 | ||
e3a411a3 | 169 | void of_iounmap(struct resource *res, void __iomem *base, unsigned long size) |
3ca9fab4 DM |
170 | { |
171 | iounmap(base); | |
172 | } | |
173 | EXPORT_SYMBOL(of_iounmap); | |
174 | ||
1da177e4 LT |
175 | /* |
176 | * Meat of mapping | |
177 | */ | |
178 | static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys, | |
179 | unsigned long size, char *name) | |
180 | { | |
181 | static int printed_full; | |
182 | struct xresource *xres; | |
183 | struct resource *res; | |
184 | char *tack; | |
185 | int tlen; | |
186 | void __iomem *va; /* P3 diag */ | |
187 | ||
188 | if (name == NULL) name = "???"; | |
189 | ||
c31f7651 | 190 | if ((xres = xres_alloc()) != NULL) { |
1da177e4 LT |
191 | tack = xres->xname; |
192 | res = &xres->xres; | |
193 | } else { | |
194 | if (!printed_full) { | |
195 | printk("ioremap: done with statics, switching to malloc\n"); | |
196 | printed_full = 1; | |
197 | } | |
198 | tlen = strlen(name); | |
199 | tack = kmalloc(sizeof (struct resource) + tlen + 1, GFP_KERNEL); | |
200 | if (tack == NULL) return NULL; | |
201 | memset(tack, 0, sizeof(struct resource)); | |
202 | res = (struct resource *) tack; | |
203 | tack += sizeof (struct resource); | |
204 | } | |
205 | ||
206 | strlcpy(tack, name, XNMLN+1); | |
207 | res->name = tack; | |
208 | ||
209 | va = _sparc_ioremap(res, busno, phys, size); | |
210 | /* printk("ioremap(0x%x:%08lx[0x%lx])=%p\n", busno, phys, size, va); */ /* P3 diag */ | |
211 | return va; | |
212 | } | |
213 | ||
214 | /* | |
215 | */ | |
216 | static void __iomem * | |
217 | _sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz) | |
218 | { | |
219 | unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK); | |
220 | ||
221 | if (allocate_resource(&sparc_iomap, res, | |
222 | (offset + sz + PAGE_SIZE-1) & PAGE_MASK, | |
223 | sparc_iomap.start, sparc_iomap.end, PAGE_SIZE, NULL, NULL) != 0) { | |
224 | /* Usually we cannot see printks in this case. */ | |
225 | prom_printf("alloc_io_res(%s): cannot occupy\n", | |
226 | (res->name != NULL)? res->name: "???"); | |
227 | prom_halt(); | |
228 | } | |
229 | ||
230 | pa &= PAGE_MASK; | |
9701b264 | 231 | srmmu_mapiorange(bus, pa, res->start, resource_size(res)); |
1da177e4 | 232 | |
d75fc8bb | 233 | return (void __iomem *)(unsigned long)(res->start + offset); |
1da177e4 LT |
234 | } |
235 | ||
236 | /* | |
08f80073 | 237 | * Complementary to _sparc_ioremap(). |
1da177e4 LT |
238 | */ |
239 | static void _sparc_free_io(struct resource *res) | |
240 | { | |
241 | unsigned long plen; | |
242 | ||
28f65c11 | 243 | plen = resource_size(res); |
30d4d1ff | 244 | BUG_ON((plen & (PAGE_SIZE-1)) != 0); |
9701b264 | 245 | srmmu_unmapiorange(res->start, plen); |
1da177e4 LT |
246 | release_resource(res); |
247 | } | |
248 | ||
249 | #ifdef CONFIG_SBUS | |
250 | ||
63237eeb | 251 | void sbus_set_sbus64(struct device *dev, int x) |
8fae097d | 252 | { |
1da177e4 LT |
253 | printk("sbus_set_sbus64: unsupported\n"); |
254 | } | |
6943f3da | 255 | EXPORT_SYMBOL(sbus_set_sbus64); |
1da177e4 LT |
256 | |
257 | /* | |
258 | * Allocate a chunk of memory suitable for DMA. | |
259 | * Typically devices use them for control blocks. | |
260 | * CPU may access them without any explicit flushing. | |
1da177e4 | 261 | */ |
ee664a92 | 262 | static void *sbus_alloc_coherent(struct device *dev, size_t len, |
c416258a | 263 | dma_addr_t *dma_addrp, gfp_t gfp, |
00085f1e | 264 | unsigned long attrs) |
1da177e4 | 265 | { |
cd4cd730 | 266 | struct platform_device *op = to_platform_device(dev); |
5c8345bb | 267 | unsigned long len_total = PAGE_ALIGN(len); |
1da177e4 LT |
268 | unsigned long va; |
269 | struct resource *res; | |
270 | int order; | |
271 | ||
efad798b | 272 | /* XXX why are some lengths signed, others unsigned? */ |
1da177e4 LT |
273 | if (len <= 0) { |
274 | return NULL; | |
275 | } | |
276 | /* XXX So what is maxphys for us and how do drivers know it? */ | |
277 | if (len > 256*1024) { /* __get_free_pages() limit */ | |
278 | return NULL; | |
279 | } | |
280 | ||
281 | order = get_order(len_total); | |
d1105287 DH |
282 | va = __get_free_pages(gfp, order); |
283 | if (va == 0) | |
1da177e4 LT |
284 | goto err_nopages; |
285 | ||
c80892d1 | 286 | if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) |
1da177e4 | 287 | goto err_nomem; |
1da177e4 LT |
288 | |
289 | if (allocate_resource(&_sparc_dvma, res, len_total, | |
290 | _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) { | |
291 | printk("sbus_alloc_consistent: cannot occupy 0x%lx", len_total); | |
292 | goto err_nova; | |
293 | } | |
5c8345bb | 294 | |
d894d964 | 295 | // XXX The sbus_map_dma_area does this for us below, see comments. |
9701b264 | 296 | // srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total); |
1da177e4 LT |
297 | /* |
298 | * XXX That's where sdev would be used. Currently we load | |
299 | * all iommu tables with the same translations. | |
300 | */ | |
d894d964 | 301 | if (sbus_map_dma_area(dev, dma_addrp, va, res->start, len_total) != 0) |
1da177e4 LT |
302 | goto err_noiommu; |
303 | ||
61c7a080 | 304 | res->name = op->dev.of_node->name; |
4cfbd7eb | 305 | |
d75fc8bb | 306 | return (void *)(unsigned long)res->start; |
1da177e4 LT |
307 | |
308 | err_noiommu: | |
309 | release_resource(res); | |
310 | err_nova: | |
1da177e4 | 311 | kfree(res); |
0c7c6a3c KG |
312 | err_nomem: |
313 | free_pages(va, order); | |
1da177e4 LT |
314 | err_nopages: |
315 | return NULL; | |
316 | } | |
317 | ||
ee664a92 | 318 | static void sbus_free_coherent(struct device *dev, size_t n, void *p, |
00085f1e | 319 | dma_addr_t ba, unsigned long attrs) |
1da177e4 LT |
320 | { |
321 | struct resource *res; | |
322 | struct page *pgv; | |
323 | ||
a0e997c2 | 324 | if ((res = lookup_resource(&_sparc_dvma, |
1da177e4 LT |
325 | (unsigned long)p)) == NULL) { |
326 | printk("sbus_free_consistent: cannot free %p\n", p); | |
327 | return; | |
328 | } | |
329 | ||
330 | if (((unsigned long)p & (PAGE_SIZE-1)) != 0) { | |
331 | printk("sbus_free_consistent: unaligned va %p\n", p); | |
332 | return; | |
333 | } | |
334 | ||
5c8345bb | 335 | n = PAGE_ALIGN(n); |
28f65c11 | 336 | if (resource_size(res) != n) { |
ee664a92 | 337 | printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n", |
28f65c11 | 338 | (long)resource_size(res), n); |
1da177e4 LT |
339 | return; |
340 | } | |
341 | ||
342 | release_resource(res); | |
343 | kfree(res); | |
344 | ||
aba945e7 | 345 | pgv = virt_to_page(p); |
d894d964 | 346 | sbus_unmap_dma_area(dev, ba, n); |
1da177e4 LT |
347 | |
348 | __free_pages(pgv, get_order(n)); | |
349 | } | |
350 | ||
351 | /* | |
352 | * Map a chunk of memory so that devices can see it. | |
353 | * CPU view of this memory may be inconsistent with | |
354 | * a device view and explicit flushing is necessary. | |
355 | */ | |
ee664a92 FT |
356 | static dma_addr_t sbus_map_page(struct device *dev, struct page *page, |
357 | unsigned long offset, size_t len, | |
358 | enum dma_data_direction dir, | |
00085f1e | 359 | unsigned long attrs) |
1da177e4 | 360 | { |
c2c07dbd FT |
361 | void *va = page_address(page) + offset; |
362 | ||
efad798b | 363 | /* XXX why are some lengths signed, others unsigned? */ |
1da177e4 LT |
364 | if (len <= 0) { |
365 | return 0; | |
366 | } | |
367 | /* XXX So what is maxphys for us and how do drivers know it? */ | |
368 | if (len > 256*1024) { /* __get_free_pages() limit */ | |
369 | return 0; | |
370 | } | |
260489fa | 371 | return mmu_get_scsi_one(dev, va, len); |
1da177e4 LT |
372 | } |
373 | ||
ee664a92 | 374 | static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n, |
00085f1e | 375 | enum dma_data_direction dir, unsigned long attrs) |
1da177e4 | 376 | { |
260489fa | 377 | mmu_release_scsi_one(dev, ba, n); |
1da177e4 LT |
378 | } |
379 | ||
ee664a92 | 380 | static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n, |
00085f1e | 381 | enum dma_data_direction dir, unsigned long attrs) |
1da177e4 | 382 | { |
260489fa | 383 | mmu_get_scsi_sgl(dev, sg, n); |
1da177e4 LT |
384 | return n; |
385 | } | |
386 | ||
ee664a92 | 387 | static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n, |
00085f1e | 388 | enum dma_data_direction dir, unsigned long attrs) |
1da177e4 | 389 | { |
260489fa | 390 | mmu_release_scsi_sgl(dev, sg, n); |
1da177e4 LT |
391 | } |
392 | ||
ee664a92 FT |
393 | static void sbus_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, |
394 | int n, enum dma_data_direction dir) | |
1da177e4 | 395 | { |
ee664a92 | 396 | BUG(); |
1da177e4 LT |
397 | } |
398 | ||
ee664a92 FT |
399 | static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg, |
400 | int n, enum dma_data_direction dir) | |
1da177e4 | 401 | { |
ee664a92 | 402 | BUG(); |
1da177e4 LT |
403 | } |
404 | ||
b02c2b0b CH |
405 | static int sbus_dma_supported(struct device *dev, u64 mask) |
406 | { | |
407 | return 0; | |
408 | } | |
409 | ||
5299709d | 410 | static const struct dma_map_ops sbus_dma_ops = { |
c416258a AP |
411 | .alloc = sbus_alloc_coherent, |
412 | .free = sbus_free_coherent, | |
ee664a92 FT |
413 | .map_page = sbus_map_page, |
414 | .unmap_page = sbus_unmap_page, | |
415 | .map_sg = sbus_map_sg, | |
416 | .unmap_sg = sbus_unmap_sg, | |
417 | .sync_sg_for_cpu = sbus_sync_sg_for_cpu, | |
418 | .sync_sg_for_device = sbus_sync_sg_for_device, | |
b02c2b0b | 419 | .dma_supported = sbus_dma_supported, |
ee664a92 FT |
420 | }; |
421 | ||
f8e4d32c | 422 | static int __init sparc_register_ioport(void) |
576c352e | 423 | { |
576c352e DM |
424 | register_proc_sparc_ioport(); |
425 | ||
576c352e | 426 | return 0; |
576c352e DM |
427 | } |
428 | ||
f8e4d32c DM |
429 | arch_initcall(sparc_register_ioport); |
430 | ||
1da177e4 LT |
431 | #endif /* CONFIG_SBUS */ |
432 | ||
18304746 | 433 | |
1da177e4 LT |
434 | /* Allocate and map kernel buffer using consistent mode DMA for a device. |
435 | * hwdev should be valid struct pci_dev pointer for PCI devices. | |
436 | */ | |
ee664a92 | 437 | static void *pci32_alloc_coherent(struct device *dev, size_t len, |
c416258a | 438 | dma_addr_t *pba, gfp_t gfp, |
00085f1e | 439 | unsigned long attrs) |
1da177e4 | 440 | { |
5c8345bb | 441 | unsigned long len_total = PAGE_ALIGN(len); |
7feee249 | 442 | void *va; |
1da177e4 LT |
443 | struct resource *res; |
444 | int order; | |
445 | ||
446 | if (len == 0) { | |
447 | return NULL; | |
448 | } | |
449 | if (len > 256*1024) { /* __get_free_pages() limit */ | |
450 | return NULL; | |
451 | } | |
452 | ||
453 | order = get_order(len_total); | |
d1105287 | 454 | va = (void *) __get_free_pages(gfp, order); |
7feee249 | 455 | if (va == NULL) { |
1da177e4 | 456 | printk("pci_alloc_consistent: no %ld pages\n", len_total>>PAGE_SHIFT); |
7feee249 | 457 | goto err_nopages; |
1da177e4 LT |
458 | } |
459 | ||
c80892d1 | 460 | if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) { |
1da177e4 | 461 | printk("pci_alloc_consistent: no core\n"); |
7feee249 | 462 | goto err_nomem; |
1da177e4 | 463 | } |
1da177e4 LT |
464 | |
465 | if (allocate_resource(&_sparc_dvma, res, len_total, | |
466 | _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) { | |
467 | printk("pci_alloc_consistent: cannot occupy 0x%lx", len_total); | |
7feee249 | 468 | goto err_nova; |
1da177e4 | 469 | } |
9701b264 | 470 | srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total); |
1da177e4 LT |
471 | |
472 | *pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */ | |
473 | return (void *) res->start; | |
7feee249 KG |
474 | |
475 | err_nova: | |
476 | kfree(res); | |
477 | err_nomem: | |
478 | free_pages((unsigned long)va, order); | |
479 | err_nopages: | |
480 | return NULL; | |
1da177e4 LT |
481 | } |
482 | ||
483 | /* Free and unmap a consistent DMA buffer. | |
484 | * cpu_addr is what was returned from pci_alloc_consistent, | |
485 | * size must be the same as what as passed into pci_alloc_consistent, | |
486 | * and likewise dma_addr must be the same as what *dma_addrp was set to. | |
487 | * | |
d1a78c32 | 488 | * References to the memory and mappings associated with cpu_addr/dma_addr |
1da177e4 LT |
489 | * past this call are illegal. |
490 | */ | |
ee664a92 | 491 | static void pci32_free_coherent(struct device *dev, size_t n, void *p, |
00085f1e | 492 | dma_addr_t ba, unsigned long attrs) |
1da177e4 LT |
493 | { |
494 | struct resource *res; | |
1da177e4 | 495 | |
a0e997c2 | 496 | if ((res = lookup_resource(&_sparc_dvma, |
1da177e4 LT |
497 | (unsigned long)p)) == NULL) { |
498 | printk("pci_free_consistent: cannot free %p\n", p); | |
499 | return; | |
500 | } | |
501 | ||
502 | if (((unsigned long)p & (PAGE_SIZE-1)) != 0) { | |
503 | printk("pci_free_consistent: unaligned va %p\n", p); | |
504 | return; | |
505 | } | |
506 | ||
5c8345bb | 507 | n = PAGE_ALIGN(n); |
28f65c11 | 508 | if (resource_size(res) != n) { |
1da177e4 | 509 | printk("pci_free_consistent: region 0x%lx asked 0x%lx\n", |
28f65c11 | 510 | (long)resource_size(res), (long)n); |
1da177e4 LT |
511 | return; |
512 | } | |
513 | ||
d81f087f | 514 | dma_make_coherent(ba, n); |
9701b264 | 515 | srmmu_unmapiorange((unsigned long)p, n); |
1da177e4 LT |
516 | |
517 | release_resource(res); | |
518 | kfree(res); | |
d81f087f | 519 | free_pages((unsigned long)phys_to_virt(ba), get_order(n)); |
1da177e4 | 520 | } |
1da177e4 LT |
521 | |
522 | /* | |
523 | * Same as pci_map_single, but with pages. | |
524 | */ | |
ee664a92 FT |
525 | static dma_addr_t pci32_map_page(struct device *dev, struct page *page, |
526 | unsigned long offset, size_t size, | |
527 | enum dma_data_direction dir, | |
00085f1e | 528 | unsigned long attrs) |
1da177e4 | 529 | { |
1da177e4 LT |
530 | /* IIep is write-through, not flushing. */ |
531 | return page_to_phys(page) + offset; | |
532 | } | |
1da177e4 | 533 | |
b8682cef | 534 | static void pci32_unmap_page(struct device *dev, dma_addr_t ba, size_t size, |
00085f1e | 535 | enum dma_data_direction dir, unsigned long attrs) |
b8682cef | 536 | { |
68bbc28f | 537 | if (dir != PCI_DMA_TODEVICE && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) |
d81f087f | 538 | dma_make_coherent(ba, PAGE_ALIGN(size)); |
b8682cef KG |
539 | } |
540 | ||
1da177e4 | 541 | /* Map a set of buffers described by scatterlist in streaming |
08f80073 | 542 | * mode for DMA. This is the scatter-gather version of the |
1da177e4 LT |
543 | * above pci_map_single interface. Here the scatter gather list |
544 | * elements are each tagged with the appropriate dma address | |
545 | * and length. They are obtained via sg_dma_{address,length}(SG). | |
546 | * | |
547 | * NOTE: An implementation may be able to use a smaller number of | |
548 | * DMA address/length pairs than there are SG table elements. | |
549 | * (for example via virtual mapping capabilities) | |
550 | * The routine returns the number of addr/length pairs actually | |
551 | * used, at most nents. | |
552 | * | |
553 | * Device ownership issues as mentioned above for pci_map_single are | |
554 | * the same here. | |
555 | */ | |
ee664a92 FT |
556 | static int pci32_map_sg(struct device *device, struct scatterlist *sgl, |
557 | int nents, enum dma_data_direction dir, | |
00085f1e | 558 | unsigned long attrs) |
1da177e4 | 559 | { |
0912a5db | 560 | struct scatterlist *sg; |
1da177e4 LT |
561 | int n; |
562 | ||
1da177e4 | 563 | /* IIep is write-through, not flushing. */ |
0912a5db | 564 | for_each_sg(sgl, sg, nents, n) { |
d81f087f | 565 | sg->dma_address = sg_phys(sg); |
aa83a26a | 566 | sg->dma_length = sg->length; |
1da177e4 LT |
567 | } |
568 | return nents; | |
569 | } | |
570 | ||
571 | /* Unmap a set of streaming mode DMA translations. | |
572 | * Again, cpu read rules concerning calls here are the same as for | |
573 | * pci_unmap_single() above. | |
574 | */ | |
ee664a92 FT |
575 | static void pci32_unmap_sg(struct device *dev, struct scatterlist *sgl, |
576 | int nents, enum dma_data_direction dir, | |
00085f1e | 577 | unsigned long attrs) |
1da177e4 | 578 | { |
0912a5db | 579 | struct scatterlist *sg; |
1da177e4 LT |
580 | int n; |
581 | ||
68bbc28f | 582 | if (dir != PCI_DMA_TODEVICE && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) { |
0912a5db | 583 | for_each_sg(sgl, sg, nents, n) { |
d81f087f | 584 | dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length)); |
1da177e4 LT |
585 | } |
586 | } | |
587 | } | |
588 | ||
589 | /* Make physical memory consistent for a single | |
590 | * streaming mode DMA translation before or after a transfer. | |
591 | * | |
592 | * If you perform a pci_map_single() but wish to interrogate the | |
593 | * buffer using the cpu, yet do not wish to teardown the PCI dma | |
594 | * mapping, you must call this function before doing so. At the | |
595 | * next point you give the PCI dma address back to the card, you | |
596 | * must first perform a pci_dma_sync_for_device, and then the | |
597 | * device again owns the buffer. | |
598 | */ | |
ee664a92 FT |
599 | static void pci32_sync_single_for_cpu(struct device *dev, dma_addr_t ba, |
600 | size_t size, enum dma_data_direction dir) | |
1da177e4 | 601 | { |
ee664a92 | 602 | if (dir != PCI_DMA_TODEVICE) { |
d81f087f | 603 | dma_make_coherent(ba, PAGE_ALIGN(size)); |
1da177e4 LT |
604 | } |
605 | } | |
606 | ||
ee664a92 FT |
607 | static void pci32_sync_single_for_device(struct device *dev, dma_addr_t ba, |
608 | size_t size, enum dma_data_direction dir) | |
1da177e4 | 609 | { |
ee664a92 | 610 | if (dir != PCI_DMA_TODEVICE) { |
d81f087f | 611 | dma_make_coherent(ba, PAGE_ALIGN(size)); |
1da177e4 LT |
612 | } |
613 | } | |
614 | ||
615 | /* Make physical memory consistent for a set of streaming | |
616 | * mode DMA translations after a transfer. | |
617 | * | |
618 | * The same as pci_dma_sync_single_* but for a scatter-gather list, | |
619 | * same rules and usage. | |
620 | */ | |
ee664a92 FT |
621 | static void pci32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl, |
622 | int nents, enum dma_data_direction dir) | |
1da177e4 | 623 | { |
0912a5db | 624 | struct scatterlist *sg; |
1da177e4 LT |
625 | int n; |
626 | ||
ee664a92 | 627 | if (dir != PCI_DMA_TODEVICE) { |
0912a5db | 628 | for_each_sg(sgl, sg, nents, n) { |
d81f087f | 629 | dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length)); |
1da177e4 LT |
630 | } |
631 | } | |
632 | } | |
633 | ||
ee664a92 FT |
634 | static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *sgl, |
635 | int nents, enum dma_data_direction dir) | |
1da177e4 | 636 | { |
0912a5db | 637 | struct scatterlist *sg; |
1da177e4 LT |
638 | int n; |
639 | ||
ee664a92 | 640 | if (dir != PCI_DMA_TODEVICE) { |
0912a5db | 641 | for_each_sg(sgl, sg, nents, n) { |
d81f087f | 642 | dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length)); |
1da177e4 LT |
643 | } |
644 | } | |
645 | } | |
ee664a92 | 646 | |
c6d333e0 | 647 | /* note: leon re-uses pci32_dma_ops */ |
5299709d | 648 | const struct dma_map_ops pci32_dma_ops = { |
c416258a AP |
649 | .alloc = pci32_alloc_coherent, |
650 | .free = pci32_free_coherent, | |
ee664a92 | 651 | .map_page = pci32_map_page, |
b8682cef | 652 | .unmap_page = pci32_unmap_page, |
ee664a92 FT |
653 | .map_sg = pci32_map_sg, |
654 | .unmap_sg = pci32_unmap_sg, | |
655 | .sync_single_for_cpu = pci32_sync_single_for_cpu, | |
656 | .sync_single_for_device = pci32_sync_single_for_device, | |
657 | .sync_sg_for_cpu = pci32_sync_sg_for_cpu, | |
658 | .sync_sg_for_device = pci32_sync_sg_for_device, | |
659 | }; | |
660 | EXPORT_SYMBOL(pci32_dma_ops); | |
661 | ||
5299709d | 662 | const struct dma_map_ops *dma_ops = &sbus_dma_ops; |
18304746 KG |
663 | EXPORT_SYMBOL(dma_ops); |
664 | ||
1da177e4 LT |
665 | #ifdef CONFIG_PROC_FS |
666 | ||
e7a088f9 | 667 | static int sparc_io_proc_show(struct seq_file *m, void *v) |
1da177e4 | 668 | { |
e7a088f9 | 669 | struct resource *root = m->private, *r; |
1da177e4 LT |
670 | const char *nm; |
671 | ||
e7a088f9 | 672 | for (r = root->child; r != NULL; r = r->sibling) { |
c31f7651 | 673 | if ((nm = r->name) == NULL) nm = "???"; |
e7a088f9 | 674 | seq_printf(m, "%016llx-%016llx: %s\n", |
685143ac GKH |
675 | (unsigned long long)r->start, |
676 | (unsigned long long)r->end, nm); | |
1da177e4 LT |
677 | } |
678 | ||
e7a088f9 | 679 | return 0; |
1da177e4 LT |
680 | } |
681 | ||
e7a088f9 AD |
682 | static int sparc_io_proc_open(struct inode *inode, struct file *file) |
683 | { | |
d9dda78b | 684 | return single_open(file, sparc_io_proc_show, PDE_DATA(inode)); |
e7a088f9 AD |
685 | } |
686 | ||
687 | static const struct file_operations sparc_io_proc_fops = { | |
688 | .owner = THIS_MODULE, | |
689 | .open = sparc_io_proc_open, | |
690 | .read = seq_read, | |
691 | .llseek = seq_lseek, | |
692 | .release = single_release, | |
693 | }; | |
1da177e4 LT |
694 | #endif /* CONFIG_PROC_FS */ |
695 | ||
c61c65cd | 696 | static void register_proc_sparc_ioport(void) |
1da177e4 LT |
697 | { |
698 | #ifdef CONFIG_PROC_FS | |
e7a088f9 AD |
699 | proc_create_data("io_map", 0, NULL, &sparc_io_proc_fops, &sparc_iomap); |
700 | proc_create_data("dvma_map", 0, NULL, &sparc_io_proc_fops, &_sparc_dvma); | |
1da177e4 LT |
701 | #endif |
702 | } |