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5213a780 KE |
1 | /* |
2 | * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB | |
3 | * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB | |
4 | */ | |
5 | ||
6 | #include <linux/kernel.h> | |
7 | #include <linux/module.h> | |
8 | #include <linux/errno.h> | |
9 | #include <linux/mutex.h> | |
5213a780 KE |
10 | #include <linux/of.h> |
11 | #include <linux/of_platform.h> | |
12 | #include <linux/interrupt.h> | |
13 | #include <linux/of_device.h> | |
8401707f | 14 | |
5213a780 KE |
15 | #include <asm/oplib.h> |
16 | #include <asm/timer.h> | |
17 | #include <asm/prom.h> | |
18 | #include <asm/leon.h> | |
19 | #include <asm/leon_amba.h> | |
8401707f KE |
20 | #include <asm/traps.h> |
21 | #include <asm/cacheflush.h> | |
4c6773c3 | 22 | #include <asm/smp.h> |
01dae0f0 | 23 | #include <asm/setup.h> |
5213a780 KE |
24 | |
25 | #include "prom.h" | |
26 | #include "irq.h" | |
27 | ||
53aea7ca DH |
28 | struct leon3_irqctrl_regs_map *leon3_irqctrl_regs; /* interrupt controller base address */ |
29 | struct leon3_gptimer_regs_map *leon3_gptimer_regs; /* timer controller base address */ | |
5213a780 KE |
30 | |
31 | int leondebug_irq_disable; | |
32 | int leon_debug_irqout; | |
33 | static int dummy_master_l10_counter; | |
7279b82c | 34 | unsigned long amba_system_id; |
d61a38b2 | 35 | static DEFINE_SPINLOCK(leon_irq_lock); |
5213a780 | 36 | |
53aea7ca | 37 | unsigned long leon3_gptimer_irq; /* interrupt controller irq number */ |
2791c1a4 | 38 | unsigned long leon3_gptimer_idx; /* Timer Index (0..6) within Timer Core */ |
2cf95304 | 39 | int leon3_ticker_irq; /* Timer ticker IRQ */ |
5213a780 | 40 | unsigned int sparc_leon_eirq; |
a481b5d0 | 41 | #define LEON_IMASK(cpu) (&leon3_irqctrl_regs->mask[cpu]) |
4c6773c3 DH |
42 | #define LEON_IACK (&leon3_irqctrl_regs->iclear) |
43 | #define LEON_DO_ACK_HW 1 | |
5213a780 | 44 | |
4c6773c3 DH |
45 | /* Return the last ACKed IRQ by the Extended IRQ controller. It has already |
46 | * been (automatically) ACKed when the CPU takes the trap. | |
47 | */ | |
48 | static inline unsigned int leon_eirq_get(int cpu) | |
5213a780 KE |
49 | { |
50 | return LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->intid[cpu]) & 0x1f; | |
51 | } | |
52 | ||
4c6773c3 DH |
53 | /* Handle one or multiple IRQs from the extended interrupt controller */ |
54 | static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc) | |
5213a780 | 55 | { |
4c6773c3 | 56 | unsigned int eirq; |
01dae0f0 | 57 | int cpu = sparc_leon3_cpuid(); |
4c6773c3 DH |
58 | |
59 | eirq = leon_eirq_get(cpu); | |
60 | if ((eirq & 0x10) && irq_map[eirq]->irq) /* bit4 tells if IRQ happened */ | |
61 | generic_handle_irq(irq_map[eirq]->irq); | |
5213a780 KE |
62 | } |
63 | ||
64 | /* The extended IRQ controller has been found, this function registers it */ | |
4c6773c3 | 65 | void leon_eirq_setup(unsigned int eirq) |
5213a780 | 66 | { |
4c6773c3 DH |
67 | unsigned long mask, oldmask; |
68 | unsigned int veirq; | |
5213a780 | 69 | |
4c6773c3 DH |
70 | if (eirq < 1 || eirq > 0xf) { |
71 | printk(KERN_ERR "LEON EXT IRQ NUMBER BAD: %d\n", eirq); | |
72 | return; | |
5213a780 KE |
73 | } |
74 | ||
4c6773c3 DH |
75 | veirq = leon_build_device_irq(eirq, leon_handle_ext_irq, "extirq", 0); |
76 | ||
77 | /* | |
78 | * Unmask the Extended IRQ, the IRQs routed through the Ext-IRQ | |
79 | * controller have a mask-bit of their own, so this is safe. | |
80 | */ | |
81 | irq_link(veirq); | |
82 | mask = 1 << eirq; | |
01dae0f0 DH |
83 | oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(boot_cpu_id)); |
84 | LEON3_BYPASS_STORE_PA(LEON_IMASK(boot_cpu_id), (oldmask | mask)); | |
4c6773c3 | 85 | sparc_leon_eirq = eirq; |
5213a780 KE |
86 | } |
87 | ||
88 | static inline unsigned long get_irqmask(unsigned int irq) | |
89 | { | |
90 | unsigned long mask; | |
91 | ||
92 | if (!irq || ((irq > 0xf) && !sparc_leon_eirq) | |
93 | || ((irq > 0x1f) && sparc_leon_eirq)) { | |
94 | printk(KERN_ERR | |
95 | "leon_get_irqmask: false irq number: %d\n", irq); | |
96 | mask = 0; | |
97 | } else { | |
98 | mask = LEON_HARD_INT(irq); | |
99 | } | |
100 | return mask; | |
101 | } | |
102 | ||
5eb1f4fc DH |
103 | #ifdef CONFIG_SMP |
104 | static int irq_choose_cpu(const struct cpumask *affinity) | |
105 | { | |
106 | cpumask_t mask; | |
107 | ||
108 | cpus_and(mask, cpu_online_map, *affinity); | |
109 | if (cpus_equal(mask, cpu_online_map) || cpus_empty(mask)) | |
01dae0f0 | 110 | return boot_cpu_id; |
5eb1f4fc DH |
111 | else |
112 | return first_cpu(mask); | |
113 | } | |
114 | #else | |
01dae0f0 | 115 | #define irq_choose_cpu(affinity) boot_cpu_id |
5eb1f4fc DH |
116 | #endif |
117 | ||
118 | static int leon_set_affinity(struct irq_data *data, const struct cpumask *dest, | |
119 | bool force) | |
120 | { | |
121 | unsigned long mask, oldmask, flags; | |
122 | int oldcpu, newcpu; | |
123 | ||
124 | mask = (unsigned long)data->chip_data; | |
125 | oldcpu = irq_choose_cpu(data->affinity); | |
126 | newcpu = irq_choose_cpu(dest); | |
127 | ||
128 | if (oldcpu == newcpu) | |
129 | goto out; | |
130 | ||
131 | /* unmask on old CPU first before enabling on the selected CPU */ | |
132 | spin_lock_irqsave(&leon_irq_lock, flags); | |
133 | oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(oldcpu)); | |
134 | LEON3_BYPASS_STORE_PA(LEON_IMASK(oldcpu), (oldmask & ~mask)); | |
135 | oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(newcpu)); | |
136 | LEON3_BYPASS_STORE_PA(LEON_IMASK(newcpu), (oldmask | mask)); | |
137 | spin_unlock_irqrestore(&leon_irq_lock, flags); | |
138 | out: | |
139 | return IRQ_SET_MASK_OK; | |
140 | } | |
141 | ||
6baa9b20 | 142 | static void leon_unmask_irq(struct irq_data *data) |
5213a780 | 143 | { |
a481b5d0 | 144 | unsigned long mask, oldmask, flags; |
5eb1f4fc | 145 | int cpu; |
6baa9b20 SR |
146 | |
147 | mask = (unsigned long)data->chip_data; | |
5eb1f4fc | 148 | cpu = irq_choose_cpu(data->affinity); |
d61a38b2 | 149 | spin_lock_irqsave(&leon_irq_lock, flags); |
5eb1f4fc DH |
150 | oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu)); |
151 | LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask | mask)); | |
d61a38b2 | 152 | spin_unlock_irqrestore(&leon_irq_lock, flags); |
5213a780 KE |
153 | } |
154 | ||
6baa9b20 | 155 | static void leon_mask_irq(struct irq_data *data) |
5213a780 | 156 | { |
a481b5d0 | 157 | unsigned long mask, oldmask, flags; |
5eb1f4fc | 158 | int cpu; |
6baa9b20 SR |
159 | |
160 | mask = (unsigned long)data->chip_data; | |
5eb1f4fc | 161 | cpu = irq_choose_cpu(data->affinity); |
d61a38b2 | 162 | spin_lock_irqsave(&leon_irq_lock, flags); |
5eb1f4fc DH |
163 | oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu)); |
164 | LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask & ~mask)); | |
d61a38b2 | 165 | spin_unlock_irqrestore(&leon_irq_lock, flags); |
5213a780 KE |
166 | } |
167 | ||
6baa9b20 SR |
168 | static unsigned int leon_startup_irq(struct irq_data *data) |
169 | { | |
170 | irq_link(data->irq); | |
171 | leon_unmask_irq(data); | |
172 | return 0; | |
173 | } | |
174 | ||
175 | static void leon_shutdown_irq(struct irq_data *data) | |
176 | { | |
177 | leon_mask_irq(data); | |
178 | irq_unlink(data->irq); | |
179 | } | |
180 | ||
4c6773c3 DH |
181 | /* Used by external level sensitive IRQ handlers on the LEON: ACK IRQ ctrl */ |
182 | static void leon_eoi_irq(struct irq_data *data) | |
183 | { | |
184 | unsigned long mask = (unsigned long)data->chip_data; | |
185 | ||
186 | if (mask & LEON_DO_ACK_HW) | |
187 | LEON3_BYPASS_STORE_PA(LEON_IACK, mask & ~LEON_DO_ACK_HW); | |
188 | } | |
189 | ||
6baa9b20 | 190 | static struct irq_chip leon_irq = { |
5eb1f4fc DH |
191 | .name = "leon", |
192 | .irq_startup = leon_startup_irq, | |
193 | .irq_shutdown = leon_shutdown_irq, | |
194 | .irq_mask = leon_mask_irq, | |
195 | .irq_unmask = leon_unmask_irq, | |
196 | .irq_eoi = leon_eoi_irq, | |
197 | .irq_set_affinity = leon_set_affinity, | |
6baa9b20 SR |
198 | }; |
199 | ||
4c6773c3 DH |
200 | /* |
201 | * Build a LEON IRQ for the edge triggered LEON IRQ controller: | |
202 | * Edge (normal) IRQ - handle_simple_irq, ack=DONT-CARE, never ack | |
203 | * Level IRQ (PCI|Level-GPIO) - handle_fasteoi_irq, ack=1, ack after ISR | |
204 | * Per-CPU Edge - handle_percpu_irq, ack=0 | |
205 | */ | |
206 | unsigned int leon_build_device_irq(unsigned int real_irq, | |
207 | irq_flow_handler_t flow_handler, | |
208 | const char *name, int do_ack) | |
6baa9b20 SR |
209 | { |
210 | unsigned int irq; | |
211 | unsigned long mask; | |
212 | ||
213 | irq = 0; | |
214 | mask = get_irqmask(real_irq); | |
215 | if (mask == 0) | |
216 | goto out; | |
217 | ||
218 | irq = irq_alloc(real_irq, real_irq); | |
219 | if (irq == 0) | |
220 | goto out; | |
221 | ||
4c6773c3 DH |
222 | if (do_ack) |
223 | mask |= LEON_DO_ACK_HW; | |
224 | ||
6baa9b20 | 225 | irq_set_chip_and_handler_name(irq, &leon_irq, |
4c6773c3 | 226 | flow_handler, name); |
6baa9b20 SR |
227 | irq_set_chip_data(irq, (void *)mask); |
228 | ||
229 | out: | |
230 | return irq; | |
231 | } | |
232 | ||
4c6773c3 DH |
233 | static unsigned int _leon_build_device_irq(struct platform_device *op, |
234 | unsigned int real_irq) | |
235 | { | |
236 | return leon_build_device_irq(real_irq, handle_simple_irq, "edge", 0); | |
237 | } | |
238 | ||
5213a780 KE |
239 | void __init leon_init_timers(irq_handler_t counter_fn) |
240 | { | |
4c6773c3 | 241 | int irq, eirq; |
2791c1a4 | 242 | struct device_node *rootnp, *np, *nnp; |
53aea7ca DH |
243 | struct property *pp; |
244 | int len; | |
01dae0f0 | 245 | int icsel; |
2791c1a4 | 246 | int ampopts; |
6baa9b20 | 247 | int err; |
5213a780 KE |
248 | |
249 | leondebug_irq_disable = 0; | |
250 | leon_debug_irqout = 0; | |
251 | master_l10_counter = (unsigned int *)&dummy_master_l10_counter; | |
252 | dummy_master_l10_counter = 0; | |
253 | ||
53aea7ca DH |
254 | rootnp = of_find_node_by_path("/ambapp0"); |
255 | if (!rootnp) | |
256 | goto bad; | |
7279b82c DH |
257 | |
258 | /* Find System ID: GRLIB build ID and optional CHIP ID */ | |
259 | pp = of_find_property(rootnp, "systemid", &len); | |
260 | if (pp) | |
261 | amba_system_id = *(unsigned long *)pp->value; | |
262 | ||
263 | /* Find IRQMP IRQ Controller Registers base adr otherwise bail out */ | |
53aea7ca | 264 | np = of_find_node_by_name(rootnp, "GAISLER_IRQMP"); |
9742e72c DH |
265 | if (!np) { |
266 | np = of_find_node_by_name(rootnp, "01_00d"); | |
267 | if (!np) | |
268 | goto bad; | |
269 | } | |
53aea7ca DH |
270 | pp = of_find_property(np, "reg", &len); |
271 | if (!pp) | |
272 | goto bad; | |
273 | leon3_irqctrl_regs = *(struct leon3_irqctrl_regs_map **)pp->value; | |
274 | ||
275 | /* Find GPTIMER Timer Registers base address otherwise bail out. */ | |
2791c1a4 DH |
276 | nnp = rootnp; |
277 | do { | |
278 | np = of_find_node_by_name(nnp, "GAISLER_GPTIMER"); | |
279 | if (!np) { | |
280 | np = of_find_node_by_name(nnp, "01_011"); | |
281 | if (!np) | |
282 | goto bad; | |
283 | } | |
284 | ||
285 | ampopts = 0; | |
286 | pp = of_find_property(np, "ampopts", &len); | |
287 | if (pp) { | |
288 | ampopts = *(int *)pp->value; | |
289 | if (ampopts == 0) { | |
290 | /* Skip this instance, resource already | |
291 | * allocated by other OS */ | |
292 | nnp = np; | |
293 | continue; | |
294 | } | |
295 | } | |
296 | ||
297 | /* Select Timer-Instance on Timer Core. Default is zero */ | |
298 | leon3_gptimer_idx = ampopts & 0x7; | |
299 | ||
300 | pp = of_find_property(np, "reg", &len); | |
301 | if (pp) | |
302 | leon3_gptimer_regs = *(struct leon3_gptimer_regs_map **) | |
303 | pp->value; | |
304 | pp = of_find_property(np, "interrupts", &len); | |
305 | if (pp) | |
306 | leon3_gptimer_irq = *(unsigned int *)pp->value; | |
307 | } while (0); | |
53aea7ca | 308 | |
a481b5d0 DH |
309 | if (!(leon3_gptimer_regs && leon3_irqctrl_regs && leon3_gptimer_irq)) |
310 | goto bad; | |
311 | ||
312 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val, 0); | |
313 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld, | |
314 | (((1000000 / HZ) - 1))); | |
315 | LEON3_BYPASS_STORE_PA( | |
2791c1a4 | 316 | &leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, 0); |
5213a780 | 317 | |
8401707f | 318 | #ifdef CONFIG_SMP |
a481b5d0 | 319 | leon3_ticker_irq = leon3_gptimer_irq + 1 + leon3_gptimer_idx; |
8401707f | 320 | |
a481b5d0 DH |
321 | if (!(LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->config) & |
322 | (1<<LEON3_GPTIMER_SEPIRQ))) { | |
323 | printk(KERN_ERR "timer not configured with separate irqs\n"); | |
324 | BUG(); | |
5213a780 KE |
325 | } |
326 | ||
a481b5d0 DH |
327 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].val, |
328 | 0); | |
329 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].rld, | |
330 | (((1000000/HZ) - 1))); | |
331 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].ctrl, | |
332 | 0); | |
333 | #endif | |
334 | ||
335 | /* | |
336 | * The IRQ controller may (if implemented) consist of multiple | |
337 | * IRQ controllers, each mapped on a 4Kb boundary. | |
338 | * Each CPU may be routed to different IRQCTRLs, however | |
339 | * we assume that all CPUs (in SMP system) is routed to the | |
340 | * same IRQ Controller, and for non-SMP only one IRQCTRL is | |
341 | * accessed anyway. | |
342 | * In AMP systems, Linux must run on CPU0 for the time being. | |
343 | */ | |
01dae0f0 DH |
344 | icsel = LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->icsel[boot_cpu_id/8]); |
345 | icsel = (icsel >> ((7 - (boot_cpu_id&0x7)) * 4)) & 0xf; | |
a481b5d0 DH |
346 | leon3_irqctrl_regs += icsel; |
347 | ||
970def65 DH |
348 | /* Mask all IRQs on boot-cpu IRQ controller */ |
349 | LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs->mask[boot_cpu_id], 0); | |
350 | ||
a481b5d0 DH |
351 | /* Probe extended IRQ controller */ |
352 | eirq = (LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->mpstatus) | |
353 | >> 16) & 0xf; | |
354 | if (eirq != 0) | |
355 | leon_eirq_setup(eirq); | |
356 | ||
4c6773c3 | 357 | irq = _leon_build_device_irq(NULL, leon3_gptimer_irq+leon3_gptimer_idx); |
6baa9b20 | 358 | err = request_irq(irq, counter_fn, IRQF_TIMER, "timer", NULL); |
6baa9b20 | 359 | if (err) { |
a481b5d0 | 360 | printk(KERN_ERR "unable to attach timer IRQ%d\n", irq); |
5213a780 KE |
361 | prom_halt(); |
362 | } | |
363 | ||
a481b5d0 DH |
364 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, |
365 | LEON3_GPTIMER_EN | | |
366 | LEON3_GPTIMER_RL | | |
367 | LEON3_GPTIMER_LD | | |
368 | LEON3_GPTIMER_IRQEN); | |
8401707f KE |
369 | |
370 | #ifdef CONFIG_SMP | |
a481b5d0 DH |
371 | /* Install per-cpu IRQ handler for broadcasted ticker */ |
372 | irq = leon_build_device_irq(leon3_ticker_irq, handle_percpu_irq, | |
373 | "per-cpu", 0); | |
374 | err = request_irq(irq, leon_percpu_timer_interrupt, | |
375 | IRQF_PERCPU | IRQF_TIMER, "ticker", | |
376 | NULL); | |
377 | if (err) { | |
378 | printk(KERN_ERR "unable to attach ticker IRQ%d\n", irq); | |
379 | prom_halt(); | |
380 | } | |
2cf95304 | 381 | |
a481b5d0 DH |
382 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].ctrl, |
383 | LEON3_GPTIMER_EN | | |
384 | LEON3_GPTIMER_RL | | |
385 | LEON3_GPTIMER_LD | | |
386 | LEON3_GPTIMER_IRQEN); | |
8401707f | 387 | #endif |
53aea7ca DH |
388 | return; |
389 | bad: | |
390 | printk(KERN_ERR "No Timer/irqctrl found\n"); | |
391 | BUG(); | |
392 | return; | |
5213a780 KE |
393 | } |
394 | ||
395 | void leon_clear_clock_irq(void) | |
396 | { | |
397 | } | |
398 | ||
399 | void leon_load_profile_irq(int cpu, unsigned int limit) | |
400 | { | |
401 | BUG(); | |
402 | } | |
403 | ||
5213a780 KE |
404 | void __init leon_trans_init(struct device_node *dp) |
405 | { | |
406 | if (strcmp(dp->type, "cpu") == 0 && strcmp(dp->name, "<NULL>") == 0) { | |
407 | struct property *p; | |
408 | p = of_find_property(dp, "mid", (void *)0); | |
409 | if (p) { | |
410 | int mid; | |
411 | dp->name = prom_early_alloc(5 + 1); | |
412 | memcpy(&mid, p->value, p->length); | |
413 | sprintf((char *)dp->name, "cpu%.2d", mid); | |
414 | } | |
415 | } | |
416 | } | |
417 | ||
418 | void __initdata (*prom_amba_init)(struct device_node *dp, struct device_node ***nextp) = 0; | |
419 | ||
420 | void __init leon_node_init(struct device_node *dp, struct device_node ***nextp) | |
421 | { | |
422 | if (prom_amba_init && | |
423 | strcmp(dp->type, "ambapp") == 0 && | |
424 | strcmp(dp->name, "ambapp0") == 0) { | |
425 | prom_amba_init(dp, nextp); | |
426 | } | |
427 | } | |
428 | ||
8401707f KE |
429 | #ifdef CONFIG_SMP |
430 | ||
431 | void leon_set_cpu_int(int cpu, int level) | |
432 | { | |
433 | unsigned long mask; | |
434 | mask = get_irqmask(level); | |
435 | LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs->force[cpu], mask); | |
436 | } | |
437 | ||
438 | static void leon_clear_ipi(int cpu, int level) | |
439 | { | |
440 | unsigned long mask; | |
441 | mask = get_irqmask(level); | |
442 | LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs->force[cpu], mask<<16); | |
443 | } | |
444 | ||
445 | static void leon_set_udt(int cpu) | |
446 | { | |
447 | } | |
448 | ||
449 | void leon_clear_profile_irq(int cpu) | |
450 | { | |
451 | } | |
452 | ||
453 | void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu) | |
454 | { | |
455 | unsigned long mask, flags, *addr; | |
456 | mask = get_irqmask(irq_nr); | |
d61a38b2 | 457 | spin_lock_irqsave(&leon_irq_lock, flags); |
a481b5d0 DH |
458 | addr = (unsigned long *)LEON_IMASK(cpu); |
459 | LEON3_BYPASS_STORE_PA(addr, (LEON3_BYPASS_LOAD_PA(addr) | mask)); | |
d61a38b2 | 460 | spin_unlock_irqrestore(&leon_irq_lock, flags); |
8401707f KE |
461 | } |
462 | ||
463 | #endif | |
464 | ||
5213a780 KE |
465 | void __init leon_init_IRQ(void) |
466 | { | |
6baa9b20 | 467 | sparc_irq_config.init_timers = leon_init_timers; |
4c6773c3 | 468 | sparc_irq_config.build_device_irq = _leon_build_device_irq; |
5213a780 KE |
469 | |
470 | BTFIXUPSET_CALL(clear_clock_irq, leon_clear_clock_irq, | |
471 | BTFIXUPCALL_NORM); | |
472 | BTFIXUPSET_CALL(load_profile_irq, leon_load_profile_irq, | |
473 | BTFIXUPCALL_NOP); | |
474 | ||
475 | #ifdef CONFIG_SMP | |
476 | BTFIXUPSET_CALL(set_cpu_int, leon_set_cpu_int, BTFIXUPCALL_NORM); | |
477 | BTFIXUPSET_CALL(clear_cpu_int, leon_clear_ipi, BTFIXUPCALL_NORM); | |
478 | BTFIXUPSET_CALL(set_irq_udt, leon_set_udt, BTFIXUPCALL_NORM); | |
479 | #endif | |
480 | ||
481 | } | |
482 | ||
483 | void __init leon_init(void) | |
484 | { | |
ed418502 | 485 | of_pdt_build_more = &leon_node_init; |
5213a780 | 486 | } |