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Commit | Line | Data |
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a2bd4fd1 DM |
1 | #include <linux/string.h> |
2 | #include <linux/kernel.h> | |
f85ff305 | 3 | #include <linux/of.h> |
a2bd4fd1 | 4 | #include <linux/init.h> |
066bcaca | 5 | #include <linux/export.h> |
a2bd4fd1 DM |
6 | #include <linux/mod_devicetable.h> |
7 | #include <linux/slab.h> | |
3f23de10 | 8 | #include <linux/errno.h> |
c1b1a5f1 | 9 | #include <linux/irq.h> |
3f23de10 SR |
10 | #include <linux/of_device.h> |
11 | #include <linux/of_platform.h> | |
c2068dab | 12 | #include <asm/spitfire.h> |
a2bd4fd1 | 13 | |
c9f5b7e7 RR |
14 | #include "of_device_common.h" |
15 | ||
3ca9fab4 DM |
16 | void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name) |
17 | { | |
18 | unsigned long ret = res->start + offset; | |
6bda5736 | 19 | struct resource *r; |
3ca9fab4 | 20 | |
6bda5736 DM |
21 | if (res->flags & IORESOURCE_MEM) |
22 | r = request_mem_region(ret, size, name); | |
23 | else | |
24 | r = request_region(ret, size, name); | |
25 | if (!r) | |
3ca9fab4 DM |
26 | ret = 0; |
27 | ||
28 | return (void __iomem *) ret; | |
29 | } | |
30 | EXPORT_SYMBOL(of_ioremap); | |
31 | ||
e3a411a3 | 32 | void of_iounmap(struct resource *res, void __iomem *base, unsigned long size) |
3ca9fab4 | 33 | { |
e3a411a3 DM |
34 | if (res->flags & IORESOURCE_MEM) |
35 | release_mem_region((unsigned long) base, size); | |
36 | else | |
37 | release_region((unsigned long) base, size); | |
3ca9fab4 DM |
38 | } |
39 | EXPORT_SYMBOL(of_iounmap); | |
40 | ||
cf44bbc2 DM |
41 | /* |
42 | * PCI bus specific translator | |
43 | */ | |
44 | ||
45 | static int of_bus_pci_match(struct device_node *np) | |
46 | { | |
7ee766d8 | 47 | if (!strcmp(np->name, "pci")) { |
a165b420 | 48 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
49 | |
50 | if (model && !strcmp(model, "SUNW,simba")) | |
51 | return 0; | |
52 | ||
a83f9823 DM |
53 | /* Do not do PCI specific frobbing if the |
54 | * PCI bridge lacks a ranges property. We | |
55 | * want to pass it through up to the next | |
56 | * parent as-is, not with the PCI translate | |
57 | * method which chops off the top address cell. | |
58 | */ | |
59 | if (!of_find_property(np, "ranges", NULL)) | |
60 | return 0; | |
61 | ||
62 | return 1; | |
63 | } | |
64 | ||
65 | return 0; | |
cf44bbc2 DM |
66 | } |
67 | ||
01f94c4a DM |
68 | static int of_bus_simba_match(struct device_node *np) |
69 | { | |
a165b420 | 70 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
71 | |
72 | if (model && !strcmp(model, "SUNW,simba")) | |
73 | return 1; | |
8c2786cf DM |
74 | |
75 | /* Treat PCI busses lacking ranges property just like | |
76 | * simba. | |
77 | */ | |
7ee766d8 | 78 | if (!strcmp(np->name, "pci")) { |
8c2786cf DM |
79 | if (!of_find_property(np, "ranges", NULL)) |
80 | return 1; | |
81 | } | |
82 | ||
01f94c4a DM |
83 | return 0; |
84 | } | |
85 | ||
86 | static int of_bus_simba_map(u32 *addr, const u32 *range, | |
87 | int na, int ns, int pna) | |
88 | { | |
89 | return 0; | |
90 | } | |
91 | ||
cf44bbc2 DM |
92 | static void of_bus_pci_count_cells(struct device_node *np, |
93 | int *addrc, int *sizec) | |
94 | { | |
95 | if (addrc) | |
96 | *addrc = 3; | |
97 | if (sizec) | |
98 | *sizec = 2; | |
99 | } | |
100 | ||
a83f9823 DM |
101 | static int of_bus_pci_map(u32 *addr, const u32 *range, |
102 | int na, int ns, int pna) | |
cf44bbc2 | 103 | { |
a83f9823 DM |
104 | u32 result[OF_MAX_ADDR_CELLS]; |
105 | int i; | |
cf44bbc2 DM |
106 | |
107 | /* Check address type match */ | |
4230fa3b DM |
108 | if (!((addr[0] ^ range[0]) & 0x03000000)) |
109 | goto type_match; | |
110 | ||
111 | /* Special exception, we can map a 64-bit address into | |
112 | * a 32-bit range. | |
113 | */ | |
114 | if ((addr[0] & 0x03000000) == 0x03000000 && | |
115 | (range[0] & 0x03000000) == 0x02000000) | |
116 | goto type_match; | |
117 | ||
118 | return -EINVAL; | |
cf44bbc2 | 119 | |
4230fa3b | 120 | type_match: |
a83f9823 DM |
121 | if (of_out_of_range(addr + 1, range + 1, range + na + pna, |
122 | na - 1, ns)) | |
123 | return -EINVAL; | |
cf44bbc2 | 124 | |
a83f9823 DM |
125 | /* Start with the parent range base. */ |
126 | memcpy(result, range + na, pna * 4); | |
cf44bbc2 | 127 | |
a83f9823 DM |
128 | /* Add in the child address offset, skipping high cell. */ |
129 | for (i = 0; i < na - 1; i++) | |
130 | result[pna - 1 - i] += | |
131 | (addr[na - 1 - i] - | |
132 | range[na - 1 - i]); | |
133 | ||
134 | memcpy(addr, result, pna * 4); | |
135 | ||
136 | return 0; | |
cf44bbc2 DM |
137 | } |
138 | ||
e3c71a32 | 139 | static unsigned long of_bus_pci_get_flags(const u32 *addr, unsigned long flags) |
cf44bbc2 | 140 | { |
cf44bbc2 DM |
141 | u32 w = addr[0]; |
142 | ||
e3c71a32 DM |
143 | /* For PCI, we override whatever child busses may have used. */ |
144 | flags = 0; | |
cf44bbc2 DM |
145 | switch((w >> 24) & 0x03) { |
146 | case 0x01: | |
147 | flags |= IORESOURCE_IO; | |
e3c71a32 DM |
148 | break; |
149 | ||
cf44bbc2 DM |
150 | case 0x02: /* 32 bits */ |
151 | case 0x03: /* 64 bits */ | |
152 | flags |= IORESOURCE_MEM; | |
e3c71a32 | 153 | break; |
cf44bbc2 DM |
154 | } |
155 | if (w & 0x40000000) | |
156 | flags |= IORESOURCE_PREFETCH; | |
157 | return flags; | |
158 | } | |
159 | ||
4130a4b2 DM |
160 | /* |
161 | * FHC/Central bus specific translator. | |
162 | * | |
163 | * This is just needed to hard-code the address and size cell | |
164 | * counts. 'fhc' and 'central' nodes lack the #address-cells and | |
165 | * #size-cells properties, and if you walk to the root on such | |
166 | * Enterprise boxes all you'll get is a #size-cells of 2 which is | |
167 | * not what we want to use. | |
168 | */ | |
169 | static int of_bus_fhc_match(struct device_node *np) | |
cf44bbc2 | 170 | { |
4130a4b2 DM |
171 | return !strcmp(np->name, "fhc") || |
172 | !strcmp(np->name, "central"); | |
cf44bbc2 DM |
173 | } |
174 | ||
4130a4b2 | 175 | #define of_bus_fhc_count_cells of_bus_sbus_count_cells |
cf44bbc2 DM |
176 | |
177 | /* | |
178 | * Array of bus specific translators | |
179 | */ | |
180 | ||
181 | static struct of_bus of_busses[] = { | |
182 | /* PCI */ | |
183 | { | |
184 | .name = "pci", | |
185 | .addr_prop_name = "assigned-addresses", | |
186 | .match = of_bus_pci_match, | |
187 | .count_cells = of_bus_pci_count_cells, | |
188 | .map = of_bus_pci_map, | |
cf44bbc2 DM |
189 | .get_flags = of_bus_pci_get_flags, |
190 | }, | |
01f94c4a DM |
191 | /* SIMBA */ |
192 | { | |
193 | .name = "simba", | |
194 | .addr_prop_name = "assigned-addresses", | |
195 | .match = of_bus_simba_match, | |
196 | .count_cells = of_bus_pci_count_cells, | |
197 | .map = of_bus_simba_map, | |
198 | .get_flags = of_bus_pci_get_flags, | |
199 | }, | |
cf44bbc2 DM |
200 | /* SBUS */ |
201 | { | |
202 | .name = "sbus", | |
203 | .addr_prop_name = "reg", | |
204 | .match = of_bus_sbus_match, | |
205 | .count_cells = of_bus_sbus_count_cells, | |
4130a4b2 DM |
206 | .map = of_bus_default_map, |
207 | .get_flags = of_bus_default_get_flags, | |
208 | }, | |
209 | /* FHC */ | |
210 | { | |
211 | .name = "fhc", | |
212 | .addr_prop_name = "reg", | |
213 | .match = of_bus_fhc_match, | |
214 | .count_cells = of_bus_fhc_count_cells, | |
215 | .map = of_bus_default_map, | |
216 | .get_flags = of_bus_default_get_flags, | |
cf44bbc2 DM |
217 | }, |
218 | /* Default */ | |
219 | { | |
220 | .name = "default", | |
221 | .addr_prop_name = "reg", | |
222 | .match = NULL, | |
223 | .count_cells = of_bus_default_count_cells, | |
224 | .map = of_bus_default_map, | |
cf44bbc2 DM |
225 | .get_flags = of_bus_default_get_flags, |
226 | }, | |
227 | }; | |
228 | ||
229 | static struct of_bus *of_match_bus(struct device_node *np) | |
230 | { | |
231 | int i; | |
232 | ||
233 | for (i = 0; i < ARRAY_SIZE(of_busses); i ++) | |
234 | if (!of_busses[i].match || of_busses[i].match(np)) | |
235 | return &of_busses[i]; | |
236 | BUG(); | |
237 | return NULL; | |
238 | } | |
239 | ||
240 | static int __init build_one_resource(struct device_node *parent, | |
241 | struct of_bus *bus, | |
242 | struct of_bus *pbus, | |
243 | u32 *addr, | |
244 | int na, int ns, int pna) | |
245 | { | |
6a23acf3 | 246 | const u32 *ranges; |
21cd8833 | 247 | int rone, rlen; |
cf44bbc2 DM |
248 | |
249 | ranges = of_get_property(parent, "ranges", &rlen); | |
250 | if (ranges == NULL || rlen == 0) { | |
a83f9823 DM |
251 | u32 result[OF_MAX_ADDR_CELLS]; |
252 | int i; | |
253 | ||
254 | memset(result, 0, pna * 4); | |
255 | for (i = 0; i < na; i++) | |
256 | result[pna - 1 - i] = | |
257 | addr[na - 1 - i]; | |
258 | ||
259 | memcpy(addr, result, pna * 4); | |
260 | return 0; | |
cf44bbc2 DM |
261 | } |
262 | ||
263 | /* Now walk through the ranges */ | |
264 | rlen /= 4; | |
265 | rone = na + pna + ns; | |
266 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
a83f9823 DM |
267 | if (!bus->map(addr, ranges, na, ns, pna)) |
268 | return 0; | |
cf44bbc2 | 269 | } |
a83f9823 | 270 | |
49d23cfc DM |
271 | /* When we miss an I/O space match on PCI, just pass it up |
272 | * to the next PCI bridge and/or controller. | |
273 | */ | |
274 | if (!strcmp(bus->name, "pci") && | |
275 | (addr[0] & 0x03000000) == 0x01000000) | |
276 | return 0; | |
277 | ||
a83f9823 DM |
278 | return 1; |
279 | } | |
280 | ||
281 | static int __init use_1to1_mapping(struct device_node *pp) | |
282 | { | |
a83f9823 DM |
283 | /* If we have a ranges property in the parent, use it. */ |
284 | if (of_find_property(pp, "ranges", NULL) != NULL) | |
285 | return 0; | |
cf44bbc2 | 286 | |
a83f9823 DM |
287 | /* If the parent is the dma node of an ISA bus, pass |
288 | * the translation up to the root. | |
5280267c DM |
289 | * |
290 | * Some SBUS devices use intermediate nodes to express | |
291 | * hierarchy within the device itself. These aren't | |
292 | * real bus nodes, and don't have a 'ranges' property. | |
293 | * But, we should still pass the translation work up | |
294 | * to the SBUS itself. | |
a83f9823 | 295 | */ |
5280267c DM |
296 | if (!strcmp(pp->name, "dma") || |
297 | !strcmp(pp->name, "espdma") || | |
298 | !strcmp(pp->name, "ledma") || | |
299 | !strcmp(pp->name, "lebuffer")) | |
a83f9823 DM |
300 | return 0; |
301 | ||
8c2786cf DM |
302 | /* Similarly for all PCI bridges, if we get this far |
303 | * it lacks a ranges property, and this will include | |
304 | * cases like Simba. | |
305 | */ | |
7ee766d8 | 306 | if (!strcmp(pp->name, "pci")) |
a83f9823 DM |
307 | return 0; |
308 | ||
309 | return 1; | |
cf44bbc2 DM |
310 | } |
311 | ||
a83f9823 DM |
312 | static int of_resource_verbose; |
313 | ||
cd4cd730 | 314 | static void __init build_device_resources(struct platform_device *op, |
cf44bbc2 DM |
315 | struct device *parent) |
316 | { | |
cd4cd730 | 317 | struct platform_device *p_op; |
cf44bbc2 DM |
318 | struct of_bus *bus; |
319 | int na, ns; | |
320 | int index, num_reg; | |
6a23acf3 | 321 | const void *preg; |
cf44bbc2 DM |
322 | |
323 | if (!parent) | |
324 | return; | |
325 | ||
cd4cd730 | 326 | p_op = to_platform_device(parent); |
61c7a080 GL |
327 | bus = of_match_bus(p_op->dev.of_node); |
328 | bus->count_cells(op->dev.of_node, &na, &ns); | |
cf44bbc2 | 329 | |
61c7a080 | 330 | preg = of_get_property(op->dev.of_node, bus->addr_prop_name, &num_reg); |
cf44bbc2 DM |
331 | if (!preg || num_reg == 0) |
332 | return; | |
333 | ||
334 | /* Convert to num-cells. */ | |
335 | num_reg /= 4; | |
336 | ||
46ba6d7d | 337 | /* Convert to num-entries. */ |
cf44bbc2 DM |
338 | num_reg /= na + ns; |
339 | ||
e5dd42e4 | 340 | /* Prevent overrunning the op->resources[] array. */ |
46ba6d7d DM |
341 | if (num_reg > PROMREG_MAX) { |
342 | printk(KERN_WARNING "%s: Too many regs (%d), " | |
343 | "limiting to %d.\n", | |
61c7a080 | 344 | op->dev.of_node->full_name, num_reg, PROMREG_MAX); |
46ba6d7d DM |
345 | num_reg = PROMREG_MAX; |
346 | } | |
347 | ||
1636f8ac GL |
348 | op->resource = op->archdata.resource; |
349 | op->num_resources = num_reg; | |
cf44bbc2 DM |
350 | for (index = 0; index < num_reg; index++) { |
351 | struct resource *r = &op->resource[index]; | |
352 | u32 addr[OF_MAX_ADDR_CELLS]; | |
6a23acf3 | 353 | const u32 *reg = (preg + (index * ((na + ns) * 4))); |
61c7a080 GL |
354 | struct device_node *dp = op->dev.of_node; |
355 | struct device_node *pp = p_op->dev.of_node; | |
b85cdd49 | 356 | struct of_bus *pbus, *dbus; |
cf44bbc2 DM |
357 | u64 size, result = OF_BAD_ADDR; |
358 | unsigned long flags; | |
359 | int dna, dns; | |
360 | int pna, pns; | |
361 | ||
362 | size = of_read_addr(reg + na, ns); | |
cf44bbc2 DM |
363 | memcpy(addr, reg, na * 4); |
364 | ||
e3c71a32 DM |
365 | flags = bus->get_flags(addr, 0); |
366 | ||
a83f9823 | 367 | if (use_1to1_mapping(pp)) { |
cf44bbc2 DM |
368 | result = of_read_addr(addr, na); |
369 | goto build_res; | |
370 | } | |
371 | ||
372 | dna = na; | |
373 | dns = ns; | |
b85cdd49 | 374 | dbus = bus; |
cf44bbc2 DM |
375 | |
376 | while (1) { | |
377 | dp = pp; | |
378 | pp = dp->parent; | |
379 | if (!pp) { | |
380 | result = of_read_addr(addr, dna); | |
381 | break; | |
382 | } | |
383 | ||
384 | pbus = of_match_bus(pp); | |
385 | pbus->count_cells(dp, &pna, &pns); | |
386 | ||
b85cdd49 | 387 | if (build_one_resource(dp, dbus, pbus, addr, |
a83f9823 | 388 | dna, dns, pna)) |
cf44bbc2 DM |
389 | break; |
390 | ||
e3c71a32 DM |
391 | flags = pbus->get_flags(addr, flags); |
392 | ||
cf44bbc2 DM |
393 | dna = pna; |
394 | dns = pns; | |
b85cdd49 | 395 | dbus = pbus; |
cf44bbc2 DM |
396 | } |
397 | ||
398 | build_res: | |
399 | memset(r, 0, sizeof(*r)); | |
a83f9823 DM |
400 | |
401 | if (of_resource_verbose) | |
90181136 | 402 | printk("%s reg[%d] -> %llx\n", |
61c7a080 | 403 | op->dev.of_node->full_name, index, |
a83f9823 DM |
404 | result); |
405 | ||
cf44bbc2 | 406 | if (result != OF_BAD_ADDR) { |
1815aed5 DM |
407 | if (tlb_type == hypervisor) |
408 | result &= 0x0fffffffffffffffUL; | |
409 | ||
cf44bbc2 DM |
410 | r->start = result; |
411 | r->end = result + size - 1; | |
412 | r->flags = flags; | |
cf44bbc2 | 413 | } |
61c7a080 | 414 | r->name = op->dev.of_node->name; |
cf44bbc2 DM |
415 | } |
416 | } | |
417 | ||
2b1e5978 DM |
418 | static struct device_node * __init |
419 | apply_interrupt_map(struct device_node *dp, struct device_node *pp, | |
6a23acf3 | 420 | const u32 *imap, int imlen, const u32 *imask, |
2b1e5978 DM |
421 | unsigned int *irq_p) |
422 | { | |
423 | struct device_node *cp; | |
424 | unsigned int irq = *irq_p; | |
425 | struct of_bus *bus; | |
426 | phandle handle; | |
6a23acf3 | 427 | const u32 *reg; |
2b1e5978 DM |
428 | int na, num_reg, i; |
429 | ||
430 | bus = of_match_bus(pp); | |
431 | bus->count_cells(dp, &na, NULL); | |
432 | ||
433 | reg = of_get_property(dp, "reg", &num_reg); | |
434 | if (!reg || !num_reg) | |
435 | return NULL; | |
436 | ||
437 | imlen /= ((na + 3) * 4); | |
438 | handle = 0; | |
439 | for (i = 0; i < imlen; i++) { | |
440 | int j; | |
441 | ||
442 | for (j = 0; j < na; j++) { | |
443 | if ((reg[j] & imask[j]) != imap[j]) | |
444 | goto next; | |
445 | } | |
446 | if (imap[na] == irq) { | |
447 | handle = imap[na + 1]; | |
448 | irq = imap[na + 2]; | |
449 | break; | |
450 | } | |
451 | ||
452 | next: | |
453 | imap += (na + 3); | |
454 | } | |
46ba6d7d DM |
455 | if (i == imlen) { |
456 | /* Psycho and Sabre PCI controllers can have 'interrupt-map' | |
457 | * properties that do not include the on-board device | |
458 | * interrupts. Instead, the device's 'interrupts' property | |
459 | * is already a fully specified INO value. | |
460 | * | |
461 | * Handle this by deciding that, if we didn't get a | |
462 | * match in the parent's 'interrupt-map', and the | |
25985edc | 463 | * parent is an IRQ translator, then use the parent as |
46ba6d7d DM |
464 | * our IRQ controller. |
465 | */ | |
466 | if (pp->irq_trans) | |
467 | return pp; | |
468 | ||
2b1e5978 | 469 | return NULL; |
46ba6d7d | 470 | } |
2b1e5978 DM |
471 | |
472 | *irq_p = irq; | |
473 | cp = of_find_node_by_phandle(handle); | |
474 | ||
475 | return cp; | |
476 | } | |
477 | ||
478 | static unsigned int __init pci_irq_swizzle(struct device_node *dp, | |
479 | struct device_node *pp, | |
480 | unsigned int irq) | |
481 | { | |
6a23acf3 | 482 | const struct linux_prom_pci_registers *regs; |
bb4c18cb | 483 | unsigned int bus, devfn, slot, ret; |
2b1e5978 DM |
484 | |
485 | if (irq < 1 || irq > 4) | |
486 | return irq; | |
487 | ||
488 | regs = of_get_property(dp, "reg", NULL); | |
489 | if (!regs) | |
490 | return irq; | |
491 | ||
bb4c18cb | 492 | bus = (regs->phys_hi >> 16) & 0xff; |
2b1e5978 DM |
493 | devfn = (regs->phys_hi >> 8) & 0xff; |
494 | slot = (devfn >> 3) & 0x1f; | |
495 | ||
bb4c18cb DM |
496 | if (pp->irq_trans) { |
497 | /* Derived from Table 8-3, U2P User's Manual. This branch | |
498 | * is handling a PCI controller that lacks a proper set of | |
499 | * interrupt-map and interrupt-map-mask properties. The | |
500 | * Ultra-E450 is one example. | |
501 | * | |
502 | * The bit layout is BSSLL, where: | |
503 | * B: 0 on bus A, 1 on bus B | |
504 | * D: 2-bit slot number, derived from PCI device number as | |
505 | * (dev - 1) for bus A, or (dev - 2) for bus B | |
506 | * L: 2-bit line number | |
bb4c18cb DM |
507 | */ |
508 | if (bus & 0x80) { | |
509 | /* PBM-A */ | |
510 | bus = 0x00; | |
511 | slot = (slot - 1) << 2; | |
512 | } else { | |
513 | /* PBM-B */ | |
514 | bus = 0x10; | |
515 | slot = (slot - 2) << 2; | |
516 | } | |
517 | irq -= 1; | |
518 | ||
519 | ret = (bus | slot | irq); | |
520 | } else { | |
521 | /* Going through a PCI-PCI bridge that lacks a set of | |
522 | * interrupt-map and interrupt-map-mask properties. | |
523 | */ | |
524 | ret = ((irq - 1 + (slot & 3)) & 3) + 1; | |
525 | } | |
2b1e5978 DM |
526 | |
527 | return ret; | |
528 | } | |
529 | ||
a83f9823 DM |
530 | static int of_irq_verbose; |
531 | ||
cd4cd730 | 532 | static unsigned int __init build_one_device_irq(struct platform_device *op, |
2b1e5978 DM |
533 | struct device *parent, |
534 | unsigned int irq) | |
535 | { | |
61c7a080 | 536 | struct device_node *dp = op->dev.of_node; |
2b1e5978 DM |
537 | struct device_node *pp, *ip; |
538 | unsigned int orig_irq = irq; | |
c1b1a5f1 | 539 | int nid; |
2b1e5978 DM |
540 | |
541 | if (irq == 0xffffffff) | |
542 | return irq; | |
543 | ||
544 | if (dp->irq_trans) { | |
545 | irq = dp->irq_trans->irq_build(dp, irq, | |
546 | dp->irq_trans->data); | |
a83f9823 DM |
547 | |
548 | if (of_irq_verbose) | |
549 | printk("%s: direct translate %x --> %x\n", | |
550 | dp->full_name, orig_irq, irq); | |
551 | ||
c1b1a5f1 | 552 | goto out; |
2b1e5978 DM |
553 | } |
554 | ||
555 | /* Something more complicated. Walk up to the root, applying | |
556 | * interrupt-map or bus specific translations, until we hit | |
557 | * an IRQ translator. | |
558 | * | |
559 | * If we hit a bus type or situation we cannot handle, we | |
560 | * stop and assume that the original IRQ number was in a | |
561 | * format which has special meaning to it's immediate parent. | |
562 | */ | |
563 | pp = dp->parent; | |
564 | ip = NULL; | |
565 | while (pp) { | |
6a23acf3 | 566 | const void *imap, *imsk; |
2b1e5978 DM |
567 | int imlen; |
568 | ||
569 | imap = of_get_property(pp, "interrupt-map", &imlen); | |
570 | imsk = of_get_property(pp, "interrupt-map-mask", NULL); | |
571 | if (imap && imsk) { | |
572 | struct device_node *iret; | |
573 | int this_orig_irq = irq; | |
574 | ||
575 | iret = apply_interrupt_map(dp, pp, | |
576 | imap, imlen, imsk, | |
577 | &irq); | |
a83f9823 DM |
578 | |
579 | if (of_irq_verbose) | |
580 | printk("%s: Apply [%s:%x] imap --> [%s:%x]\n", | |
61c7a080 | 581 | op->dev.of_node->full_name, |
a83f9823 | 582 | pp->full_name, this_orig_irq, |
74a7f084 | 583 | of_node_full_name(iret), irq); |
a83f9823 | 584 | |
2b1e5978 DM |
585 | if (!iret) |
586 | break; | |
587 | ||
588 | if (iret->irq_trans) { | |
589 | ip = iret; | |
590 | break; | |
591 | } | |
592 | } else { | |
7ee766d8 | 593 | if (!strcmp(pp->name, "pci")) { |
2b1e5978 DM |
594 | unsigned int this_orig_irq = irq; |
595 | ||
596 | irq = pci_irq_swizzle(dp, pp, irq); | |
a83f9823 DM |
597 | if (of_irq_verbose) |
598 | printk("%s: PCI swizzle [%s] " | |
599 | "%x --> %x\n", | |
61c7a080 | 600 | op->dev.of_node->full_name, |
a83f9823 DM |
601 | pp->full_name, this_orig_irq, |
602 | irq); | |
603 | ||
2b1e5978 DM |
604 | } |
605 | ||
606 | if (pp->irq_trans) { | |
607 | ip = pp; | |
608 | break; | |
609 | } | |
610 | } | |
611 | dp = pp; | |
612 | pp = pp->parent; | |
613 | } | |
614 | if (!ip) | |
615 | return orig_irq; | |
616 | ||
61c7a080 | 617 | irq = ip->irq_trans->irq_build(op->dev.of_node, irq, |
2b1e5978 | 618 | ip->irq_trans->data); |
a83f9823 DM |
619 | if (of_irq_verbose) |
620 | printk("%s: Apply IRQ trans [%s] %x --> %x\n", | |
61c7a080 | 621 | op->dev.of_node->full_name, ip->full_name, orig_irq, irq); |
2b1e5978 | 622 | |
c1b1a5f1 DM |
623 | out: |
624 | nid = of_node_to_nid(dp); | |
625 | if (nid != -1) { | |
fb1fece5 | 626 | cpumask_t numa_mask; |
c1b1a5f1 | 627 | |
fb1fece5 | 628 | cpumask_copy(&numa_mask, cpumask_of_node(nid)); |
0de26520 | 629 | irq_set_affinity(irq, &numa_mask); |
c1b1a5f1 DM |
630 | } |
631 | ||
2b1e5978 DM |
632 | return irq; |
633 | } | |
634 | ||
cd4cd730 | 635 | static struct platform_device * __init scan_one_device(struct device_node *dp, |
cf44bbc2 DM |
636 | struct device *parent) |
637 | { | |
cd4cd730 | 638 | struct platform_device *op = kzalloc(sizeof(*op), GFP_KERNEL); |
6a23acf3 | 639 | const unsigned int *irq; |
3d6e4702 | 640 | struct dev_archdata *sd; |
2b1e5978 | 641 | int len, i; |
cf44bbc2 DM |
642 | |
643 | if (!op) | |
644 | return NULL; | |
645 | ||
3d6e4702 | 646 | sd = &op->dev.archdata; |
3d6e4702 DM |
647 | sd->op = op; |
648 | ||
d706c1b0 | 649 | op->dev.of_node = dp; |
cf44bbc2 | 650 | |
cf44bbc2 | 651 | irq = of_get_property(dp, "interrupts", &len); |
2b1e5978 | 652 | if (irq) { |
1636f8ac | 653 | op->archdata.num_irqs = len / 4; |
92d9091f RR |
654 | |
655 | /* Prevent overrunning the op->irqs[] array. */ | |
1636f8ac | 656 | if (op->archdata.num_irqs > PROMINTR_MAX) { |
92d9091f RR |
657 | printk(KERN_WARNING "%s: Too many irqs (%d), " |
658 | "limiting to %d.\n", | |
1636f8ac GL |
659 | dp->full_name, op->archdata.num_irqs, PROMINTR_MAX); |
660 | op->archdata.num_irqs = PROMINTR_MAX; | |
92d9091f | 661 | } |
1636f8ac | 662 | memcpy(op->archdata.irqs, irq, op->archdata.num_irqs * 4); |
2b1e5978 | 663 | } else { |
1636f8ac | 664 | op->archdata.num_irqs = 0; |
2b1e5978 | 665 | } |
cf44bbc2 DM |
666 | |
667 | build_device_resources(op, parent); | |
1636f8ac GL |
668 | for (i = 0; i < op->archdata.num_irqs; i++) |
669 | op->archdata.irqs[i] = build_one_device_irq(op, parent, op->archdata.irqs[i]); | |
cf44bbc2 DM |
670 | |
671 | op->dev.parent = parent; | |
eca39301 | 672 | op->dev.bus = &platform_bus_type; |
cf44bbc2 | 673 | if (!parent) |
2222c313 | 674 | dev_set_name(&op->dev, "root"); |
cf44bbc2 | 675 | else |
6016a363 | 676 | dev_set_name(&op->dev, "%08x", dp->phandle); |
cf44bbc2 DM |
677 | |
678 | if (of_device_register(op)) { | |
679 | printk("%s: Could not register of device.\n", | |
680 | dp->full_name); | |
681 | kfree(op); | |
682 | op = NULL; | |
683 | } | |
684 | ||
685 | return op; | |
686 | } | |
687 | ||
688 | static void __init scan_tree(struct device_node *dp, struct device *parent) | |
689 | { | |
690 | while (dp) { | |
cd4cd730 | 691 | struct platform_device *op = scan_one_device(dp, parent); |
cf44bbc2 DM |
692 | |
693 | if (op) | |
694 | scan_tree(dp->child, &op->dev); | |
695 | ||
696 | dp = dp->sibling; | |
697 | } | |
698 | } | |
699 | ||
eca39301 | 700 | static int __init scan_of_devices(void) |
cf44bbc2 DM |
701 | { |
702 | struct device_node *root = of_find_node_by_path("/"); | |
cd4cd730 | 703 | struct platform_device *parent; |
cf44bbc2 DM |
704 | |
705 | parent = scan_one_device(root, NULL); | |
706 | if (!parent) | |
eca39301 | 707 | return 0; |
cf44bbc2 DM |
708 | |
709 | scan_tree(root->child, &parent->dev); | |
eca39301 | 710 | return 0; |
cf44bbc2 | 711 | } |
eca39301 | 712 | postcore_initcall(scan_of_devices); |
a2bd4fd1 | 713 | |
a83f9823 DM |
714 | static int __init of_debug(char *str) |
715 | { | |
716 | int val = 0; | |
717 | ||
718 | get_option(&str, &val); | |
719 | if (val & 1) | |
720 | of_resource_verbose = 1; | |
721 | if (val & 2) | |
722 | of_irq_verbose = 1; | |
723 | return 1; | |
724 | } | |
725 | ||
726 | __setup("of_debug=", of_debug); |