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Commit | Line | Data |
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a2bd4fd1 DM |
1 | #include <linux/string.h> |
2 | #include <linux/kernel.h> | |
f85ff305 | 3 | #include <linux/of.h> |
a2bd4fd1 DM |
4 | #include <linux/init.h> |
5 | #include <linux/module.h> | |
6 | #include <linux/mod_devicetable.h> | |
7 | #include <linux/slab.h> | |
3f23de10 | 8 | #include <linux/errno.h> |
c1b1a5f1 | 9 | #include <linux/irq.h> |
3f23de10 SR |
10 | #include <linux/of_device.h> |
11 | #include <linux/of_platform.h> | |
a2bd4fd1 | 12 | |
c9f5b7e7 RR |
13 | #include "of_device_common.h" |
14 | ||
3ca9fab4 DM |
15 | void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name) |
16 | { | |
17 | unsigned long ret = res->start + offset; | |
6bda5736 | 18 | struct resource *r; |
3ca9fab4 | 19 | |
6bda5736 DM |
20 | if (res->flags & IORESOURCE_MEM) |
21 | r = request_mem_region(ret, size, name); | |
22 | else | |
23 | r = request_region(ret, size, name); | |
24 | if (!r) | |
3ca9fab4 DM |
25 | ret = 0; |
26 | ||
27 | return (void __iomem *) ret; | |
28 | } | |
29 | EXPORT_SYMBOL(of_ioremap); | |
30 | ||
e3a411a3 | 31 | void of_iounmap(struct resource *res, void __iomem *base, unsigned long size) |
3ca9fab4 | 32 | { |
e3a411a3 DM |
33 | if (res->flags & IORESOURCE_MEM) |
34 | release_mem_region((unsigned long) base, size); | |
35 | else | |
36 | release_region((unsigned long) base, size); | |
3ca9fab4 DM |
37 | } |
38 | EXPORT_SYMBOL(of_iounmap); | |
39 | ||
cf44bbc2 DM |
40 | /* |
41 | * PCI bus specific translator | |
42 | */ | |
43 | ||
44 | static int of_bus_pci_match(struct device_node *np) | |
45 | { | |
7ee766d8 | 46 | if (!strcmp(np->name, "pci")) { |
a165b420 | 47 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
48 | |
49 | if (model && !strcmp(model, "SUNW,simba")) | |
50 | return 0; | |
51 | ||
a83f9823 DM |
52 | /* Do not do PCI specific frobbing if the |
53 | * PCI bridge lacks a ranges property. We | |
54 | * want to pass it through up to the next | |
55 | * parent as-is, not with the PCI translate | |
56 | * method which chops off the top address cell. | |
57 | */ | |
58 | if (!of_find_property(np, "ranges", NULL)) | |
59 | return 0; | |
60 | ||
61 | return 1; | |
62 | } | |
63 | ||
64 | return 0; | |
cf44bbc2 DM |
65 | } |
66 | ||
01f94c4a DM |
67 | static int of_bus_simba_match(struct device_node *np) |
68 | { | |
a165b420 | 69 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
70 | |
71 | if (model && !strcmp(model, "SUNW,simba")) | |
72 | return 1; | |
8c2786cf DM |
73 | |
74 | /* Treat PCI busses lacking ranges property just like | |
75 | * simba. | |
76 | */ | |
7ee766d8 | 77 | if (!strcmp(np->name, "pci")) { |
8c2786cf DM |
78 | if (!of_find_property(np, "ranges", NULL)) |
79 | return 1; | |
80 | } | |
81 | ||
01f94c4a DM |
82 | return 0; |
83 | } | |
84 | ||
85 | static int of_bus_simba_map(u32 *addr, const u32 *range, | |
86 | int na, int ns, int pna) | |
87 | { | |
88 | return 0; | |
89 | } | |
90 | ||
cf44bbc2 DM |
91 | static void of_bus_pci_count_cells(struct device_node *np, |
92 | int *addrc, int *sizec) | |
93 | { | |
94 | if (addrc) | |
95 | *addrc = 3; | |
96 | if (sizec) | |
97 | *sizec = 2; | |
98 | } | |
99 | ||
a83f9823 DM |
100 | static int of_bus_pci_map(u32 *addr, const u32 *range, |
101 | int na, int ns, int pna) | |
cf44bbc2 | 102 | { |
a83f9823 DM |
103 | u32 result[OF_MAX_ADDR_CELLS]; |
104 | int i; | |
cf44bbc2 DM |
105 | |
106 | /* Check address type match */ | |
4230fa3b DM |
107 | if (!((addr[0] ^ range[0]) & 0x03000000)) |
108 | goto type_match; | |
109 | ||
110 | /* Special exception, we can map a 64-bit address into | |
111 | * a 32-bit range. | |
112 | */ | |
113 | if ((addr[0] & 0x03000000) == 0x03000000 && | |
114 | (range[0] & 0x03000000) == 0x02000000) | |
115 | goto type_match; | |
116 | ||
117 | return -EINVAL; | |
cf44bbc2 | 118 | |
4230fa3b | 119 | type_match: |
a83f9823 DM |
120 | if (of_out_of_range(addr + 1, range + 1, range + na + pna, |
121 | na - 1, ns)) | |
122 | return -EINVAL; | |
cf44bbc2 | 123 | |
a83f9823 DM |
124 | /* Start with the parent range base. */ |
125 | memcpy(result, range + na, pna * 4); | |
cf44bbc2 | 126 | |
a83f9823 DM |
127 | /* Add in the child address offset, skipping high cell. */ |
128 | for (i = 0; i < na - 1; i++) | |
129 | result[pna - 1 - i] += | |
130 | (addr[na - 1 - i] - | |
131 | range[na - 1 - i]); | |
132 | ||
133 | memcpy(addr, result, pna * 4); | |
134 | ||
135 | return 0; | |
cf44bbc2 DM |
136 | } |
137 | ||
e3c71a32 | 138 | static unsigned long of_bus_pci_get_flags(const u32 *addr, unsigned long flags) |
cf44bbc2 | 139 | { |
cf44bbc2 DM |
140 | u32 w = addr[0]; |
141 | ||
e3c71a32 DM |
142 | /* For PCI, we override whatever child busses may have used. */ |
143 | flags = 0; | |
cf44bbc2 DM |
144 | switch((w >> 24) & 0x03) { |
145 | case 0x01: | |
146 | flags |= IORESOURCE_IO; | |
e3c71a32 DM |
147 | break; |
148 | ||
cf44bbc2 DM |
149 | case 0x02: /* 32 bits */ |
150 | case 0x03: /* 64 bits */ | |
151 | flags |= IORESOURCE_MEM; | |
e3c71a32 | 152 | break; |
cf44bbc2 DM |
153 | } |
154 | if (w & 0x40000000) | |
155 | flags |= IORESOURCE_PREFETCH; | |
156 | return flags; | |
157 | } | |
158 | ||
4130a4b2 DM |
159 | /* |
160 | * FHC/Central bus specific translator. | |
161 | * | |
162 | * This is just needed to hard-code the address and size cell | |
163 | * counts. 'fhc' and 'central' nodes lack the #address-cells and | |
164 | * #size-cells properties, and if you walk to the root on such | |
165 | * Enterprise boxes all you'll get is a #size-cells of 2 which is | |
166 | * not what we want to use. | |
167 | */ | |
168 | static int of_bus_fhc_match(struct device_node *np) | |
cf44bbc2 | 169 | { |
4130a4b2 DM |
170 | return !strcmp(np->name, "fhc") || |
171 | !strcmp(np->name, "central"); | |
cf44bbc2 DM |
172 | } |
173 | ||
4130a4b2 | 174 | #define of_bus_fhc_count_cells of_bus_sbus_count_cells |
cf44bbc2 DM |
175 | |
176 | /* | |
177 | * Array of bus specific translators | |
178 | */ | |
179 | ||
180 | static struct of_bus of_busses[] = { | |
181 | /* PCI */ | |
182 | { | |
183 | .name = "pci", | |
184 | .addr_prop_name = "assigned-addresses", | |
185 | .match = of_bus_pci_match, | |
186 | .count_cells = of_bus_pci_count_cells, | |
187 | .map = of_bus_pci_map, | |
cf44bbc2 DM |
188 | .get_flags = of_bus_pci_get_flags, |
189 | }, | |
01f94c4a DM |
190 | /* SIMBA */ |
191 | { | |
192 | .name = "simba", | |
193 | .addr_prop_name = "assigned-addresses", | |
194 | .match = of_bus_simba_match, | |
195 | .count_cells = of_bus_pci_count_cells, | |
196 | .map = of_bus_simba_map, | |
197 | .get_flags = of_bus_pci_get_flags, | |
198 | }, | |
cf44bbc2 DM |
199 | /* SBUS */ |
200 | { | |
201 | .name = "sbus", | |
202 | .addr_prop_name = "reg", | |
203 | .match = of_bus_sbus_match, | |
204 | .count_cells = of_bus_sbus_count_cells, | |
4130a4b2 DM |
205 | .map = of_bus_default_map, |
206 | .get_flags = of_bus_default_get_flags, | |
207 | }, | |
208 | /* FHC */ | |
209 | { | |
210 | .name = "fhc", | |
211 | .addr_prop_name = "reg", | |
212 | .match = of_bus_fhc_match, | |
213 | .count_cells = of_bus_fhc_count_cells, | |
214 | .map = of_bus_default_map, | |
215 | .get_flags = of_bus_default_get_flags, | |
cf44bbc2 DM |
216 | }, |
217 | /* Default */ | |
218 | { | |
219 | .name = "default", | |
220 | .addr_prop_name = "reg", | |
221 | .match = NULL, | |
222 | .count_cells = of_bus_default_count_cells, | |
223 | .map = of_bus_default_map, | |
cf44bbc2 DM |
224 | .get_flags = of_bus_default_get_flags, |
225 | }, | |
226 | }; | |
227 | ||
228 | static struct of_bus *of_match_bus(struct device_node *np) | |
229 | { | |
230 | int i; | |
231 | ||
232 | for (i = 0; i < ARRAY_SIZE(of_busses); i ++) | |
233 | if (!of_busses[i].match || of_busses[i].match(np)) | |
234 | return &of_busses[i]; | |
235 | BUG(); | |
236 | return NULL; | |
237 | } | |
238 | ||
239 | static int __init build_one_resource(struct device_node *parent, | |
240 | struct of_bus *bus, | |
241 | struct of_bus *pbus, | |
242 | u32 *addr, | |
243 | int na, int ns, int pna) | |
244 | { | |
6a23acf3 | 245 | const u32 *ranges; |
21cd8833 | 246 | int rone, rlen; |
cf44bbc2 DM |
247 | |
248 | ranges = of_get_property(parent, "ranges", &rlen); | |
249 | if (ranges == NULL || rlen == 0) { | |
a83f9823 DM |
250 | u32 result[OF_MAX_ADDR_CELLS]; |
251 | int i; | |
252 | ||
253 | memset(result, 0, pna * 4); | |
254 | for (i = 0; i < na; i++) | |
255 | result[pna - 1 - i] = | |
256 | addr[na - 1 - i]; | |
257 | ||
258 | memcpy(addr, result, pna * 4); | |
259 | return 0; | |
cf44bbc2 DM |
260 | } |
261 | ||
262 | /* Now walk through the ranges */ | |
263 | rlen /= 4; | |
264 | rone = na + pna + ns; | |
265 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
a83f9823 DM |
266 | if (!bus->map(addr, ranges, na, ns, pna)) |
267 | return 0; | |
cf44bbc2 | 268 | } |
a83f9823 | 269 | |
49d23cfc DM |
270 | /* When we miss an I/O space match on PCI, just pass it up |
271 | * to the next PCI bridge and/or controller. | |
272 | */ | |
273 | if (!strcmp(bus->name, "pci") && | |
274 | (addr[0] & 0x03000000) == 0x01000000) | |
275 | return 0; | |
276 | ||
a83f9823 DM |
277 | return 1; |
278 | } | |
279 | ||
280 | static int __init use_1to1_mapping(struct device_node *pp) | |
281 | { | |
a83f9823 DM |
282 | /* If we have a ranges property in the parent, use it. */ |
283 | if (of_find_property(pp, "ranges", NULL) != NULL) | |
284 | return 0; | |
cf44bbc2 | 285 | |
a83f9823 DM |
286 | /* If the parent is the dma node of an ISA bus, pass |
287 | * the translation up to the root. | |
5280267c DM |
288 | * |
289 | * Some SBUS devices use intermediate nodes to express | |
290 | * hierarchy within the device itself. These aren't | |
291 | * real bus nodes, and don't have a 'ranges' property. | |
292 | * But, we should still pass the translation work up | |
293 | * to the SBUS itself. | |
a83f9823 | 294 | */ |
5280267c DM |
295 | if (!strcmp(pp->name, "dma") || |
296 | !strcmp(pp->name, "espdma") || | |
297 | !strcmp(pp->name, "ledma") || | |
298 | !strcmp(pp->name, "lebuffer")) | |
a83f9823 DM |
299 | return 0; |
300 | ||
8c2786cf DM |
301 | /* Similarly for all PCI bridges, if we get this far |
302 | * it lacks a ranges property, and this will include | |
303 | * cases like Simba. | |
304 | */ | |
7ee766d8 | 305 | if (!strcmp(pp->name, "pci")) |
a83f9823 DM |
306 | return 0; |
307 | ||
308 | return 1; | |
cf44bbc2 DM |
309 | } |
310 | ||
a83f9823 DM |
311 | static int of_resource_verbose; |
312 | ||
cd4cd730 | 313 | static void __init build_device_resources(struct platform_device *op, |
cf44bbc2 DM |
314 | struct device *parent) |
315 | { | |
cd4cd730 | 316 | struct platform_device *p_op; |
cf44bbc2 DM |
317 | struct of_bus *bus; |
318 | int na, ns; | |
319 | int index, num_reg; | |
6a23acf3 | 320 | const void *preg; |
cf44bbc2 DM |
321 | |
322 | if (!parent) | |
323 | return; | |
324 | ||
cd4cd730 | 325 | p_op = to_platform_device(parent); |
61c7a080 GL |
326 | bus = of_match_bus(p_op->dev.of_node); |
327 | bus->count_cells(op->dev.of_node, &na, &ns); | |
cf44bbc2 | 328 | |
61c7a080 | 329 | preg = of_get_property(op->dev.of_node, bus->addr_prop_name, &num_reg); |
cf44bbc2 DM |
330 | if (!preg || num_reg == 0) |
331 | return; | |
332 | ||
333 | /* Convert to num-cells. */ | |
334 | num_reg /= 4; | |
335 | ||
46ba6d7d | 336 | /* Convert to num-entries. */ |
cf44bbc2 DM |
337 | num_reg /= na + ns; |
338 | ||
e5dd42e4 | 339 | /* Prevent overrunning the op->resources[] array. */ |
46ba6d7d DM |
340 | if (num_reg > PROMREG_MAX) { |
341 | printk(KERN_WARNING "%s: Too many regs (%d), " | |
342 | "limiting to %d.\n", | |
61c7a080 | 343 | op->dev.of_node->full_name, num_reg, PROMREG_MAX); |
46ba6d7d DM |
344 | num_reg = PROMREG_MAX; |
345 | } | |
346 | ||
1636f8ac GL |
347 | op->resource = op->archdata.resource; |
348 | op->num_resources = num_reg; | |
cf44bbc2 DM |
349 | for (index = 0; index < num_reg; index++) { |
350 | struct resource *r = &op->resource[index]; | |
351 | u32 addr[OF_MAX_ADDR_CELLS]; | |
6a23acf3 | 352 | const u32 *reg = (preg + (index * ((na + ns) * 4))); |
61c7a080 GL |
353 | struct device_node *dp = op->dev.of_node; |
354 | struct device_node *pp = p_op->dev.of_node; | |
b85cdd49 | 355 | struct of_bus *pbus, *dbus; |
cf44bbc2 DM |
356 | u64 size, result = OF_BAD_ADDR; |
357 | unsigned long flags; | |
358 | int dna, dns; | |
359 | int pna, pns; | |
360 | ||
361 | size = of_read_addr(reg + na, ns); | |
cf44bbc2 DM |
362 | memcpy(addr, reg, na * 4); |
363 | ||
e3c71a32 DM |
364 | flags = bus->get_flags(addr, 0); |
365 | ||
a83f9823 | 366 | if (use_1to1_mapping(pp)) { |
cf44bbc2 DM |
367 | result = of_read_addr(addr, na); |
368 | goto build_res; | |
369 | } | |
370 | ||
371 | dna = na; | |
372 | dns = ns; | |
b85cdd49 | 373 | dbus = bus; |
cf44bbc2 DM |
374 | |
375 | while (1) { | |
376 | dp = pp; | |
377 | pp = dp->parent; | |
378 | if (!pp) { | |
379 | result = of_read_addr(addr, dna); | |
380 | break; | |
381 | } | |
382 | ||
383 | pbus = of_match_bus(pp); | |
384 | pbus->count_cells(dp, &pna, &pns); | |
385 | ||
b85cdd49 | 386 | if (build_one_resource(dp, dbus, pbus, addr, |
a83f9823 | 387 | dna, dns, pna)) |
cf44bbc2 DM |
388 | break; |
389 | ||
e3c71a32 DM |
390 | flags = pbus->get_flags(addr, flags); |
391 | ||
cf44bbc2 DM |
392 | dna = pna; |
393 | dns = pns; | |
b85cdd49 | 394 | dbus = pbus; |
cf44bbc2 DM |
395 | } |
396 | ||
397 | build_res: | |
398 | memset(r, 0, sizeof(*r)); | |
a83f9823 DM |
399 | |
400 | if (of_resource_verbose) | |
90181136 | 401 | printk("%s reg[%d] -> %llx\n", |
61c7a080 | 402 | op->dev.of_node->full_name, index, |
a83f9823 DM |
403 | result); |
404 | ||
cf44bbc2 | 405 | if (result != OF_BAD_ADDR) { |
1815aed5 DM |
406 | if (tlb_type == hypervisor) |
407 | result &= 0x0fffffffffffffffUL; | |
408 | ||
cf44bbc2 DM |
409 | r->start = result; |
410 | r->end = result + size - 1; | |
411 | r->flags = flags; | |
cf44bbc2 | 412 | } |
61c7a080 | 413 | r->name = op->dev.of_node->name; |
cf44bbc2 DM |
414 | } |
415 | } | |
416 | ||
2b1e5978 DM |
417 | static struct device_node * __init |
418 | apply_interrupt_map(struct device_node *dp, struct device_node *pp, | |
6a23acf3 | 419 | const u32 *imap, int imlen, const u32 *imask, |
2b1e5978 DM |
420 | unsigned int *irq_p) |
421 | { | |
422 | struct device_node *cp; | |
423 | unsigned int irq = *irq_p; | |
424 | struct of_bus *bus; | |
425 | phandle handle; | |
6a23acf3 | 426 | const u32 *reg; |
2b1e5978 DM |
427 | int na, num_reg, i; |
428 | ||
429 | bus = of_match_bus(pp); | |
430 | bus->count_cells(dp, &na, NULL); | |
431 | ||
432 | reg = of_get_property(dp, "reg", &num_reg); | |
433 | if (!reg || !num_reg) | |
434 | return NULL; | |
435 | ||
436 | imlen /= ((na + 3) * 4); | |
437 | handle = 0; | |
438 | for (i = 0; i < imlen; i++) { | |
439 | int j; | |
440 | ||
441 | for (j = 0; j < na; j++) { | |
442 | if ((reg[j] & imask[j]) != imap[j]) | |
443 | goto next; | |
444 | } | |
445 | if (imap[na] == irq) { | |
446 | handle = imap[na + 1]; | |
447 | irq = imap[na + 2]; | |
448 | break; | |
449 | } | |
450 | ||
451 | next: | |
452 | imap += (na + 3); | |
453 | } | |
46ba6d7d DM |
454 | if (i == imlen) { |
455 | /* Psycho and Sabre PCI controllers can have 'interrupt-map' | |
456 | * properties that do not include the on-board device | |
457 | * interrupts. Instead, the device's 'interrupts' property | |
458 | * is already a fully specified INO value. | |
459 | * | |
460 | * Handle this by deciding that, if we didn't get a | |
461 | * match in the parent's 'interrupt-map', and the | |
25985edc | 462 | * parent is an IRQ translator, then use the parent as |
46ba6d7d DM |
463 | * our IRQ controller. |
464 | */ | |
465 | if (pp->irq_trans) | |
466 | return pp; | |
467 | ||
2b1e5978 | 468 | return NULL; |
46ba6d7d | 469 | } |
2b1e5978 DM |
470 | |
471 | *irq_p = irq; | |
472 | cp = of_find_node_by_phandle(handle); | |
473 | ||
474 | return cp; | |
475 | } | |
476 | ||
477 | static unsigned int __init pci_irq_swizzle(struct device_node *dp, | |
478 | struct device_node *pp, | |
479 | unsigned int irq) | |
480 | { | |
6a23acf3 | 481 | const struct linux_prom_pci_registers *regs; |
bb4c18cb | 482 | unsigned int bus, devfn, slot, ret; |
2b1e5978 DM |
483 | |
484 | if (irq < 1 || irq > 4) | |
485 | return irq; | |
486 | ||
487 | regs = of_get_property(dp, "reg", NULL); | |
488 | if (!regs) | |
489 | return irq; | |
490 | ||
bb4c18cb | 491 | bus = (regs->phys_hi >> 16) & 0xff; |
2b1e5978 DM |
492 | devfn = (regs->phys_hi >> 8) & 0xff; |
493 | slot = (devfn >> 3) & 0x1f; | |
494 | ||
bb4c18cb DM |
495 | if (pp->irq_trans) { |
496 | /* Derived from Table 8-3, U2P User's Manual. This branch | |
497 | * is handling a PCI controller that lacks a proper set of | |
498 | * interrupt-map and interrupt-map-mask properties. The | |
499 | * Ultra-E450 is one example. | |
500 | * | |
501 | * The bit layout is BSSLL, where: | |
502 | * B: 0 on bus A, 1 on bus B | |
503 | * D: 2-bit slot number, derived from PCI device number as | |
504 | * (dev - 1) for bus A, or (dev - 2) for bus B | |
505 | * L: 2-bit line number | |
bb4c18cb DM |
506 | */ |
507 | if (bus & 0x80) { | |
508 | /* PBM-A */ | |
509 | bus = 0x00; | |
510 | slot = (slot - 1) << 2; | |
511 | } else { | |
512 | /* PBM-B */ | |
513 | bus = 0x10; | |
514 | slot = (slot - 2) << 2; | |
515 | } | |
516 | irq -= 1; | |
517 | ||
518 | ret = (bus | slot | irq); | |
519 | } else { | |
520 | /* Going through a PCI-PCI bridge that lacks a set of | |
521 | * interrupt-map and interrupt-map-mask properties. | |
522 | */ | |
523 | ret = ((irq - 1 + (slot & 3)) & 3) + 1; | |
524 | } | |
2b1e5978 DM |
525 | |
526 | return ret; | |
527 | } | |
528 | ||
a83f9823 DM |
529 | static int of_irq_verbose; |
530 | ||
cd4cd730 | 531 | static unsigned int __init build_one_device_irq(struct platform_device *op, |
2b1e5978 DM |
532 | struct device *parent, |
533 | unsigned int irq) | |
534 | { | |
61c7a080 | 535 | struct device_node *dp = op->dev.of_node; |
2b1e5978 DM |
536 | struct device_node *pp, *ip; |
537 | unsigned int orig_irq = irq; | |
c1b1a5f1 | 538 | int nid; |
2b1e5978 DM |
539 | |
540 | if (irq == 0xffffffff) | |
541 | return irq; | |
542 | ||
543 | if (dp->irq_trans) { | |
544 | irq = dp->irq_trans->irq_build(dp, irq, | |
545 | dp->irq_trans->data); | |
a83f9823 DM |
546 | |
547 | if (of_irq_verbose) | |
548 | printk("%s: direct translate %x --> %x\n", | |
549 | dp->full_name, orig_irq, irq); | |
550 | ||
c1b1a5f1 | 551 | goto out; |
2b1e5978 DM |
552 | } |
553 | ||
554 | /* Something more complicated. Walk up to the root, applying | |
555 | * interrupt-map or bus specific translations, until we hit | |
556 | * an IRQ translator. | |
557 | * | |
558 | * If we hit a bus type or situation we cannot handle, we | |
559 | * stop and assume that the original IRQ number was in a | |
560 | * format which has special meaning to it's immediate parent. | |
561 | */ | |
562 | pp = dp->parent; | |
563 | ip = NULL; | |
564 | while (pp) { | |
6a23acf3 | 565 | const void *imap, *imsk; |
2b1e5978 DM |
566 | int imlen; |
567 | ||
568 | imap = of_get_property(pp, "interrupt-map", &imlen); | |
569 | imsk = of_get_property(pp, "interrupt-map-mask", NULL); | |
570 | if (imap && imsk) { | |
571 | struct device_node *iret; | |
572 | int this_orig_irq = irq; | |
573 | ||
574 | iret = apply_interrupt_map(dp, pp, | |
575 | imap, imlen, imsk, | |
576 | &irq); | |
a83f9823 DM |
577 | |
578 | if (of_irq_verbose) | |
579 | printk("%s: Apply [%s:%x] imap --> [%s:%x]\n", | |
61c7a080 | 580 | op->dev.of_node->full_name, |
a83f9823 DM |
581 | pp->full_name, this_orig_irq, |
582 | (iret ? iret->full_name : "NULL"), irq); | |
583 | ||
2b1e5978 DM |
584 | if (!iret) |
585 | break; | |
586 | ||
587 | if (iret->irq_trans) { | |
588 | ip = iret; | |
589 | break; | |
590 | } | |
591 | } else { | |
7ee766d8 | 592 | if (!strcmp(pp->name, "pci")) { |
2b1e5978 DM |
593 | unsigned int this_orig_irq = irq; |
594 | ||
595 | irq = pci_irq_swizzle(dp, pp, irq); | |
a83f9823 DM |
596 | if (of_irq_verbose) |
597 | printk("%s: PCI swizzle [%s] " | |
598 | "%x --> %x\n", | |
61c7a080 | 599 | op->dev.of_node->full_name, |
a83f9823 DM |
600 | pp->full_name, this_orig_irq, |
601 | irq); | |
602 | ||
2b1e5978 DM |
603 | } |
604 | ||
605 | if (pp->irq_trans) { | |
606 | ip = pp; | |
607 | break; | |
608 | } | |
609 | } | |
610 | dp = pp; | |
611 | pp = pp->parent; | |
612 | } | |
613 | if (!ip) | |
614 | return orig_irq; | |
615 | ||
61c7a080 | 616 | irq = ip->irq_trans->irq_build(op->dev.of_node, irq, |
2b1e5978 | 617 | ip->irq_trans->data); |
a83f9823 DM |
618 | if (of_irq_verbose) |
619 | printk("%s: Apply IRQ trans [%s] %x --> %x\n", | |
61c7a080 | 620 | op->dev.of_node->full_name, ip->full_name, orig_irq, irq); |
2b1e5978 | 621 | |
c1b1a5f1 DM |
622 | out: |
623 | nid = of_node_to_nid(dp); | |
624 | if (nid != -1) { | |
96d76a74 | 625 | cpumask_t numa_mask = *cpumask_of_node(nid); |
c1b1a5f1 | 626 | |
0de26520 | 627 | irq_set_affinity(irq, &numa_mask); |
c1b1a5f1 DM |
628 | } |
629 | ||
2b1e5978 DM |
630 | return irq; |
631 | } | |
632 | ||
cd4cd730 | 633 | static struct platform_device * __init scan_one_device(struct device_node *dp, |
cf44bbc2 DM |
634 | struct device *parent) |
635 | { | |
cd4cd730 | 636 | struct platform_device *op = kzalloc(sizeof(*op), GFP_KERNEL); |
6a23acf3 | 637 | const unsigned int *irq; |
3d6e4702 | 638 | struct dev_archdata *sd; |
2b1e5978 | 639 | int len, i; |
cf44bbc2 DM |
640 | |
641 | if (!op) | |
642 | return NULL; | |
643 | ||
3d6e4702 | 644 | sd = &op->dev.archdata; |
3d6e4702 DM |
645 | sd->op = op; |
646 | ||
d706c1b0 | 647 | op->dev.of_node = dp; |
cf44bbc2 | 648 | |
cf44bbc2 | 649 | irq = of_get_property(dp, "interrupts", &len); |
2b1e5978 | 650 | if (irq) { |
1636f8ac | 651 | op->archdata.num_irqs = len / 4; |
92d9091f RR |
652 | |
653 | /* Prevent overrunning the op->irqs[] array. */ | |
1636f8ac | 654 | if (op->archdata.num_irqs > PROMINTR_MAX) { |
92d9091f RR |
655 | printk(KERN_WARNING "%s: Too many irqs (%d), " |
656 | "limiting to %d.\n", | |
1636f8ac GL |
657 | dp->full_name, op->archdata.num_irqs, PROMINTR_MAX); |
658 | op->archdata.num_irqs = PROMINTR_MAX; | |
92d9091f | 659 | } |
1636f8ac | 660 | memcpy(op->archdata.irqs, irq, op->archdata.num_irqs * 4); |
2b1e5978 | 661 | } else { |
1636f8ac | 662 | op->archdata.num_irqs = 0; |
2b1e5978 | 663 | } |
cf44bbc2 DM |
664 | |
665 | build_device_resources(op, parent); | |
1636f8ac GL |
666 | for (i = 0; i < op->archdata.num_irqs; i++) |
667 | op->archdata.irqs[i] = build_one_device_irq(op, parent, op->archdata.irqs[i]); | |
cf44bbc2 DM |
668 | |
669 | op->dev.parent = parent; | |
eca39301 | 670 | op->dev.bus = &platform_bus_type; |
cf44bbc2 | 671 | if (!parent) |
2222c313 | 672 | dev_set_name(&op->dev, "root"); |
cf44bbc2 | 673 | else |
6016a363 | 674 | dev_set_name(&op->dev, "%08x", dp->phandle); |
cf44bbc2 DM |
675 | |
676 | if (of_device_register(op)) { | |
677 | printk("%s: Could not register of device.\n", | |
678 | dp->full_name); | |
679 | kfree(op); | |
680 | op = NULL; | |
681 | } | |
682 | ||
683 | return op; | |
684 | } | |
685 | ||
686 | static void __init scan_tree(struct device_node *dp, struct device *parent) | |
687 | { | |
688 | while (dp) { | |
cd4cd730 | 689 | struct platform_device *op = scan_one_device(dp, parent); |
cf44bbc2 DM |
690 | |
691 | if (op) | |
692 | scan_tree(dp->child, &op->dev); | |
693 | ||
694 | dp = dp->sibling; | |
695 | } | |
696 | } | |
697 | ||
eca39301 | 698 | static int __init scan_of_devices(void) |
cf44bbc2 DM |
699 | { |
700 | struct device_node *root = of_find_node_by_path("/"); | |
cd4cd730 | 701 | struct platform_device *parent; |
cf44bbc2 DM |
702 | |
703 | parent = scan_one_device(root, NULL); | |
704 | if (!parent) | |
eca39301 | 705 | return 0; |
cf44bbc2 DM |
706 | |
707 | scan_tree(root->child, &parent->dev); | |
eca39301 | 708 | return 0; |
cf44bbc2 | 709 | } |
eca39301 | 710 | postcore_initcall(scan_of_devices); |
a2bd4fd1 | 711 | |
a83f9823 DM |
712 | static int __init of_debug(char *str) |
713 | { | |
714 | int val = 0; | |
715 | ||
716 | get_option(&str, &val); | |
717 | if (val & 1) | |
718 | of_resource_verbose = 1; | |
719 | if (val & 2) | |
720 | of_irq_verbose = 1; | |
721 | return 1; | |
722 | } | |
723 | ||
724 | __setup("of_debug=", of_debug); |