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372b07bb DM |
1 | /* |
2 | * Procedures for creating, accessing and interpreting the device tree. | |
3 | * | |
4 | * Paul Mackerras August 1996. | |
5 | * Copyright (C) 1996-2005 Paul Mackerras. | |
6 | * | |
7 | * Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner. | |
8 | * {engebret|bergner}@us.ibm.com | |
9 | * | |
10 | * Adapted for sparc64 by David S. Miller davem@davemloft.net | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version | |
15 | * 2 of the License, or (at your option) any later version. | |
16 | */ | |
17 | ||
18 | #include <linux/kernel.h> | |
19 | #include <linux/types.h> | |
20 | #include <linux/string.h> | |
21 | #include <linux/mm.h> | |
de8d28b1 | 22 | #include <linux/module.h> |
ad072004 | 23 | #include <linux/lmb.h> |
764f2579 | 24 | #include <linux/of_device.h> |
372b07bb DM |
25 | |
26 | #include <asm/prom.h> | |
27 | #include <asm/oplib.h> | |
2b1e5978 DM |
28 | #include <asm/irq.h> |
29 | #include <asm/asi.h> | |
30 | #include <asm/upa.h> | |
5cbc3073 | 31 | #include <asm/smp.h> |
372b07bb | 32 | |
657f201d | 33 | #include "prom.h" |
fb7cd9d9 | 34 | |
ad072004 | 35 | static unsigned int prom_early_allocated __initdata; |
372b07bb DM |
36 | |
37 | static void * __init prom_early_alloc(unsigned long size) | |
38 | { | |
ad072004 | 39 | unsigned long paddr = lmb_alloc(size, SMP_CACHE_BYTES); |
372b07bb DM |
40 | void *ret; |
41 | ||
ad072004 DM |
42 | if (!paddr) { |
43 | prom_printf("prom_early_alloc(%lu) failed\n"); | |
44 | prom_halt(); | |
45 | } | |
372b07bb | 46 | |
ad072004 DM |
47 | ret = __va(paddr); |
48 | memset(ret, 0, size); | |
372b07bb DM |
49 | prom_early_allocated += size; |
50 | ||
51 | return ret; | |
52 | } | |
53 | ||
2b1e5978 DM |
54 | #ifdef CONFIG_PCI |
55 | /* PSYCHO interrupt mapping support. */ | |
56 | #define PSYCHO_IMAP_A_SLOT0 0x0c00UL | |
57 | #define PSYCHO_IMAP_B_SLOT0 0x0c20UL | |
58 | static unsigned long psycho_pcislot_imap_offset(unsigned long ino) | |
59 | { | |
60 | unsigned int bus = (ino & 0x10) >> 4; | |
61 | unsigned int slot = (ino & 0x0c) >> 2; | |
62 | ||
63 | if (bus == 0) | |
64 | return PSYCHO_IMAP_A_SLOT0 + (slot * 8); | |
65 | else | |
66 | return PSYCHO_IMAP_B_SLOT0 + (slot * 8); | |
67 | } | |
68 | ||
ebfb2c63 DM |
69 | #define PSYCHO_OBIO_IMAP_BASE 0x1000UL |
70 | ||
2b1e5978 | 71 | #define PSYCHO_ONBOARD_IRQ_BASE 0x20 |
2b1e5978 | 72 | #define psycho_onboard_imap_offset(__ino) \ |
ebfb2c63 | 73 | (PSYCHO_OBIO_IMAP_BASE + (((__ino) & 0x1f) << 3)) |
2b1e5978 DM |
74 | |
75 | #define PSYCHO_ICLR_A_SLOT0 0x1400UL | |
76 | #define PSYCHO_ICLR_SCSI 0x1800UL | |
77 | ||
78 | #define psycho_iclr_offset(ino) \ | |
79 | ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \ | |
80 | (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3))) | |
81 | ||
82 | static unsigned int psycho_irq_build(struct device_node *dp, | |
83 | unsigned int ino, | |
84 | void *_data) | |
85 | { | |
86 | unsigned long controller_regs = (unsigned long) _data; | |
87 | unsigned long imap, iclr; | |
88 | unsigned long imap_off, iclr_off; | |
89 | int inofixup = 0; | |
90 | ||
91 | ino &= 0x3f; | |
92 | if (ino < PSYCHO_ONBOARD_IRQ_BASE) { | |
93 | /* PCI slot */ | |
94 | imap_off = psycho_pcislot_imap_offset(ino); | |
95 | } else { | |
96 | /* Onboard device */ | |
2b1e5978 DM |
97 | imap_off = psycho_onboard_imap_offset(ino); |
98 | } | |
99 | ||
100 | /* Now build the IRQ bucket. */ | |
101 | imap = controller_regs + imap_off; | |
2b1e5978 DM |
102 | |
103 | iclr_off = psycho_iclr_offset(ino); | |
104 | iclr = controller_regs + iclr_off; | |
2b1e5978 DM |
105 | |
106 | if ((ino & 0x20) == 0) | |
107 | inofixup = ino & 0x03; | |
108 | ||
109 | return build_irq(inofixup, iclr, imap); | |
110 | } | |
111 | ||
c35a376d | 112 | static void __init psycho_irq_trans_init(struct device_node *dp) |
2b1e5978 | 113 | { |
6a23acf3 | 114 | const struct linux_prom64_registers *regs; |
2b1e5978 DM |
115 | |
116 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
117 | dp->irq_trans->irq_build = psycho_irq_build; | |
118 | ||
119 | regs = of_get_property(dp, "reg", NULL); | |
120 | dp->irq_trans->data = (void *) regs[2].phys_addr; | |
121 | } | |
122 | ||
123 | #define sabre_read(__reg) \ | |
124 | ({ u64 __ret; \ | |
125 | __asm__ __volatile__("ldxa [%1] %2, %0" \ | |
126 | : "=r" (__ret) \ | |
127 | : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \ | |
128 | : "memory"); \ | |
129 | __ret; \ | |
130 | }) | |
131 | ||
132 | struct sabre_irq_data { | |
133 | unsigned long controller_regs; | |
134 | unsigned int pci_first_busno; | |
135 | }; | |
136 | #define SABRE_CONFIGSPACE 0x001000000UL | |
137 | #define SABRE_WRSYNC 0x1c20UL | |
138 | ||
139 | #define SABRE_CONFIG_BASE(CONFIG_SPACE) \ | |
140 | (CONFIG_SPACE | (1UL << 24)) | |
141 | #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG) \ | |
142 | (((unsigned long)(BUS) << 16) | \ | |
143 | ((unsigned long)(DEVFN) << 8) | \ | |
144 | ((unsigned long)(REG))) | |
145 | ||
146 | /* When a device lives behind a bridge deeper in the PCI bus topology | |
147 | * than APB, a special sequence must run to make sure all pending DMA | |
148 | * transfers at the time of IRQ delivery are visible in the coherency | |
149 | * domain by the cpu. This sequence is to perform a read on the far | |
150 | * side of the non-APB bridge, then perform a read of Sabre's DMA | |
151 | * write-sync register. | |
152 | */ | |
153 | static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2) | |
154 | { | |
155 | unsigned int phys_hi = (unsigned int) (unsigned long) _arg1; | |
156 | struct sabre_irq_data *irq_data = _arg2; | |
157 | unsigned long controller_regs = irq_data->controller_regs; | |
158 | unsigned long sync_reg = controller_regs + SABRE_WRSYNC; | |
159 | unsigned long config_space = controller_regs + SABRE_CONFIGSPACE; | |
160 | unsigned int bus, devfn; | |
161 | u16 _unused; | |
162 | ||
163 | config_space = SABRE_CONFIG_BASE(config_space); | |
164 | ||
165 | bus = (phys_hi >> 16) & 0xff; | |
166 | devfn = (phys_hi >> 8) & 0xff; | |
167 | ||
168 | config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00); | |
169 | ||
170 | __asm__ __volatile__("membar #Sync\n\t" | |
171 | "lduha [%1] %2, %0\n\t" | |
172 | "membar #Sync" | |
173 | : "=r" (_unused) | |
174 | : "r" ((u16 *) config_space), | |
175 | "i" (ASI_PHYS_BYPASS_EC_E_L) | |
176 | : "memory"); | |
177 | ||
178 | sabre_read(sync_reg); | |
179 | } | |
180 | ||
181 | #define SABRE_IMAP_A_SLOT0 0x0c00UL | |
182 | #define SABRE_IMAP_B_SLOT0 0x0c20UL | |
2b1e5978 DM |
183 | #define SABRE_ICLR_A_SLOT0 0x1400UL |
184 | #define SABRE_ICLR_B_SLOT0 0x1480UL | |
185 | #define SABRE_ICLR_SCSI 0x1800UL | |
186 | #define SABRE_ICLR_ETH 0x1808UL | |
187 | #define SABRE_ICLR_BPP 0x1810UL | |
188 | #define SABRE_ICLR_AU_REC 0x1818UL | |
189 | #define SABRE_ICLR_AU_PLAY 0x1820UL | |
190 | #define SABRE_ICLR_PFAIL 0x1828UL | |
191 | #define SABRE_ICLR_KMS 0x1830UL | |
192 | #define SABRE_ICLR_FLPY 0x1838UL | |
193 | #define SABRE_ICLR_SHW 0x1840UL | |
194 | #define SABRE_ICLR_KBD 0x1848UL | |
195 | #define SABRE_ICLR_MS 0x1850UL | |
196 | #define SABRE_ICLR_SER 0x1858UL | |
197 | #define SABRE_ICLR_UE 0x1870UL | |
198 | #define SABRE_ICLR_CE 0x1878UL | |
199 | #define SABRE_ICLR_PCIERR 0x1880UL | |
200 | ||
201 | static unsigned long sabre_pcislot_imap_offset(unsigned long ino) | |
202 | { | |
203 | unsigned int bus = (ino & 0x10) >> 4; | |
204 | unsigned int slot = (ino & 0x0c) >> 2; | |
205 | ||
206 | if (bus == 0) | |
207 | return SABRE_IMAP_A_SLOT0 + (slot * 8); | |
208 | else | |
209 | return SABRE_IMAP_B_SLOT0 + (slot * 8); | |
210 | } | |
211 | ||
ebfb2c63 DM |
212 | #define SABRE_OBIO_IMAP_BASE 0x1000UL |
213 | #define SABRE_ONBOARD_IRQ_BASE 0x20 | |
2b1e5978 | 214 | #define sabre_onboard_imap_offset(__ino) \ |
ebfb2c63 | 215 | (SABRE_OBIO_IMAP_BASE + (((__ino) & 0x1f) << 3)) |
2b1e5978 DM |
216 | |
217 | #define sabre_iclr_offset(ino) \ | |
218 | ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \ | |
219 | (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3))) | |
220 | ||
9bbd952e | 221 | static int sabre_device_needs_wsync(struct device_node *dp) |
a23c3a86 | 222 | { |
9bbd952e | 223 | struct device_node *parent = dp->parent; |
6a23acf3 | 224 | const char *parent_model, *parent_compat; |
a23c3a86 | 225 | |
9bbd952e DM |
226 | /* This traversal up towards the root is meant to |
227 | * handle two cases: | |
228 | * | |
229 | * 1) non-PCI bus sitting under PCI, such as 'ebus' | |
230 | * 2) the PCI controller interrupts themselves, which | |
231 | * will use the sabre_irq_build but do not need | |
232 | * the DMA synchronization handling | |
233 | */ | |
234 | while (parent) { | |
235 | if (!strcmp(parent->type, "pci")) | |
236 | break; | |
237 | parent = parent->parent; | |
238 | } | |
239 | ||
240 | if (!parent) | |
241 | return 0; | |
242 | ||
243 | parent_model = of_get_property(parent, | |
244 | "model", NULL); | |
a23c3a86 DM |
245 | if (parent_model && |
246 | (!strcmp(parent_model, "SUNW,sabre") || | |
247 | !strcmp(parent_model, "SUNW,simba"))) | |
9bbd952e | 248 | return 0; |
a23c3a86 | 249 | |
9bbd952e DM |
250 | parent_compat = of_get_property(parent, |
251 | "compatible", NULL); | |
a23c3a86 DM |
252 | if (parent_compat && |
253 | (!strcmp(parent_compat, "pci108e,a000") || | |
254 | !strcmp(parent_compat, "pci108e,a001"))) | |
9bbd952e | 255 | return 0; |
a23c3a86 | 256 | |
9bbd952e | 257 | return 1; |
a23c3a86 DM |
258 | } |
259 | ||
2b1e5978 DM |
260 | static unsigned int sabre_irq_build(struct device_node *dp, |
261 | unsigned int ino, | |
262 | void *_data) | |
263 | { | |
264 | struct sabre_irq_data *irq_data = _data; | |
265 | unsigned long controller_regs = irq_data->controller_regs; | |
6a23acf3 | 266 | const struct linux_prom_pci_registers *regs; |
2b1e5978 DM |
267 | unsigned long imap, iclr; |
268 | unsigned long imap_off, iclr_off; | |
269 | int inofixup = 0; | |
270 | int virt_irq; | |
271 | ||
272 | ino &= 0x3f; | |
273 | if (ino < SABRE_ONBOARD_IRQ_BASE) { | |
274 | /* PCI slot */ | |
275 | imap_off = sabre_pcislot_imap_offset(ino); | |
276 | } else { | |
277 | /* onboard device */ | |
2b1e5978 DM |
278 | imap_off = sabre_onboard_imap_offset(ino); |
279 | } | |
280 | ||
281 | /* Now build the IRQ bucket. */ | |
282 | imap = controller_regs + imap_off; | |
2b1e5978 DM |
283 | |
284 | iclr_off = sabre_iclr_offset(ino); | |
285 | iclr = controller_regs + iclr_off; | |
2b1e5978 DM |
286 | |
287 | if ((ino & 0x20) == 0) | |
288 | inofixup = ino & 0x03; | |
289 | ||
290 | virt_irq = build_irq(inofixup, iclr, imap); | |
291 | ||
a23c3a86 DM |
292 | /* If the parent device is a PCI<->PCI bridge other than |
293 | * APB, we have to install a pre-handler to ensure that | |
294 | * all pending DMA is drained before the interrupt handler | |
295 | * is run. | |
296 | */ | |
2b1e5978 | 297 | regs = of_get_property(dp, "reg", NULL); |
9bbd952e | 298 | if (regs && sabre_device_needs_wsync(dp)) { |
2b1e5978 DM |
299 | irq_install_pre_handler(virt_irq, |
300 | sabre_wsync_handler, | |
301 | (void *) (long) regs->phys_hi, | |
a23c3a86 | 302 | (void *) irq_data); |
2b1e5978 DM |
303 | } |
304 | ||
305 | return virt_irq; | |
306 | } | |
307 | ||
c35a376d | 308 | static void __init sabre_irq_trans_init(struct device_node *dp) |
2b1e5978 | 309 | { |
6a23acf3 | 310 | const struct linux_prom64_registers *regs; |
2b1e5978 | 311 | struct sabre_irq_data *irq_data; |
6a23acf3 | 312 | const u32 *busrange; |
2b1e5978 DM |
313 | |
314 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
315 | dp->irq_trans->irq_build = sabre_irq_build; | |
316 | ||
317 | irq_data = prom_early_alloc(sizeof(struct sabre_irq_data)); | |
318 | ||
319 | regs = of_get_property(dp, "reg", NULL); | |
320 | irq_data->controller_regs = regs[0].phys_addr; | |
321 | ||
322 | busrange = of_get_property(dp, "bus-range", NULL); | |
323 | irq_data->pci_first_busno = busrange[0]; | |
324 | ||
325 | dp->irq_trans->data = irq_data; | |
326 | } | |
327 | ||
328 | /* SCHIZO interrupt mapping support. Unlike Psycho, for this controller the | |
329 | * imap/iclr registers are per-PBM. | |
330 | */ | |
331 | #define SCHIZO_IMAP_BASE 0x1000UL | |
332 | #define SCHIZO_ICLR_BASE 0x1400UL | |
333 | ||
334 | static unsigned long schizo_imap_offset(unsigned long ino) | |
335 | { | |
336 | return SCHIZO_IMAP_BASE + (ino * 8UL); | |
337 | } | |
338 | ||
339 | static unsigned long schizo_iclr_offset(unsigned long ino) | |
340 | { | |
341 | return SCHIZO_ICLR_BASE + (ino * 8UL); | |
342 | } | |
343 | ||
344 | static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs, | |
345 | unsigned int ino) | |
346 | { | |
861fe906 DM |
347 | |
348 | return pbm_regs + schizo_iclr_offset(ino); | |
2b1e5978 DM |
349 | } |
350 | ||
351 | static unsigned long schizo_ino_to_imap(unsigned long pbm_regs, | |
352 | unsigned int ino) | |
353 | { | |
861fe906 | 354 | return pbm_regs + schizo_imap_offset(ino); |
2b1e5978 DM |
355 | } |
356 | ||
357 | #define schizo_read(__reg) \ | |
358 | ({ u64 __ret; \ | |
359 | __asm__ __volatile__("ldxa [%1] %2, %0" \ | |
360 | : "=r" (__ret) \ | |
361 | : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \ | |
362 | : "memory"); \ | |
363 | __ret; \ | |
364 | }) | |
365 | #define schizo_write(__reg, __val) \ | |
366 | __asm__ __volatile__("stxa %0, [%1] %2" \ | |
367 | : /* no outputs */ \ | |
368 | : "r" (__val), "r" (__reg), \ | |
369 | "i" (ASI_PHYS_BYPASS_EC_E) \ | |
370 | : "memory") | |
371 | ||
372 | static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2) | |
373 | { | |
374 | unsigned long sync_reg = (unsigned long) _arg2; | |
375 | u64 mask = 1UL << (ino & IMAP_INO); | |
376 | u64 val; | |
377 | int limit; | |
378 | ||
379 | schizo_write(sync_reg, mask); | |
380 | ||
381 | limit = 100000; | |
382 | val = 0; | |
383 | while (--limit) { | |
384 | val = schizo_read(sync_reg); | |
385 | if (!(val & mask)) | |
386 | break; | |
387 | } | |
388 | if (limit <= 0) { | |
389 | printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n", | |
390 | val, mask); | |
391 | } | |
392 | ||
393 | if (_arg1) { | |
394 | static unsigned char cacheline[64] | |
395 | __attribute__ ((aligned (64))); | |
396 | ||
397 | __asm__ __volatile__("rd %%fprs, %0\n\t" | |
398 | "or %0, %4, %1\n\t" | |
399 | "wr %1, 0x0, %%fprs\n\t" | |
400 | "stda %%f0, [%5] %6\n\t" | |
401 | "wr %0, 0x0, %%fprs\n\t" | |
402 | "membar #Sync" | |
403 | : "=&r" (mask), "=&r" (val) | |
404 | : "0" (mask), "1" (val), | |
405 | "i" (FPRS_FEF), "r" (&cacheline[0]), | |
406 | "i" (ASI_BLK_COMMIT_P)); | |
407 | } | |
408 | } | |
409 | ||
410 | struct schizo_irq_data { | |
411 | unsigned long pbm_regs; | |
412 | unsigned long sync_reg; | |
413 | u32 portid; | |
414 | int chip_version; | |
415 | }; | |
416 | ||
417 | static unsigned int schizo_irq_build(struct device_node *dp, | |
418 | unsigned int ino, | |
419 | void *_data) | |
420 | { | |
421 | struct schizo_irq_data *irq_data = _data; | |
422 | unsigned long pbm_regs = irq_data->pbm_regs; | |
423 | unsigned long imap, iclr; | |
424 | int ign_fixup; | |
425 | int virt_irq; | |
426 | int is_tomatillo; | |
427 | ||
428 | ino &= 0x3f; | |
429 | ||
430 | /* Now build the IRQ bucket. */ | |
431 | imap = schizo_ino_to_imap(pbm_regs, ino); | |
432 | iclr = schizo_ino_to_iclr(pbm_regs, ino); | |
433 | ||
434 | /* On Schizo, no inofixup occurs. This is because each | |
435 | * INO has it's own IMAP register. On Psycho and Sabre | |
436 | * there is only one IMAP register for each PCI slot even | |
437 | * though four different INOs can be generated by each | |
438 | * PCI slot. | |
439 | * | |
440 | * But, for JBUS variants (essentially, Tomatillo), we have | |
441 | * to fixup the lowest bit of the interrupt group number. | |
442 | */ | |
443 | ign_fixup = 0; | |
444 | ||
445 | is_tomatillo = (irq_data->sync_reg != 0UL); | |
446 | ||
447 | if (is_tomatillo) { | |
448 | if (irq_data->portid & 1) | |
449 | ign_fixup = (1 << 6); | |
450 | } | |
451 | ||
452 | virt_irq = build_irq(ign_fixup, iclr, imap); | |
453 | ||
454 | if (is_tomatillo) { | |
455 | irq_install_pre_handler(virt_irq, | |
456 | tomatillo_wsync_handler, | |
457 | ((irq_data->chip_version <= 4) ? | |
458 | (void *) 1 : (void *) 0), | |
459 | (void *) irq_data->sync_reg); | |
460 | } | |
461 | ||
462 | return virt_irq; | |
463 | } | |
464 | ||
c35a376d DM |
465 | static void __init __schizo_irq_trans_init(struct device_node *dp, |
466 | int is_tomatillo) | |
2b1e5978 | 467 | { |
6a23acf3 | 468 | const struct linux_prom64_registers *regs; |
2b1e5978 DM |
469 | struct schizo_irq_data *irq_data; |
470 | ||
471 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
472 | dp->irq_trans->irq_build = schizo_irq_build; | |
473 | ||
474 | irq_data = prom_early_alloc(sizeof(struct schizo_irq_data)); | |
475 | ||
476 | regs = of_get_property(dp, "reg", NULL); | |
477 | dp->irq_trans->data = irq_data; | |
478 | ||
479 | irq_data->pbm_regs = regs[0].phys_addr; | |
9001f285 DM |
480 | if (is_tomatillo) |
481 | irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL; | |
482 | else | |
483 | irq_data->sync_reg = 0UL; | |
2b1e5978 DM |
484 | irq_data->portid = of_getintprop_default(dp, "portid", 0); |
485 | irq_data->chip_version = of_getintprop_default(dp, "version#", 0); | |
486 | } | |
487 | ||
c35a376d | 488 | static void __init schizo_irq_trans_init(struct device_node *dp) |
9001f285 DM |
489 | { |
490 | __schizo_irq_trans_init(dp, 0); | |
491 | } | |
492 | ||
c35a376d | 493 | static void __init tomatillo_irq_trans_init(struct device_node *dp) |
9001f285 DM |
494 | { |
495 | __schizo_irq_trans_init(dp, 1); | |
496 | } | |
497 | ||
2b1e5978 DM |
498 | static unsigned int pci_sun4v_irq_build(struct device_node *dp, |
499 | unsigned int devino, | |
500 | void *_data) | |
501 | { | |
502 | u32 devhandle = (u32) (unsigned long) _data; | |
503 | ||
504 | return sun4v_build_irq(devhandle, devino); | |
505 | } | |
506 | ||
c35a376d | 507 | static void __init pci_sun4v_irq_trans_init(struct device_node *dp) |
2b1e5978 | 508 | { |
6a23acf3 | 509 | const struct linux_prom64_registers *regs; |
2b1e5978 DM |
510 | |
511 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
512 | dp->irq_trans->irq_build = pci_sun4v_irq_build; | |
513 | ||
514 | regs = of_get_property(dp, "reg", NULL); | |
515 | dp->irq_trans->data = (void *) (unsigned long) | |
516 | ((regs->phys_addr >> 32UL) & 0x0fffffff); | |
517 | } | |
861fe906 DM |
518 | |
519 | struct fire_irq_data { | |
520 | unsigned long pbm_regs; | |
521 | u32 portid; | |
522 | }; | |
523 | ||
524 | #define FIRE_IMAP_BASE 0x001000 | |
525 | #define FIRE_ICLR_BASE 0x001400 | |
526 | ||
527 | static unsigned long fire_imap_offset(unsigned long ino) | |
528 | { | |
529 | return FIRE_IMAP_BASE + (ino * 8UL); | |
530 | } | |
531 | ||
532 | static unsigned long fire_iclr_offset(unsigned long ino) | |
533 | { | |
534 | return FIRE_ICLR_BASE + (ino * 8UL); | |
535 | } | |
536 | ||
537 | static unsigned long fire_ino_to_iclr(unsigned long pbm_regs, | |
538 | unsigned int ino) | |
539 | { | |
540 | return pbm_regs + fire_iclr_offset(ino); | |
541 | } | |
542 | ||
543 | static unsigned long fire_ino_to_imap(unsigned long pbm_regs, | |
544 | unsigned int ino) | |
545 | { | |
546 | return pbm_regs + fire_imap_offset(ino); | |
547 | } | |
548 | ||
549 | static unsigned int fire_irq_build(struct device_node *dp, | |
550 | unsigned int ino, | |
551 | void *_data) | |
552 | { | |
553 | struct fire_irq_data *irq_data = _data; | |
554 | unsigned long pbm_regs = irq_data->pbm_regs; | |
555 | unsigned long imap, iclr; | |
556 | unsigned long int_ctrlr; | |
557 | ||
558 | ino &= 0x3f; | |
559 | ||
560 | /* Now build the IRQ bucket. */ | |
561 | imap = fire_ino_to_imap(pbm_regs, ino); | |
562 | iclr = fire_ino_to_iclr(pbm_regs, ino); | |
563 | ||
564 | /* Set the interrupt controller number. */ | |
565 | int_ctrlr = 1 << 6; | |
566 | upa_writeq(int_ctrlr, imap); | |
567 | ||
568 | /* The interrupt map registers do not have an INO field | |
569 | * like other chips do. They return zero in the INO | |
570 | * field, and the interrupt controller number is controlled | |
e5dd42e4 | 571 | * in bits 6 to 9. So in order for build_irq() to get |
861fe906 DM |
572 | * the INO right we pass it in as part of the fixup |
573 | * which will get added to the map register zero value | |
574 | * read by build_irq(). | |
575 | */ | |
576 | ino |= (irq_data->portid << 6); | |
577 | ino -= int_ctrlr; | |
578 | return build_irq(ino, iclr, imap); | |
579 | } | |
580 | ||
c35a376d | 581 | static void __init fire_irq_trans_init(struct device_node *dp) |
861fe906 DM |
582 | { |
583 | const struct linux_prom64_registers *regs; | |
584 | struct fire_irq_data *irq_data; | |
585 | ||
586 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
587 | dp->irq_trans->irq_build = fire_irq_build; | |
588 | ||
589 | irq_data = prom_early_alloc(sizeof(struct fire_irq_data)); | |
590 | ||
591 | regs = of_get_property(dp, "reg", NULL); | |
592 | dp->irq_trans->data = irq_data; | |
593 | ||
594 | irq_data->pbm_regs = regs[0].phys_addr; | |
595 | irq_data->portid = of_getintprop_default(dp, "portid", 0); | |
596 | } | |
2b1e5978 DM |
597 | #endif /* CONFIG_PCI */ |
598 | ||
599 | #ifdef CONFIG_SBUS | |
600 | /* INO number to IMAP register offset for SYSIO external IRQ's. | |
601 | * This should conform to both Sunfire/Wildfire server and Fusion | |
602 | * desktop designs. | |
603 | */ | |
ec4d18f2 DM |
604 | #define SYSIO_IMAP_SLOT0 0x2c00UL |
605 | #define SYSIO_IMAP_SLOT1 0x2c08UL | |
606 | #define SYSIO_IMAP_SLOT2 0x2c10UL | |
607 | #define SYSIO_IMAP_SLOT3 0x2c18UL | |
608 | #define SYSIO_IMAP_SCSI 0x3000UL | |
609 | #define SYSIO_IMAP_ETH 0x3008UL | |
610 | #define SYSIO_IMAP_BPP 0x3010UL | |
611 | #define SYSIO_IMAP_AUDIO 0x3018UL | |
612 | #define SYSIO_IMAP_PFAIL 0x3020UL | |
613 | #define SYSIO_IMAP_KMS 0x3028UL | |
614 | #define SYSIO_IMAP_FLPY 0x3030UL | |
615 | #define SYSIO_IMAP_SHW 0x3038UL | |
616 | #define SYSIO_IMAP_KBD 0x3040UL | |
617 | #define SYSIO_IMAP_MS 0x3048UL | |
618 | #define SYSIO_IMAP_SER 0x3050UL | |
619 | #define SYSIO_IMAP_TIM0 0x3060UL | |
620 | #define SYSIO_IMAP_TIM1 0x3068UL | |
621 | #define SYSIO_IMAP_UE 0x3070UL | |
622 | #define SYSIO_IMAP_CE 0x3078UL | |
623 | #define SYSIO_IMAP_SBERR 0x3080UL | |
624 | #define SYSIO_IMAP_PMGMT 0x3088UL | |
625 | #define SYSIO_IMAP_GFX 0x3090UL | |
626 | #define SYSIO_IMAP_EUPA 0x3098UL | |
2b1e5978 DM |
627 | |
628 | #define bogon ((unsigned long) -1) | |
629 | static unsigned long sysio_irq_offsets[] = { | |
630 | /* SBUS Slot 0 --> 3, level 1 --> 7 */ | |
631 | SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, | |
632 | SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, | |
633 | SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, | |
634 | SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, | |
635 | SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, | |
636 | SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, | |
637 | SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, | |
638 | SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, | |
639 | ||
640 | /* Onboard devices (not relevant/used on SunFire). */ | |
641 | SYSIO_IMAP_SCSI, | |
642 | SYSIO_IMAP_ETH, | |
643 | SYSIO_IMAP_BPP, | |
644 | bogon, | |
645 | SYSIO_IMAP_AUDIO, | |
646 | SYSIO_IMAP_PFAIL, | |
647 | bogon, | |
648 | bogon, | |
649 | SYSIO_IMAP_KMS, | |
650 | SYSIO_IMAP_FLPY, | |
651 | SYSIO_IMAP_SHW, | |
652 | SYSIO_IMAP_KBD, | |
653 | SYSIO_IMAP_MS, | |
654 | SYSIO_IMAP_SER, | |
655 | bogon, | |
656 | bogon, | |
657 | SYSIO_IMAP_TIM0, | |
658 | SYSIO_IMAP_TIM1, | |
659 | bogon, | |
660 | bogon, | |
661 | SYSIO_IMAP_UE, | |
662 | SYSIO_IMAP_CE, | |
663 | SYSIO_IMAP_SBERR, | |
664 | SYSIO_IMAP_PMGMT, | |
46ba6d7d DM |
665 | SYSIO_IMAP_GFX, |
666 | SYSIO_IMAP_EUPA, | |
2b1e5978 DM |
667 | }; |
668 | ||
669 | #undef bogon | |
670 | ||
671 | #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets) | |
672 | ||
673 | /* Convert Interrupt Mapping register pointer to associated | |
674 | * Interrupt Clear register pointer, SYSIO specific version. | |
675 | */ | |
676 | #define SYSIO_ICLR_UNUSED0 0x3400UL | |
ec4d18f2 DM |
677 | #define SYSIO_ICLR_SLOT0 0x3408UL |
678 | #define SYSIO_ICLR_SLOT1 0x3448UL | |
679 | #define SYSIO_ICLR_SLOT2 0x3488UL | |
680 | #define SYSIO_ICLR_SLOT3 0x34c8UL | |
2b1e5978 DM |
681 | static unsigned long sysio_imap_to_iclr(unsigned long imap) |
682 | { | |
683 | unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0; | |
684 | return imap + diff; | |
685 | } | |
686 | ||
687 | static unsigned int sbus_of_build_irq(struct device_node *dp, | |
688 | unsigned int ino, | |
689 | void *_data) | |
690 | { | |
691 | unsigned long reg_base = (unsigned long) _data; | |
6a23acf3 | 692 | const struct linux_prom_registers *regs; |
2b1e5978 DM |
693 | unsigned long imap, iclr; |
694 | int sbus_slot = 0; | |
695 | int sbus_level = 0; | |
696 | ||
697 | ino &= 0x3f; | |
698 | ||
699 | regs = of_get_property(dp, "reg", NULL); | |
700 | if (regs) | |
701 | sbus_slot = regs->which_io; | |
702 | ||
703 | if (ino < 0x20) | |
704 | ino += (sbus_slot * 8); | |
705 | ||
706 | imap = sysio_irq_offsets[ino]; | |
707 | if (imap == ((unsigned long)-1)) { | |
708 | prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n", | |
709 | ino); | |
710 | prom_halt(); | |
711 | } | |
712 | imap += reg_base; | |
713 | ||
714 | /* SYSIO inconsistency. For external SLOTS, we have to select | |
715 | * the right ICLR register based upon the lower SBUS irq level | |
716 | * bits. | |
717 | */ | |
718 | if (ino >= 0x20) { | |
719 | iclr = sysio_imap_to_iclr(imap); | |
720 | } else { | |
721 | sbus_level = ino & 0x7; | |
722 | ||
723 | switch(sbus_slot) { | |
724 | case 0: | |
725 | iclr = reg_base + SYSIO_ICLR_SLOT0; | |
726 | break; | |
727 | case 1: | |
728 | iclr = reg_base + SYSIO_ICLR_SLOT1; | |
729 | break; | |
730 | case 2: | |
731 | iclr = reg_base + SYSIO_ICLR_SLOT2; | |
732 | break; | |
733 | default: | |
734 | case 3: | |
735 | iclr = reg_base + SYSIO_ICLR_SLOT3; | |
736 | break; | |
737 | }; | |
738 | ||
739 | iclr += ((unsigned long)sbus_level - 1UL) * 8UL; | |
740 | } | |
741 | return build_irq(sbus_level, iclr, imap); | |
742 | } | |
743 | ||
c35a376d | 744 | static void __init sbus_irq_trans_init(struct device_node *dp) |
2b1e5978 | 745 | { |
6a23acf3 | 746 | const struct linux_prom64_registers *regs; |
2b1e5978 DM |
747 | |
748 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
749 | dp->irq_trans->irq_build = sbus_of_build_irq; | |
750 | ||
751 | regs = of_get_property(dp, "reg", NULL); | |
752 | dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr; | |
753 | } | |
754 | #endif /* CONFIG_SBUS */ | |
755 | ||
756 | ||
757 | static unsigned int central_build_irq(struct device_node *dp, | |
758 | unsigned int ino, | |
759 | void *_data) | |
760 | { | |
761 | struct device_node *central_dp = _data; | |
762 | struct of_device *central_op = of_find_device_by_node(central_dp); | |
763 | struct resource *res; | |
764 | unsigned long imap, iclr; | |
765 | u32 tmp; | |
766 | ||
767 | if (!strcmp(dp->name, "eeprom")) { | |
768 | res = ¢ral_op->resource[5]; | |
769 | } else if (!strcmp(dp->name, "zs")) { | |
770 | res = ¢ral_op->resource[4]; | |
771 | } else if (!strcmp(dp->name, "clock-board")) { | |
772 | res = ¢ral_op->resource[3]; | |
773 | } else { | |
774 | return ino; | |
775 | } | |
776 | ||
777 | imap = res->start + 0x00UL; | |
778 | iclr = res->start + 0x10UL; | |
779 | ||
780 | /* Set the INO state to idle, and disable. */ | |
781 | upa_writel(0, iclr); | |
782 | upa_readl(iclr); | |
783 | ||
784 | tmp = upa_readl(imap); | |
785 | tmp &= ~0x80000000; | |
786 | upa_writel(tmp, imap); | |
787 | ||
788 | return build_irq(0, iclr, imap); | |
789 | } | |
790 | ||
c35a376d | 791 | static void __init central_irq_trans_init(struct device_node *dp) |
2b1e5978 DM |
792 | { |
793 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
794 | dp->irq_trans->irq_build = central_build_irq; | |
795 | ||
796 | dp->irq_trans->data = dp; | |
797 | } | |
798 | ||
799 | struct irq_trans { | |
800 | const char *name; | |
801 | void (*init)(struct device_node *); | |
802 | }; | |
803 | ||
804 | #ifdef CONFIG_PCI | |
c35a376d | 805 | static struct irq_trans __initdata pci_irq_trans_table[] = { |
2b1e5978 DM |
806 | { "SUNW,sabre", sabre_irq_trans_init }, |
807 | { "pci108e,a000", sabre_irq_trans_init }, | |
808 | { "pci108e,a001", sabre_irq_trans_init }, | |
809 | { "SUNW,psycho", psycho_irq_trans_init }, | |
810 | { "pci108e,8000", psycho_irq_trans_init }, | |
811 | { "SUNW,schizo", schizo_irq_trans_init }, | |
812 | { "pci108e,8001", schizo_irq_trans_init }, | |
813 | { "SUNW,schizo+", schizo_irq_trans_init }, | |
814 | { "pci108e,8002", schizo_irq_trans_init }, | |
9001f285 DM |
815 | { "SUNW,tomatillo", tomatillo_irq_trans_init }, |
816 | { "pci108e,a801", tomatillo_irq_trans_init }, | |
2b1e5978 | 817 | { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init }, |
861fe906 | 818 | { "pciex108e,80f0", fire_irq_trans_init }, |
2b1e5978 DM |
819 | }; |
820 | #endif | |
821 | ||
6e990b50 DM |
822 | static unsigned int sun4v_vdev_irq_build(struct device_node *dp, |
823 | unsigned int devino, | |
824 | void *_data) | |
825 | { | |
826 | u32 devhandle = (u32) (unsigned long) _data; | |
827 | ||
828 | return sun4v_build_irq(devhandle, devino); | |
829 | } | |
830 | ||
c35a376d | 831 | static void __init sun4v_vdev_irq_trans_init(struct device_node *dp) |
6e990b50 | 832 | { |
6a23acf3 | 833 | const struct linux_prom64_registers *regs; |
6e990b50 DM |
834 | |
835 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
836 | dp->irq_trans->irq_build = sun4v_vdev_irq_build; | |
837 | ||
838 | regs = of_get_property(dp, "reg", NULL); | |
839 | dp->irq_trans->data = (void *) (unsigned long) | |
840 | ((regs->phys_addr >> 32UL) & 0x0fffffff); | |
841 | } | |
842 | ||
c35a376d | 843 | static void __init irq_trans_init(struct device_node *dp) |
2b1e5978 | 844 | { |
7233589d | 845 | #ifdef CONFIG_PCI |
4130a4b2 | 846 | const char *model; |
2b1e5978 | 847 | int i; |
7233589d | 848 | #endif |
2b1e5978 | 849 | |
4130a4b2 | 850 | #ifdef CONFIG_PCI |
2b1e5978 DM |
851 | model = of_get_property(dp, "model", NULL); |
852 | if (!model) | |
853 | model = of_get_property(dp, "compatible", NULL); | |
4130a4b2 DM |
854 | if (model) { |
855 | for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) { | |
856 | struct irq_trans *t = &pci_irq_trans_table[i]; | |
2b1e5978 | 857 | |
c91e2eca DM |
858 | if (!strcmp(model, t->name)) { |
859 | t->init(dp); | |
860 | return; | |
861 | } | |
4130a4b2 | 862 | } |
2b1e5978 DM |
863 | } |
864 | #endif | |
865 | #ifdef CONFIG_SBUS | |
866 | if (!strcmp(dp->name, "sbus") || | |
c91e2eca DM |
867 | !strcmp(dp->name, "sbi")) { |
868 | sbus_irq_trans_init(dp); | |
869 | return; | |
870 | } | |
2b1e5978 | 871 | #endif |
4130a4b2 | 872 | if (!strcmp(dp->name, "fhc") && |
c91e2eca DM |
873 | !strcmp(dp->parent->name, "central")) { |
874 | central_irq_trans_init(dp); | |
875 | return; | |
876 | } | |
b2b27757 | 877 | if (!strcmp(dp->name, "virtual-devices") || |
c91e2eca DM |
878 | !strcmp(dp->name, "niu")) { |
879 | sun4v_vdev_irq_trans_init(dp); | |
880 | return; | |
881 | } | |
2b1e5978 DM |
882 | } |
883 | ||
372b07bb DM |
884 | static int is_root_node(const struct device_node *dp) |
885 | { | |
886 | if (!dp) | |
887 | return 0; | |
888 | ||
889 | return (dp->parent == NULL); | |
890 | } | |
891 | ||
892 | /* The following routines deal with the black magic of fully naming a | |
893 | * node. | |
894 | * | |
895 | * Certain well known named nodes are just the simple name string. | |
896 | * | |
897 | * Actual devices have an address specifier appended to the base name | |
898 | * string, like this "foo@addr". The "addr" can be in any number of | |
899 | * formats, and the platform plus the type of the node determine the | |
900 | * format and how it is constructed. | |
901 | * | |
902 | * For children of the ROOT node, the naming convention is fixed and | |
903 | * determined by whether this is a sun4u or sun4v system. | |
904 | * | |
905 | * For children of other nodes, it is bus type specific. So | |
906 | * we walk up the tree until we discover a "device_type" property | |
907 | * we recognize and we go from there. | |
908 | * | |
909 | * As an example, the boot device on my workstation has a full path: | |
910 | * | |
911 | * /pci@1e,600000/ide@d/disk@0,0:c | |
912 | */ | |
913 | static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf) | |
914 | { | |
915 | struct linux_prom64_registers *regs; | |
916 | struct property *rprop; | |
917 | u32 high_bits, low_bits, type; | |
918 | ||
919 | rprop = of_find_property(dp, "reg", NULL); | |
920 | if (!rprop) | |
921 | return; | |
922 | ||
923 | regs = rprop->value; | |
924 | if (!is_root_node(dp->parent)) { | |
925 | sprintf(tmp_buf, "%s@%x,%x", | |
926 | dp->name, | |
927 | (unsigned int) (regs->phys_addr >> 32UL), | |
928 | (unsigned int) (regs->phys_addr & 0xffffffffUL)); | |
929 | return; | |
930 | } | |
931 | ||
932 | type = regs->phys_addr >> 60UL; | |
933 | high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL; | |
934 | low_bits = (regs->phys_addr & 0xffffffffUL); | |
935 | ||
936 | if (type == 0 || type == 8) { | |
937 | const char *prefix = (type == 0) ? "m" : "i"; | |
938 | ||
939 | if (low_bits) | |
940 | sprintf(tmp_buf, "%s@%s%x,%x", | |
941 | dp->name, prefix, | |
942 | high_bits, low_bits); | |
943 | else | |
944 | sprintf(tmp_buf, "%s@%s%x", | |
945 | dp->name, | |
946 | prefix, | |
947 | high_bits); | |
948 | } else if (type == 12) { | |
949 | sprintf(tmp_buf, "%s@%x", | |
950 | dp->name, high_bits); | |
951 | } | |
952 | } | |
953 | ||
954 | static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf) | |
955 | { | |
956 | struct linux_prom64_registers *regs; | |
957 | struct property *prop; | |
958 | ||
959 | prop = of_find_property(dp, "reg", NULL); | |
960 | if (!prop) | |
961 | return; | |
962 | ||
963 | regs = prop->value; | |
964 | if (!is_root_node(dp->parent)) { | |
965 | sprintf(tmp_buf, "%s@%x,%x", | |
966 | dp->name, | |
967 | (unsigned int) (regs->phys_addr >> 32UL), | |
968 | (unsigned int) (regs->phys_addr & 0xffffffffUL)); | |
969 | return; | |
970 | } | |
971 | ||
972 | prop = of_find_property(dp, "upa-portid", NULL); | |
973 | if (!prop) | |
974 | prop = of_find_property(dp, "portid", NULL); | |
975 | if (prop) { | |
976 | unsigned long mask = 0xffffffffUL; | |
977 | ||
978 | if (tlb_type >= cheetah) | |
979 | mask = 0x7fffff; | |
980 | ||
981 | sprintf(tmp_buf, "%s@%x,%x", | |
982 | dp->name, | |
983 | *(u32 *)prop->value, | |
984 | (unsigned int) (regs->phys_addr & mask)); | |
985 | } | |
986 | } | |
987 | ||
988 | /* "name@slot,offset" */ | |
989 | static void __init sbus_path_component(struct device_node *dp, char *tmp_buf) | |
990 | { | |
991 | struct linux_prom_registers *regs; | |
992 | struct property *prop; | |
993 | ||
994 | prop = of_find_property(dp, "reg", NULL); | |
995 | if (!prop) | |
996 | return; | |
997 | ||
998 | regs = prop->value; | |
999 | sprintf(tmp_buf, "%s@%x,%x", | |
1000 | dp->name, | |
1001 | regs->which_io, | |
1002 | regs->phys_addr); | |
1003 | } | |
1004 | ||
1005 | /* "name@devnum[,func]" */ | |
1006 | static void __init pci_path_component(struct device_node *dp, char *tmp_buf) | |
1007 | { | |
1008 | struct linux_prom_pci_registers *regs; | |
1009 | struct property *prop; | |
1010 | unsigned int devfn; | |
1011 | ||
1012 | prop = of_find_property(dp, "reg", NULL); | |
1013 | if (!prop) | |
1014 | return; | |
1015 | ||
1016 | regs = prop->value; | |
1017 | devfn = (regs->phys_hi >> 8) & 0xff; | |
1018 | if (devfn & 0x07) { | |
1019 | sprintf(tmp_buf, "%s@%x,%x", | |
1020 | dp->name, | |
1021 | devfn >> 3, | |
1022 | devfn & 0x07); | |
1023 | } else { | |
1024 | sprintf(tmp_buf, "%s@%x", | |
1025 | dp->name, | |
1026 | devfn >> 3); | |
1027 | } | |
1028 | } | |
1029 | ||
1030 | /* "name@UPA_PORTID,offset" */ | |
1031 | static void __init upa_path_component(struct device_node *dp, char *tmp_buf) | |
1032 | { | |
1033 | struct linux_prom64_registers *regs; | |
1034 | struct property *prop; | |
1035 | ||
1036 | prop = of_find_property(dp, "reg", NULL); | |
1037 | if (!prop) | |
1038 | return; | |
1039 | ||
1040 | regs = prop->value; | |
1041 | ||
1042 | prop = of_find_property(dp, "upa-portid", NULL); | |
1043 | if (!prop) | |
1044 | return; | |
1045 | ||
1046 | sprintf(tmp_buf, "%s@%x,%x", | |
1047 | dp->name, | |
1048 | *(u32 *) prop->value, | |
1049 | (unsigned int) (regs->phys_addr & 0xffffffffUL)); | |
1050 | } | |
1051 | ||
1052 | /* "name@reg" */ | |
1053 | static void __init vdev_path_component(struct device_node *dp, char *tmp_buf) | |
1054 | { | |
1055 | struct property *prop; | |
1056 | u32 *regs; | |
1057 | ||
1058 | prop = of_find_property(dp, "reg", NULL); | |
1059 | if (!prop) | |
1060 | return; | |
1061 | ||
1062 | regs = prop->value; | |
1063 | ||
1064 | sprintf(tmp_buf, "%s@%x", dp->name, *regs); | |
1065 | } | |
1066 | ||
1067 | /* "name@addrhi,addrlo" */ | |
1068 | static void __init ebus_path_component(struct device_node *dp, char *tmp_buf) | |
1069 | { | |
1070 | struct linux_prom64_registers *regs; | |
1071 | struct property *prop; | |
1072 | ||
1073 | prop = of_find_property(dp, "reg", NULL); | |
1074 | if (!prop) | |
1075 | return; | |
1076 | ||
1077 | regs = prop->value; | |
1078 | ||
1079 | sprintf(tmp_buf, "%s@%x,%x", | |
1080 | dp->name, | |
1081 | (unsigned int) (regs->phys_addr >> 32UL), | |
1082 | (unsigned int) (regs->phys_addr & 0xffffffffUL)); | |
1083 | } | |
1084 | ||
1085 | /* "name@bus,addr" */ | |
1086 | static void __init i2c_path_component(struct device_node *dp, char *tmp_buf) | |
1087 | { | |
1088 | struct property *prop; | |
1089 | u32 *regs; | |
1090 | ||
1091 | prop = of_find_property(dp, "reg", NULL); | |
1092 | if (!prop) | |
1093 | return; | |
1094 | ||
1095 | regs = prop->value; | |
1096 | ||
1097 | /* This actually isn't right... should look at the #address-cells | |
1098 | * property of the i2c bus node etc. etc. | |
1099 | */ | |
1100 | sprintf(tmp_buf, "%s@%x,%x", | |
1101 | dp->name, regs[0], regs[1]); | |
1102 | } | |
1103 | ||
1104 | /* "name@reg0[,reg1]" */ | |
1105 | static void __init usb_path_component(struct device_node *dp, char *tmp_buf) | |
1106 | { | |
1107 | struct property *prop; | |
1108 | u32 *regs; | |
1109 | ||
1110 | prop = of_find_property(dp, "reg", NULL); | |
1111 | if (!prop) | |
1112 | return; | |
1113 | ||
1114 | regs = prop->value; | |
1115 | ||
1116 | if (prop->length == sizeof(u32) || regs[1] == 1) { | |
1117 | sprintf(tmp_buf, "%s@%x", | |
1118 | dp->name, regs[0]); | |
1119 | } else { | |
1120 | sprintf(tmp_buf, "%s@%x,%x", | |
1121 | dp->name, regs[0], regs[1]); | |
1122 | } | |
1123 | } | |
1124 | ||
1125 | /* "name@reg0reg1[,reg2reg3]" */ | |
1126 | static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf) | |
1127 | { | |
1128 | struct property *prop; | |
1129 | u32 *regs; | |
1130 | ||
1131 | prop = of_find_property(dp, "reg", NULL); | |
1132 | if (!prop) | |
1133 | return; | |
1134 | ||
1135 | regs = prop->value; | |
1136 | ||
1137 | if (regs[2] || regs[3]) { | |
1138 | sprintf(tmp_buf, "%s@%08x%08x,%04x%08x", | |
1139 | dp->name, regs[0], regs[1], regs[2], regs[3]); | |
1140 | } else { | |
1141 | sprintf(tmp_buf, "%s@%08x%08x", | |
1142 | dp->name, regs[0], regs[1]); | |
1143 | } | |
1144 | } | |
1145 | ||
1146 | static void __init __build_path_component(struct device_node *dp, char *tmp_buf) | |
1147 | { | |
1148 | struct device_node *parent = dp->parent; | |
1149 | ||
1150 | if (parent != NULL) { | |
1151 | if (!strcmp(parent->type, "pci") || | |
c91e2eca DM |
1152 | !strcmp(parent->type, "pciex")) { |
1153 | pci_path_component(dp, tmp_buf); | |
1154 | return; | |
1155 | } | |
1156 | if (!strcmp(parent->type, "sbus")) { | |
1157 | sbus_path_component(dp, tmp_buf); | |
1158 | return; | |
1159 | } | |
1160 | if (!strcmp(parent->type, "upa")) { | |
1161 | upa_path_component(dp, tmp_buf); | |
1162 | return; | |
1163 | } | |
1164 | if (!strcmp(parent->type, "ebus")) { | |
1165 | ebus_path_component(dp, tmp_buf); | |
1166 | return; | |
1167 | } | |
372b07bb | 1168 | if (!strcmp(parent->name, "usb") || |
c91e2eca DM |
1169 | !strcmp(parent->name, "hub")) { |
1170 | usb_path_component(dp, tmp_buf); | |
1171 | return; | |
1172 | } | |
1173 | if (!strcmp(parent->type, "i2c")) { | |
1174 | i2c_path_component(dp, tmp_buf); | |
1175 | return; | |
1176 | } | |
1177 | if (!strcmp(parent->type, "firewire")) { | |
1178 | ieee1394_path_component(dp, tmp_buf); | |
1179 | return; | |
1180 | } | |
1181 | if (!strcmp(parent->type, "virtual-devices")) { | |
1182 | vdev_path_component(dp, tmp_buf); | |
1183 | return; | |
1184 | } | |
372b07bb DM |
1185 | /* "isa" is handled with platform naming */ |
1186 | } | |
1187 | ||
1188 | /* Use platform naming convention. */ | |
c91e2eca DM |
1189 | if (tlb_type == hypervisor) { |
1190 | sun4v_path_component(dp, tmp_buf); | |
1191 | return; | |
1192 | } else { | |
1193 | sun4u_path_component(dp, tmp_buf); | |
1194 | } | |
372b07bb DM |
1195 | } |
1196 | ||
1197 | static char * __init build_path_component(struct device_node *dp) | |
1198 | { | |
1199 | char tmp_buf[64], *n; | |
1200 | ||
1201 | tmp_buf[0] = '\0'; | |
1202 | __build_path_component(dp, tmp_buf); | |
1203 | if (tmp_buf[0] == '\0') | |
1204 | strcpy(tmp_buf, dp->name); | |
1205 | ||
1206 | n = prom_early_alloc(strlen(tmp_buf) + 1); | |
1207 | strcpy(n, tmp_buf); | |
1208 | ||
1209 | return n; | |
1210 | } | |
1211 | ||
1212 | static char * __init build_full_name(struct device_node *dp) | |
1213 | { | |
1214 | int len, ourlen, plen; | |
1215 | char *n; | |
1216 | ||
1217 | plen = strlen(dp->parent->full_name); | |
1218 | ourlen = strlen(dp->path_component_name); | |
1219 | len = ourlen + plen + 2; | |
1220 | ||
1221 | n = prom_early_alloc(len); | |
1222 | strcpy(n, dp->parent->full_name); | |
1223 | if (!is_root_node(dp->parent)) { | |
1224 | strcpy(n + plen, "/"); | |
1225 | plen++; | |
1226 | } | |
1227 | strcpy(n + plen, dp->path_component_name); | |
1228 | ||
1229 | return n; | |
1230 | } | |
1231 | ||
87b385da DM |
1232 | static unsigned int unique_id; |
1233 | ||
1234 | static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len) | |
372b07bb DM |
1235 | { |
1236 | static struct property *tmp = NULL; | |
1237 | struct property *p; | |
1238 | ||
1239 | if (tmp) { | |
1240 | p = tmp; | |
1241 | memset(p, 0, sizeof(*p) + 32); | |
1242 | tmp = NULL; | |
87b385da | 1243 | } else { |
372b07bb | 1244 | p = prom_early_alloc(sizeof(struct property) + 32); |
87b385da DM |
1245 | p->unique_id = unique_id++; |
1246 | } | |
372b07bb DM |
1247 | |
1248 | p->name = (char *) (p + 1); | |
87b385da DM |
1249 | if (special_name) { |
1250 | strcpy(p->name, special_name); | |
1251 | p->length = special_len; | |
1252 | p->value = prom_early_alloc(special_len); | |
1253 | memcpy(p->value, special_val, special_len); | |
372b07bb | 1254 | } else { |
87b385da DM |
1255 | if (prev == NULL) { |
1256 | prom_firstprop(node, p->name); | |
1257 | } else { | |
1258 | prom_nextprop(node, prev, p->name); | |
1259 | } | |
1260 | if (strlen(p->name) == 0) { | |
1261 | tmp = p; | |
1262 | return NULL; | |
1263 | } | |
1264 | p->length = prom_getproplen(node, p->name); | |
1265 | if (p->length <= 0) { | |
1266 | p->length = 0; | |
1267 | } else { | |
1268 | p->value = prom_early_alloc(p->length + 1); | |
1269 | prom_getproperty(node, p->name, p->value, p->length); | |
1270 | ((unsigned char *)p->value)[p->length] = '\0'; | |
1271 | } | |
372b07bb DM |
1272 | } |
1273 | return p; | |
1274 | } | |
1275 | ||
1276 | static struct property * __init build_prop_list(phandle node) | |
1277 | { | |
1278 | struct property *head, *tail; | |
1279 | ||
87b385da DM |
1280 | head = tail = build_one_prop(node, NULL, |
1281 | ".node", &node, sizeof(node)); | |
1282 | ||
1283 | tail->next = build_one_prop(node, NULL, NULL, NULL, 0); | |
1284 | tail = tail->next; | |
372b07bb | 1285 | while(tail) { |
87b385da DM |
1286 | tail->next = build_one_prop(node, tail->name, |
1287 | NULL, NULL, 0); | |
372b07bb DM |
1288 | tail = tail->next; |
1289 | } | |
1290 | ||
1291 | return head; | |
1292 | } | |
1293 | ||
1294 | static char * __init get_one_property(phandle node, const char *name) | |
1295 | { | |
1296 | char *buf = "<NULL>"; | |
1297 | int len; | |
1298 | ||
1299 | len = prom_getproplen(node, name); | |
1300 | if (len > 0) { | |
1301 | buf = prom_early_alloc(len); | |
1302 | prom_getproperty(node, name, buf, len); | |
1303 | } | |
1304 | ||
1305 | return buf; | |
1306 | } | |
1307 | ||
4130a4b2 | 1308 | static struct device_node * __init create_node(phandle node, struct device_node *parent) |
372b07bb DM |
1309 | { |
1310 | struct device_node *dp; | |
1311 | ||
1312 | if (!node) | |
1313 | return NULL; | |
1314 | ||
1315 | dp = prom_early_alloc(sizeof(*dp)); | |
87b385da | 1316 | dp->unique_id = unique_id++; |
4130a4b2 | 1317 | dp->parent = parent; |
372b07bb DM |
1318 | |
1319 | kref_init(&dp->kref); | |
1320 | ||
1321 | dp->name = get_one_property(node, "name"); | |
1322 | dp->type = get_one_property(node, "device_type"); | |
1323 | dp->node = node; | |
1324 | ||
372b07bb DM |
1325 | dp->properties = build_prop_list(node); |
1326 | ||
2b1e5978 DM |
1327 | irq_trans_init(dp); |
1328 | ||
372b07bb DM |
1329 | return dp; |
1330 | } | |
1331 | ||
1332 | static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp) | |
1333 | { | |
aa5242e7 | 1334 | struct device_node *ret = NULL, *prev_sibling = NULL; |
372b07bb DM |
1335 | struct device_node *dp; |
1336 | ||
aa5242e7 DM |
1337 | while (1) { |
1338 | dp = create_node(node, parent); | |
1339 | if (!dp) | |
1340 | break; | |
1341 | ||
1342 | if (prev_sibling) | |
1343 | prev_sibling->sibling = dp; | |
1344 | ||
1345 | if (!ret) | |
1346 | ret = dp; | |
1347 | prev_sibling = dp; | |
1348 | ||
372b07bb DM |
1349 | *(*nextp) = dp; |
1350 | *nextp = &dp->allnext; | |
1351 | ||
372b07bb DM |
1352 | dp->path_component_name = build_path_component(dp); |
1353 | dp->full_name = build_full_name(dp); | |
1354 | ||
1355 | dp->child = build_tree(dp, prom_getchild(node), nextp); | |
1356 | ||
aa5242e7 | 1357 | node = prom_getsibling(node); |
372b07bb DM |
1358 | } |
1359 | ||
aa5242e7 | 1360 | return ret; |
372b07bb DM |
1361 | } |
1362 | ||
5cbc3073 DM |
1363 | static const char *get_mid_prop(void) |
1364 | { | |
1365 | return (tlb_type == spitfire ? "upa-portid" : "portid"); | |
1366 | } | |
1367 | ||
1368 | struct device_node *of_find_node_by_cpuid(int cpuid) | |
1369 | { | |
1370 | struct device_node *dp; | |
1371 | const char *mid_prop = get_mid_prop(); | |
1372 | ||
1373 | for_each_node_by_type(dp, "cpu") { | |
1374 | int id = of_getintprop_default(dp, mid_prop, -1); | |
1375 | const char *this_mid_prop = mid_prop; | |
1376 | ||
1377 | if (id < 0) { | |
1378 | this_mid_prop = "cpuid"; | |
1379 | id = of_getintprop_default(dp, this_mid_prop, -1); | |
1380 | } | |
1381 | ||
1382 | if (id < 0) { | |
1383 | prom_printf("OF: Serious problem, cpu lacks " | |
1384 | "%s property", this_mid_prop); | |
1385 | prom_halt(); | |
1386 | } | |
1387 | if (cpuid == id) | |
1388 | return dp; | |
1389 | } | |
1390 | return NULL; | |
1391 | } | |
1392 | ||
1393 | static void __init of_fill_in_cpu_data(void) | |
1394 | { | |
1395 | struct device_node *dp; | |
1396 | const char *mid_prop = get_mid_prop(); | |
1397 | ||
1398 | ncpus_probed = 0; | |
1399 | for_each_node_by_type(dp, "cpu") { | |
1400 | int cpuid = of_getintprop_default(dp, mid_prop, -1); | |
1401 | const char *this_mid_prop = mid_prop; | |
1402 | struct device_node *portid_parent; | |
1403 | int portid = -1; | |
1404 | ||
1405 | portid_parent = NULL; | |
1406 | if (cpuid < 0) { | |
1407 | this_mid_prop = "cpuid"; | |
1408 | cpuid = of_getintprop_default(dp, this_mid_prop, -1); | |
1409 | if (cpuid >= 0) { | |
1410 | int limit = 2; | |
1411 | ||
1412 | portid_parent = dp; | |
1413 | while (limit--) { | |
1414 | portid_parent = portid_parent->parent; | |
1415 | if (!portid_parent) | |
1416 | break; | |
1417 | portid = of_getintprop_default(portid_parent, | |
1418 | "portid", -1); | |
1419 | if (portid >= 0) | |
1420 | break; | |
1421 | } | |
1422 | } | |
1423 | } | |
1424 | ||
1425 | if (cpuid < 0) { | |
1426 | prom_printf("OF: Serious problem, cpu lacks " | |
1427 | "%s property", this_mid_prop); | |
1428 | prom_halt(); | |
1429 | } | |
1430 | ||
1431 | ncpus_probed++; | |
1432 | ||
1433 | #ifdef CONFIG_SMP | |
8a177c4f DM |
1434 | if (cpuid >= NR_CPUS) { |
1435 | printk(KERN_WARNING "Ignoring CPU %d which is " | |
1436 | ">= NR_CPUS (%d)\n", | |
1437 | cpuid, NR_CPUS); | |
5cbc3073 | 1438 | continue; |
8a177c4f | 1439 | } |
5cbc3073 DM |
1440 | #else |
1441 | /* On uniprocessor we only want the values for the | |
1442 | * real physical cpu the kernel booted onto, however | |
1443 | * cpu_data() only has one entry at index 0. | |
1444 | */ | |
1445 | if (cpuid != real_hard_smp_processor_id()) | |
1446 | continue; | |
1447 | cpuid = 0; | |
1448 | #endif | |
1449 | ||
1450 | cpu_data(cpuid).clock_tick = | |
1451 | of_getintprop_default(dp, "clock-frequency", 0); | |
1452 | ||
1453 | if (portid_parent) { | |
1454 | cpu_data(cpuid).dcache_size = | |
1455 | of_getintprop_default(dp, "l1-dcache-size", | |
1456 | 16 * 1024); | |
1457 | cpu_data(cpuid).dcache_line_size = | |
1458 | of_getintprop_default(dp, "l1-dcache-line-size", | |
1459 | 32); | |
1460 | cpu_data(cpuid).icache_size = | |
1461 | of_getintprop_default(dp, "l1-icache-size", | |
1462 | 8 * 1024); | |
1463 | cpu_data(cpuid).icache_line_size = | |
1464 | of_getintprop_default(dp, "l1-icache-line-size", | |
1465 | 32); | |
1466 | cpu_data(cpuid).ecache_size = | |
1467 | of_getintprop_default(dp, "l2-cache-size", 0); | |
1468 | cpu_data(cpuid).ecache_line_size = | |
1469 | of_getintprop_default(dp, "l2-cache-line-size", 0); | |
1470 | if (!cpu_data(cpuid).ecache_size || | |
1471 | !cpu_data(cpuid).ecache_line_size) { | |
1472 | cpu_data(cpuid).ecache_size = | |
1473 | of_getintprop_default(portid_parent, | |
1474 | "l2-cache-size", | |
1475 | (4 * 1024 * 1024)); | |
1476 | cpu_data(cpuid).ecache_line_size = | |
1477 | of_getintprop_default(portid_parent, | |
1478 | "l2-cache-line-size", 64); | |
1479 | } | |
1480 | ||
1481 | cpu_data(cpuid).core_id = portid + 1; | |
5cd342df | 1482 | cpu_data(cpuid).proc_id = portid; |
a2f9f6bb DM |
1483 | #ifdef CONFIG_SMP |
1484 | sparc64_multi_core = 1; | |
1485 | #endif | |
5cbc3073 DM |
1486 | } else { |
1487 | cpu_data(cpuid).dcache_size = | |
1488 | of_getintprop_default(dp, "dcache-size", 16 * 1024); | |
1489 | cpu_data(cpuid).dcache_line_size = | |
1490 | of_getintprop_default(dp, "dcache-line-size", 32); | |
1491 | ||
1492 | cpu_data(cpuid).icache_size = | |
1493 | of_getintprop_default(dp, "icache-size", 16 * 1024); | |
1494 | cpu_data(cpuid).icache_line_size = | |
1495 | of_getintprop_default(dp, "icache-line-size", 32); | |
1496 | ||
1497 | cpu_data(cpuid).ecache_size = | |
1498 | of_getintprop_default(dp, "ecache-size", | |
1499 | (4 * 1024 * 1024)); | |
1500 | cpu_data(cpuid).ecache_line_size = | |
1501 | of_getintprop_default(dp, "ecache-line-size", 64); | |
1502 | ||
1503 | cpu_data(cpuid).core_id = 0; | |
5cd342df | 1504 | cpu_data(cpuid).proc_id = -1; |
5cbc3073 DM |
1505 | } |
1506 | ||
1507 | #ifdef CONFIG_SMP | |
1508 | cpu_set(cpuid, cpu_present_map); | |
4f0234f4 | 1509 | cpu_set(cpuid, cpu_possible_map); |
5cbc3073 DM |
1510 | #endif |
1511 | } | |
1512 | ||
1513 | smp_fill_in_sib_core_maps(); | |
1514 | } | |
1515 | ||
c73fcc84 DM |
1516 | struct device_node *of_console_device; |
1517 | EXPORT_SYMBOL(of_console_device); | |
1518 | ||
1519 | char *of_console_path; | |
1520 | EXPORT_SYMBOL(of_console_path); | |
1521 | ||
1522 | char *of_console_options; | |
1523 | EXPORT_SYMBOL(of_console_options); | |
1524 | ||
1525 | static void __init of_console_init(void) | |
1526 | { | |
1527 | char *msg = "OF stdout device is: %s\n"; | |
1528 | struct device_node *dp; | |
1529 | const char *type; | |
1530 | phandle node; | |
1531 | ||
1532 | of_console_path = prom_early_alloc(256); | |
1533 | if (prom_ihandle2path(prom_stdout, of_console_path, 256) < 0) { | |
1534 | prom_printf("Cannot obtain path of stdout.\n"); | |
1535 | prom_halt(); | |
1536 | } | |
1537 | of_console_options = strrchr(of_console_path, ':'); | |
1538 | if (of_console_options) { | |
1539 | of_console_options++; | |
1540 | if (*of_console_options == '\0') | |
1541 | of_console_options = NULL; | |
1542 | } | |
1543 | ||
1544 | node = prom_inst2pkg(prom_stdout); | |
1545 | if (!node) { | |
1546 | prom_printf("Cannot resolve stdout node from " | |
1547 | "instance %08x.\n", prom_stdout); | |
1548 | prom_halt(); | |
1549 | } | |
1550 | ||
1551 | dp = of_find_node_by_phandle(node); | |
1552 | type = of_get_property(dp, "device_type", NULL); | |
1553 | if (!type) { | |
1554 | prom_printf("Console stdout lacks device_type property.\n"); | |
1555 | prom_halt(); | |
1556 | } | |
1557 | ||
1558 | if (strcmp(type, "display") && strcmp(type, "serial")) { | |
1559 | prom_printf("Console device_type is neither display " | |
1560 | "nor serial.\n"); | |
1561 | prom_halt(); | |
1562 | } | |
1563 | ||
1564 | of_console_device = dp; | |
1565 | ||
c73fcc84 DM |
1566 | printk(msg, of_console_path); |
1567 | } | |
1568 | ||
372b07bb DM |
1569 | void __init prom_build_devicetree(void) |
1570 | { | |
1571 | struct device_node **nextp; | |
1572 | ||
4130a4b2 | 1573 | allnodes = create_node(prom_root_node, NULL); |
372b07bb DM |
1574 | allnodes->path_component_name = ""; |
1575 | allnodes->full_name = "/"; | |
1576 | ||
1577 | nextp = &allnodes->allnext; | |
1578 | allnodes->child = build_tree(allnodes, | |
1579 | prom_getchild(allnodes->node), | |
1580 | &nextp); | |
c73fcc84 DM |
1581 | of_console_init(); |
1582 | ||
372b07bb DM |
1583 | printk("PROM: Built device tree with %u bytes of memory.\n", |
1584 | prom_early_allocated); | |
5cbc3073 DM |
1585 | |
1586 | if (tlb_type != hypervisor) | |
1587 | of_fill_in_cpu_data(); | |
372b07bb | 1588 | } |