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88278ca2 1/*
1da177e4
LT
2 * rtrap.S: Return from Sparc trap low-level code.
3 *
4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
5 */
6
7#include <asm/page.h>
8#include <asm/ptrace.h>
9#include <asm/psr.h>
10#include <asm/asi.h>
11#include <asm/smp.h>
12#include <asm/contregs.h>
13#include <asm/winmacro.h>
14#include <asm/asmmacro.h>
15#include <asm/thread_info.h>
16
17#define t_psr l0
18#define t_pc l1
19#define t_npc l2
20#define t_wim l3
21#define twin_tmp1 l4
22#define glob_tmp g4
23#define curptr g6
24
25 /* 7 WINDOW SPARC PATCH INSTRUCTIONS */
26 .globl rtrap_7win_patch1, rtrap_7win_patch2, rtrap_7win_patch3
27 .globl rtrap_7win_patch4, rtrap_7win_patch5
28rtrap_7win_patch1: srl %t_wim, 0x6, %glob_tmp
29rtrap_7win_patch2: and %glob_tmp, 0x7f, %glob_tmp
30rtrap_7win_patch3: srl %g1, 7, %g2
31rtrap_7win_patch4: srl %g2, 6, %g2
32rtrap_7win_patch5: and %g1, 0x7f, %g1
33 /* END OF PATCH INSTRUCTIONS */
34
35 /* We need to check for a few things which are:
36 * 1) The need to call schedule() because this
37 * processes quantum is up.
38 * 2) Pending signals for this process, if any
39 * exist we need to call do_signal() to do
40 * the needy.
41 *
42 * Else we just check if the rett would land us
43 * in an invalid window, if so we need to grab
44 * it off the user/kernel stack first.
45 */
46
47 .globl ret_trap_entry, rtrap_patch1, rtrap_patch2
48 .globl rtrap_patch3, rtrap_patch4, rtrap_patch5
49 .globl ret_trap_lockless_ipi
50ret_trap_entry:
51ret_trap_lockless_ipi:
52 andcc %t_psr, PSR_PS, %g0
28e61036 53 sethi %hi(PSR_SYSCALL), %g1
1da177e4 54 be 1f
28e61036 55 andn %t_psr, %g1, %t_psr
1da177e4
LT
56
57 wr %t_psr, 0x0, %psr
58 b ret_trap_kernel
59 nop
60
611:
62 ld [%curptr + TI_FLAGS], %g2
63 andcc %g2, (_TIF_NEED_RESCHED), %g0
64 be signal_p
65 nop
66
67 call schedule
68 nop
69
70 ld [%curptr + TI_FLAGS], %g2
71signal_p:
2d7d5f05 72 andcc %g2, (_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK), %g0
1da177e4
LT
73 bz,a ret_trap_continue
74 ld [%sp + STACKFRAME_SZ + PT_PSR], %t_psr
75
2d7d5f05 76 mov %l5, %o1
1da177e4 77 call do_signal
2d7d5f05 78 add %sp, STACKFRAME_SZ, %o0 ! pt_regs ptr
1da177e4
LT
79
80 /* Fall through. */
81 ld [%sp + STACKFRAME_SZ + PT_PSR], %t_psr
82 clr %l6
83ret_trap_continue:
28e61036
DM
84 sethi %hi(PSR_SYSCALL), %g1
85 andn %t_psr, %g1, %t_psr
1da177e4
LT
86 wr %t_psr, 0x0, %psr
87 WRITE_PAUSE
88
89 ld [%curptr + TI_W_SAVED], %twin_tmp1
90 orcc %g0, %twin_tmp1, %g0
91 be ret_trap_nobufwins
92 nop
93
94 wr %t_psr, PSR_ET, %psr
95 WRITE_PAUSE
96
97 mov 1, %o1
98 call try_to_clear_window_buffer
99 add %sp, STACKFRAME_SZ, %o0
100
101 b signal_p
102 ld [%curptr + TI_FLAGS], %g2
103
104ret_trap_nobufwins:
105 /* Load up the user's out registers so we can pull
106 * a window from the stack, if necessary.
107 */
108 LOAD_PT_INS(sp)
109
110 /* If there are already live user windows in the
111 * set we can return from trap safely.
112 */
113 ld [%curptr + TI_UWINMASK], %twin_tmp1
114 orcc %g0, %twin_tmp1, %g0
115 bne ret_trap_userwins_ok
116 nop
117
118 /* Calculate new %wim, we have to pull a register
119 * window from the users stack.
120 */
121ret_trap_pull_one_window:
122 rd %wim, %t_wim
123 sll %t_wim, 0x1, %twin_tmp1
124rtrap_patch1: srl %t_wim, 0x7, %glob_tmp
125 or %glob_tmp, %twin_tmp1, %glob_tmp
126rtrap_patch2: and %glob_tmp, 0xff, %glob_tmp
127
128 wr %glob_tmp, 0x0, %wim
129
130 /* Here comes the architecture specific
131 * branch to the user stack checking routine
132 * for return from traps.
133 */
134 .globl rtrap_mmu_patchme
135rtrap_mmu_patchme: b sun4c_rett_stackchk
136 andcc %fp, 0x7, %g0
137
138ret_trap_userwins_ok:
139 LOAD_PT_PRIV(sp, t_psr, t_pc, t_npc)
140 or %t_pc, %t_npc, %g2
141 andcc %g2, 0x3, %g0
8bf3028e 142 sethi %hi(PSR_SYSCALL), %g2
1da177e4 143 be 1f
28e61036 144 andn %t_psr, %g2, %t_psr
1da177e4
LT
145
146 b ret_trap_unaligned_pc
147 add %sp, STACKFRAME_SZ, %o0
148
1491:
150 LOAD_PT_YREG(sp, g1)
151 LOAD_PT_GLOBALS(sp)
152
153 wr %t_psr, 0x0, %psr
154 WRITE_PAUSE
155
156 jmp %t_pc
157 rett %t_npc
158
159ret_trap_unaligned_pc:
160 ld [%sp + STACKFRAME_SZ + PT_PC], %o1
161 ld [%sp + STACKFRAME_SZ + PT_NPC], %o2
162 ld [%sp + STACKFRAME_SZ + PT_PSR], %o3
163
164 wr %t_wim, 0x0, %wim ! or else...
165
166 wr %t_psr, PSR_ET, %psr
167 WRITE_PAUSE
168
169 call do_memaccess_unaligned
170 nop
171
172 b signal_p
173 ld [%curptr + TI_FLAGS], %g2
174
175ret_trap_kernel:
176 /* Will the rett land us in the invalid window? */
177 mov 2, %g1
178 sll %g1, %t_psr, %g1
179rtrap_patch3: srl %g1, 8, %g2
180 or %g1, %g2, %g1
181 rd %wim, %g2
182 andcc %g2, %g1, %g0
183 be 1f ! Nope, just return from the trap
184 sll %g2, 0x1, %g1
185
186 /* We have to grab a window before returning. */
187rtrap_patch4: srl %g2, 7, %g2
188 or %g1, %g2, %g1
189rtrap_patch5: and %g1, 0xff, %g1
190
191 wr %g1, 0x0, %wim
192
193 /* Grrr, make sure we load from the right %sp... */
194 LOAD_PT_ALL(sp, t_psr, t_pc, t_npc, g1)
195
196 restore %g0, %g0, %g0
197 LOAD_WINDOW(sp)
198 b 2f
199 save %g0, %g0, %g0
200
201 /* Reload the entire frame in case this is from a
202 * kernel system call or whatever...
203 */
2041:
205 LOAD_PT_ALL(sp, t_psr, t_pc, t_npc, g1)
2062:
28e61036
DM
207 sethi %hi(PSR_SYSCALL), %twin_tmp1
208 andn %t_psr, %twin_tmp1, %t_psr
1da177e4
LT
209 wr %t_psr, 0x0, %psr
210 WRITE_PAUSE
211
212 jmp %t_pc
213 rett %t_npc
214
215ret_trap_user_stack_is_bolixed:
216 wr %t_wim, 0x0, %wim
217
218 wr %t_psr, PSR_ET, %psr
219 WRITE_PAUSE
220
221 call window_ret_fault
222 add %sp, STACKFRAME_SZ, %o0
223
224 b signal_p
225 ld [%curptr + TI_FLAGS], %g2
226
227
228 .globl sun4c_rett_stackchk
229sun4c_rett_stackchk:
230 be 1f
231 and %fp, 0xfff, %g1 ! delay slot
232
233 b ret_trap_user_stack_is_bolixed + 0x4
234 wr %t_wim, 0x0, %wim
235
236 /* See if we have to check the sanity of one page or two */
2371:
238 add %g1, 0x38, %g1
239 sra %fp, 29, %g2
240 add %g2, 0x1, %g2
241 andncc %g2, 0x1, %g0
242 be 1f
243 andncc %g1, 0xff8, %g0
244
245 /* %sp is in vma hole, yuck */
246 b ret_trap_user_stack_is_bolixed + 0x4
247 wr %t_wim, 0x0, %wim
248
2491:
250 be sun4c_rett_onepage /* Only one page to check */
251 lda [%fp] ASI_PTE, %g2
252
253sun4c_rett_twopages:
254 add %fp, 0x38, %g1
255 sra %g1, 29, %g2
256 add %g2, 0x1, %g2
257 andncc %g2, 0x1, %g0
258 be 1f
259 lda [%g1] ASI_PTE, %g2
260
261 /* Second page is in vma hole */
262 b ret_trap_user_stack_is_bolixed + 0x4
263 wr %t_wim, 0x0, %wim
264
2651:
266 srl %g2, 29, %g2
267 andcc %g2, 0x4, %g0
268 bne sun4c_rett_onepage
269 lda [%fp] ASI_PTE, %g2
270
271 /* Second page has bad perms */
272 b ret_trap_user_stack_is_bolixed + 0x4
273 wr %t_wim, 0x0, %wim
274
275sun4c_rett_onepage:
276 srl %g2, 29, %g2
277 andcc %g2, 0x4, %g0
278 bne,a 1f
279 restore %g0, %g0, %g0
280
281 /* A page had bad page permissions, losing... */
282 b ret_trap_user_stack_is_bolixed + 0x4
283 wr %t_wim, 0x0, %wim
284
285 /* Whee, things are ok, load the window and continue. */
2861:
287 LOAD_WINDOW(sp)
288
289 b ret_trap_userwins_ok
290 save %g0, %g0, %g0
291
292 .globl srmmu_rett_stackchk
293srmmu_rett_stackchk:
294 bne ret_trap_user_stack_is_bolixed
295 sethi %hi(PAGE_OFFSET), %g1
296 cmp %g1, %fp
297 bleu ret_trap_user_stack_is_bolixed
298 mov AC_M_SFSR, %g1
299 lda [%g1] ASI_M_MMUREGS, %g0
300
301 lda [%g0] ASI_M_MMUREGS, %g1
302 or %g1, 0x2, %g1
303 sta %g1, [%g0] ASI_M_MMUREGS
304
305 restore %g0, %g0, %g0
306
307 LOAD_WINDOW(sp)
308
309 save %g0, %g0, %g0
310
311 andn %g1, 0x2, %g1
312 sta %g1, [%g0] ASI_M_MMUREGS
313
314 mov AC_M_SFAR, %g2
315 lda [%g2] ASI_M_MMUREGS, %g2
316
317 mov AC_M_SFSR, %g1
318 lda [%g1] ASI_M_MMUREGS, %g1
319 andcc %g1, 0x2, %g0
320 be ret_trap_userwins_ok
321 nop
322
323 b,a ret_trap_user_stack_is_bolixed