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1da177e4 LT |
1 | /* $Id: sun4d_irq.c,v 1.29 2001/12/11 04:55:51 davem Exp $ |
2 | * arch/sparc/kernel/sun4d_irq.c: | |
3 | * SS1000/SC2000 interrupt handling. | |
4 | * | |
5 | * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | |
6 | * Heavily based on arch/sparc/kernel/irq.c. | |
7 | */ | |
8 | ||
9 | #include <linux/config.h> | |
10 | #include <linux/errno.h> | |
11 | #include <linux/linkage.h> | |
12 | #include <linux/kernel_stat.h> | |
13 | #include <linux/signal.h> | |
14 | #include <linux/sched.h> | |
15 | #include <linux/ptrace.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/random.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/smp.h> | |
21 | #include <linux/smp_lock.h> | |
22 | #include <linux/spinlock.h> | |
23 | #include <linux/seq_file.h> | |
24 | ||
25 | #include <asm/ptrace.h> | |
26 | #include <asm/processor.h> | |
27 | #include <asm/system.h> | |
28 | #include <asm/psr.h> | |
29 | #include <asm/smp.h> | |
30 | #include <asm/vaddrs.h> | |
31 | #include <asm/timer.h> | |
32 | #include <asm/openprom.h> | |
33 | #include <asm/oplib.h> | |
34 | #include <asm/traps.h> | |
35 | #include <asm/irq.h> | |
36 | #include <asm/io.h> | |
37 | #include <asm/pgalloc.h> | |
38 | #include <asm/pgtable.h> | |
39 | #include <asm/sbus.h> | |
40 | #include <asm/sbi.h> | |
41 | #include <asm/cacheflush.h> | |
42 | ||
43 | /* If you trust current SCSI layer to handle different SCSI IRQs, enable this. I don't trust it... -jj */ | |
44 | /* #define DISTRIBUTE_IRQS */ | |
45 | ||
46 | struct sun4d_timer_regs *sun4d_timers; | |
47 | #define TIMER_IRQ 10 | |
48 | ||
49 | #define MAX_STATIC_ALLOC 4 | |
50 | extern struct irqaction static_irqaction[MAX_STATIC_ALLOC]; | |
51 | extern int static_irq_count; | |
52 | unsigned char cpu_leds[32]; | |
53 | #ifdef CONFIG_SMP | |
54 | unsigned char sbus_tid[32]; | |
55 | #endif | |
56 | ||
57 | extern struct irqaction *irq_action[]; | |
58 | extern spinlock_t irq_action_lock; | |
59 | ||
60 | struct sbus_action { | |
61 | struct irqaction *action; | |
62 | /* For SMP this needs to be extended */ | |
63 | } *sbus_actions; | |
64 | ||
65 | static int pil_to_sbus[] = { | |
66 | 0, 0, 1, 2, 0, 3, 0, 4, 0, 5, 0, 6, 0, 7, 0, 0, | |
67 | }; | |
68 | ||
69 | static int sbus_to_pil[] = { | |
70 | 0, 2, 3, 5, 7, 9, 11, 13, | |
71 | }; | |
72 | ||
73 | static int nsbi; | |
74 | #ifdef CONFIG_SMP | |
75 | DEFINE_SPINLOCK(sun4d_imsk_lock); | |
76 | #endif | |
77 | ||
78 | int show_sun4d_interrupts(struct seq_file *p, void *v) | |
79 | { | |
80 | int i = *(loff_t *) v, j = 0, k = 0, sbusl; | |
81 | struct irqaction * action; | |
82 | unsigned long flags; | |
83 | #ifdef CONFIG_SMP | |
84 | int x; | |
85 | #endif | |
86 | ||
87 | spin_lock_irqsave(&irq_action_lock, flags); | |
88 | if (i < NR_IRQS) { | |
89 | sbusl = pil_to_sbus[i]; | |
90 | if (!sbusl) { | |
91 | action = *(i + irq_action); | |
92 | if (!action) | |
93 | goto out_unlock; | |
94 | } else { | |
95 | for (j = 0; j < nsbi; j++) { | |
96 | for (k = 0; k < 4; k++) | |
97 | if ((action = sbus_actions [(j << 5) + (sbusl << 2) + k].action)) | |
98 | goto found_it; | |
99 | } | |
100 | goto out_unlock; | |
101 | } | |
102 | found_it: seq_printf(p, "%3d: ", i); | |
103 | #ifndef CONFIG_SMP | |
104 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
105 | #else | |
394e3902 AM |
106 | for_each_online_cpu(x) |
107 | seq_printf(p, "%10u ", | |
108 | kstat_cpu(cpu_logical_map(x)).irqs[i]); | |
1da177e4 LT |
109 | #endif |
110 | seq_printf(p, "%c %s", | |
111 | (action->flags & SA_INTERRUPT) ? '+' : ' ', | |
112 | action->name); | |
113 | action = action->next; | |
114 | for (;;) { | |
115 | for (; action; action = action->next) { | |
116 | seq_printf(p, ",%s %s", | |
117 | (action->flags & SA_INTERRUPT) ? " +" : "", | |
118 | action->name); | |
119 | } | |
120 | if (!sbusl) break; | |
121 | k++; | |
122 | if (k < 4) | |
123 | action = sbus_actions [(j << 5) + (sbusl << 2) + k].action; | |
124 | else { | |
125 | j++; | |
126 | if (j == nsbi) break; | |
127 | k = 0; | |
128 | action = sbus_actions [(j << 5) + (sbusl << 2)].action; | |
129 | } | |
130 | } | |
131 | seq_putc(p, '\n'); | |
132 | } | |
133 | out_unlock: | |
134 | spin_unlock_irqrestore(&irq_action_lock, flags); | |
135 | return 0; | |
136 | } | |
137 | ||
138 | void sun4d_free_irq(unsigned int irq, void *dev_id) | |
139 | { | |
140 | struct irqaction *action, **actionp; | |
141 | struct irqaction *tmp = NULL; | |
142 | unsigned long flags; | |
143 | ||
144 | spin_lock_irqsave(&irq_action_lock, flags); | |
145 | if (irq < 15) | |
146 | actionp = irq + irq_action; | |
147 | else | |
148 | actionp = &(sbus_actions[irq - (1 << 5)].action); | |
149 | action = *actionp; | |
150 | if (!action) { | |
151 | printk("Trying to free free IRQ%d\n",irq); | |
152 | goto out_unlock; | |
153 | } | |
154 | if (dev_id) { | |
155 | for (; action; action = action->next) { | |
156 | if (action->dev_id == dev_id) | |
157 | break; | |
158 | tmp = action; | |
159 | } | |
160 | if (!action) { | |
161 | printk("Trying to free free shared IRQ%d\n",irq); | |
162 | goto out_unlock; | |
163 | } | |
164 | } else if (action->flags & SA_SHIRQ) { | |
165 | printk("Trying to free shared IRQ%d with NULL device ID\n", irq); | |
166 | goto out_unlock; | |
167 | } | |
168 | if (action->flags & SA_STATIC_ALLOC) | |
169 | { | |
170 | /* This interrupt is marked as specially allocated | |
171 | * so it is a bad idea to free it. | |
172 | */ | |
173 | printk("Attempt to free statically allocated IRQ%d (%s)\n", | |
174 | irq, action->name); | |
175 | goto out_unlock; | |
176 | } | |
177 | ||
178 | if (action && tmp) | |
179 | tmp->next = action->next; | |
180 | else | |
181 | *actionp = action->next; | |
182 | ||
183 | spin_unlock_irqrestore(&irq_action_lock, flags); | |
184 | ||
185 | synchronize_irq(irq); | |
186 | ||
187 | spin_lock_irqsave(&irq_action_lock, flags); | |
188 | ||
189 | kfree(action); | |
190 | ||
191 | if (!(*actionp)) | |
192 | disable_irq(irq); | |
193 | ||
194 | out_unlock: | |
195 | spin_unlock_irqrestore(&irq_action_lock, flags); | |
196 | } | |
197 | ||
198 | extern void unexpected_irq(int, void *, struct pt_regs *); | |
199 | ||
200 | void sun4d_handler_irq(int irq, struct pt_regs * regs) | |
201 | { | |
202 | struct irqaction * action; | |
203 | int cpu = smp_processor_id(); | |
204 | /* SBUS IRQ level (1 - 7) */ | |
205 | int sbusl = pil_to_sbus[irq]; | |
206 | ||
207 | /* FIXME: Is this necessary?? */ | |
208 | cc_get_ipen(); | |
209 | ||
210 | cc_set_iclr(1 << irq); | |
211 | ||
212 | irq_enter(); | |
213 | kstat_cpu(cpu).irqs[irq]++; | |
214 | if (!sbusl) { | |
215 | action = *(irq + irq_action); | |
216 | if (!action) | |
217 | unexpected_irq(irq, NULL, regs); | |
218 | do { | |
219 | action->handler(irq, action->dev_id, regs); | |
220 | action = action->next; | |
221 | } while (action); | |
222 | } else { | |
223 | int bus_mask = bw_get_intr_mask(sbusl) & 0x3ffff; | |
224 | int sbino; | |
225 | struct sbus_action *actionp; | |
226 | unsigned mask, slot; | |
227 | int sbil = (sbusl << 2); | |
228 | ||
229 | bw_clear_intr_mask(sbusl, bus_mask); | |
230 | ||
231 | /* Loop for each pending SBI */ | |
232 | for (sbino = 0; bus_mask; sbino++, bus_mask >>= 1) | |
233 | if (bus_mask & 1) { | |
234 | mask = acquire_sbi(SBI2DEVID(sbino), 0xf << sbil); | |
235 | mask &= (0xf << sbil); | |
236 | actionp = sbus_actions + (sbino << 5) + (sbil); | |
237 | /* Loop for each pending SBI slot */ | |
238 | for (slot = (1 << sbil); mask; slot <<= 1, actionp++) | |
239 | if (mask & slot) { | |
240 | mask &= ~slot; | |
241 | action = actionp->action; | |
242 | ||
243 | if (!action) | |
244 | unexpected_irq(irq, NULL, regs); | |
245 | do { | |
246 | action->handler(irq, action->dev_id, regs); | |
247 | action = action->next; | |
248 | } while (action); | |
249 | release_sbi(SBI2DEVID(sbino), slot); | |
250 | } | |
251 | } | |
252 | } | |
253 | irq_exit(); | |
254 | } | |
255 | ||
256 | unsigned int sun4d_build_irq(struct sbus_dev *sdev, int irq) | |
257 | { | |
258 | int sbusl = pil_to_sbus[irq]; | |
259 | ||
260 | if (sbusl) | |
261 | return ((sdev->bus->board + 1) << 5) + (sbusl << 2) + sdev->slot; | |
262 | else | |
263 | return irq; | |
264 | } | |
265 | ||
266 | unsigned int sun4d_sbint_to_irq(struct sbus_dev *sdev, unsigned int sbint) | |
267 | { | |
268 | if (sbint >= sizeof(sbus_to_pil)) { | |
269 | printk(KERN_ERR "%s: bogus SBINT %d\n", sdev->prom_name, sbint); | |
270 | BUG(); | |
271 | } | |
272 | return sun4d_build_irq(sdev, sbus_to_pil[sbint]); | |
273 | } | |
274 | ||
275 | int sun4d_request_irq(unsigned int irq, | |
276 | irqreturn_t (*handler)(int, void *, struct pt_regs *), | |
277 | unsigned long irqflags, const char * devname, void *dev_id) | |
278 | { | |
279 | struct irqaction *action, *tmp = NULL, **actionp; | |
280 | unsigned long flags; | |
281 | int ret; | |
282 | ||
283 | if(irq > 14 && irq < (1 << 5)) { | |
284 | ret = -EINVAL; | |
285 | goto out; | |
286 | } | |
287 | ||
288 | if (!handler) { | |
289 | ret = -EINVAL; | |
290 | goto out; | |
291 | } | |
292 | ||
293 | spin_lock_irqsave(&irq_action_lock, flags); | |
294 | ||
295 | if (irq >= (1 << 5)) | |
296 | actionp = &(sbus_actions[irq - (1 << 5)].action); | |
297 | else | |
298 | actionp = irq + irq_action; | |
299 | action = *actionp; | |
300 | ||
301 | if (action) { | |
302 | if ((action->flags & SA_SHIRQ) && (irqflags & SA_SHIRQ)) { | |
303 | for (tmp = action; tmp->next; tmp = tmp->next); | |
304 | } else { | |
305 | ret = -EBUSY; | |
306 | goto out_unlock; | |
307 | } | |
308 | if ((action->flags & SA_INTERRUPT) ^ (irqflags & SA_INTERRUPT)) { | |
309 | printk("Attempt to mix fast and slow interrupts on IRQ%d denied\n", irq); | |
310 | ret = -EBUSY; | |
311 | goto out_unlock; | |
312 | } | |
313 | action = NULL; /* Or else! */ | |
314 | } | |
315 | ||
316 | /* If this is flagged as statically allocated then we use our | |
317 | * private struct which is never freed. | |
318 | */ | |
319 | if (irqflags & SA_STATIC_ALLOC) { | |
320 | if (static_irq_count < MAX_STATIC_ALLOC) | |
321 | action = &static_irqaction[static_irq_count++]; | |
322 | else | |
323 | printk("Request for IRQ%d (%s) SA_STATIC_ALLOC failed using kmalloc\n", irq, devname); | |
324 | } | |
325 | ||
326 | if (action == NULL) | |
327 | action = (struct irqaction *)kmalloc(sizeof(struct irqaction), | |
328 | GFP_ATOMIC); | |
329 | ||
330 | if (!action) { | |
331 | ret = -ENOMEM; | |
332 | goto out_unlock; | |
333 | } | |
334 | ||
335 | action->handler = handler; | |
336 | action->flags = irqflags; | |
337 | cpus_clear(action->mask); | |
338 | action->name = devname; | |
339 | action->next = NULL; | |
340 | action->dev_id = dev_id; | |
341 | ||
342 | if (tmp) | |
343 | tmp->next = action; | |
344 | else | |
345 | *actionp = action; | |
346 | ||
347 | enable_irq(irq); | |
348 | ||
349 | ret = 0; | |
350 | out_unlock: | |
351 | spin_unlock_irqrestore(&irq_action_lock, flags); | |
352 | out: | |
353 | return ret; | |
354 | } | |
355 | ||
356 | static void sun4d_disable_irq(unsigned int irq) | |
357 | { | |
358 | #ifdef CONFIG_SMP | |
359 | int tid = sbus_tid[(irq >> 5) - 1]; | |
360 | unsigned long flags; | |
361 | #endif | |
362 | ||
363 | if (irq < NR_IRQS) return; | |
364 | #ifdef CONFIG_SMP | |
365 | spin_lock_irqsave(&sun4d_imsk_lock, flags); | |
366 | cc_set_imsk_other(tid, cc_get_imsk_other(tid) | (1 << sbus_to_pil[(irq >> 2) & 7])); | |
367 | spin_unlock_irqrestore(&sun4d_imsk_lock, flags); | |
368 | #else | |
369 | cc_set_imsk(cc_get_imsk() | (1 << sbus_to_pil[(irq >> 2) & 7])); | |
370 | #endif | |
371 | } | |
372 | ||
373 | static void sun4d_enable_irq(unsigned int irq) | |
374 | { | |
375 | #ifdef CONFIG_SMP | |
376 | int tid = sbus_tid[(irq >> 5) - 1]; | |
377 | unsigned long flags; | |
378 | #endif | |
379 | ||
380 | if (irq < NR_IRQS) return; | |
381 | #ifdef CONFIG_SMP | |
382 | spin_lock_irqsave(&sun4d_imsk_lock, flags); | |
383 | cc_set_imsk_other(tid, cc_get_imsk_other(tid) & ~(1 << sbus_to_pil[(irq >> 2) & 7])); | |
384 | spin_unlock_irqrestore(&sun4d_imsk_lock, flags); | |
385 | #else | |
386 | cc_set_imsk(cc_get_imsk() & ~(1 << sbus_to_pil[(irq >> 2) & 7])); | |
387 | #endif | |
388 | } | |
389 | ||
390 | #ifdef CONFIG_SMP | |
391 | static void sun4d_set_cpu_int(int cpu, int level) | |
392 | { | |
393 | sun4d_send_ipi(cpu, level); | |
394 | } | |
395 | ||
396 | static void sun4d_clear_ipi(int cpu, int level) | |
397 | { | |
398 | } | |
399 | ||
400 | static void sun4d_set_udt(int cpu) | |
401 | { | |
402 | } | |
403 | ||
404 | /* Setup IRQ distribution scheme. */ | |
405 | void __init sun4d_distribute_irqs(void) | |
406 | { | |
407 | #ifdef DISTRIBUTE_IRQS | |
408 | struct sbus_bus *sbus; | |
409 | unsigned long sbus_serving_map; | |
410 | ||
411 | sbus_serving_map = cpu_present_map; | |
412 | for_each_sbus(sbus) { | |
413 | if ((sbus->board * 2) == boot_cpu_id && (cpu_present_map & (1 << (sbus->board * 2 + 1)))) | |
414 | sbus_tid[sbus->board] = (sbus->board * 2 + 1); | |
415 | else if (cpu_present_map & (1 << (sbus->board * 2))) | |
416 | sbus_tid[sbus->board] = (sbus->board * 2); | |
417 | else if (cpu_present_map & (1 << (sbus->board * 2 + 1))) | |
418 | sbus_tid[sbus->board] = (sbus->board * 2 + 1); | |
419 | else | |
420 | sbus_tid[sbus->board] = 0xff; | |
421 | if (sbus_tid[sbus->board] != 0xff) | |
422 | sbus_serving_map &= ~(1 << sbus_tid[sbus->board]); | |
423 | } | |
424 | for_each_sbus(sbus) | |
425 | if (sbus_tid[sbus->board] == 0xff) { | |
426 | int i = 31; | |
427 | ||
428 | if (!sbus_serving_map) | |
429 | sbus_serving_map = cpu_present_map; | |
430 | while (!(sbus_serving_map & (1 << i))) | |
431 | i--; | |
432 | sbus_tid[sbus->board] = i; | |
433 | sbus_serving_map &= ~(1 << i); | |
434 | } | |
435 | for_each_sbus(sbus) { | |
436 | printk("sbus%d IRQs directed to CPU%d\n", sbus->board, sbus_tid[sbus->board]); | |
437 | set_sbi_tid(sbus->devid, sbus_tid[sbus->board] << 3); | |
438 | } | |
439 | #else | |
440 | struct sbus_bus *sbus; | |
441 | int cpuid = cpu_logical_map(1); | |
442 | ||
443 | if (cpuid == -1) | |
444 | cpuid = cpu_logical_map(0); | |
445 | for_each_sbus(sbus) { | |
446 | sbus_tid[sbus->board] = cpuid; | |
447 | set_sbi_tid(sbus->devid, cpuid << 3); | |
448 | } | |
449 | printk("All sbus IRQs directed to CPU%d\n", cpuid); | |
450 | #endif | |
451 | } | |
452 | #endif | |
453 | ||
454 | static void sun4d_clear_clock_irq(void) | |
455 | { | |
456 | volatile unsigned int clear_intr; | |
457 | clear_intr = sun4d_timers->l10_timer_limit; | |
458 | } | |
459 | ||
460 | static void sun4d_clear_profile_irq(int cpu) | |
461 | { | |
462 | bw_get_prof_limit(cpu); | |
463 | } | |
464 | ||
465 | static void sun4d_load_profile_irq(int cpu, unsigned int limit) | |
466 | { | |
467 | bw_set_prof_limit(cpu, limit); | |
468 | } | |
469 | ||
470 | static void __init sun4d_init_timers(irqreturn_t (*counter_fn)(int, void *, struct pt_regs *)) | |
471 | { | |
472 | int irq; | |
473 | int cpu; | |
474 | struct resource r; | |
475 | int mid; | |
476 | ||
477 | /* Map the User Timer registers. */ | |
478 | memset(&r, 0, sizeof(r)); | |
479 | #ifdef CONFIG_SMP | |
480 | r.start = CSR_BASE(boot_cpu_id)+BW_TIMER_LIMIT; | |
481 | #else | |
482 | r.start = CSR_BASE(0)+BW_TIMER_LIMIT; | |
483 | #endif | |
484 | r.flags = 0xf; | |
485 | sun4d_timers = (struct sun4d_timer_regs *) sbus_ioremap(&r, 0, | |
486 | PAGE_SIZE, "user timer"); | |
487 | ||
488 | sun4d_timers->l10_timer_limit = (((1000000/HZ) + 1) << 10); | |
489 | master_l10_counter = &sun4d_timers->l10_cur_count; | |
490 | master_l10_limit = &sun4d_timers->l10_timer_limit; | |
491 | ||
492 | irq = request_irq(TIMER_IRQ, | |
493 | counter_fn, | |
494 | (SA_INTERRUPT | SA_STATIC_ALLOC), | |
495 | "timer", NULL); | |
496 | if (irq) { | |
497 | prom_printf("time_init: unable to attach IRQ%d\n",TIMER_IRQ); | |
498 | prom_halt(); | |
499 | } | |
500 | ||
501 | /* Enable user timer free run for CPU 0 in BW */ | |
502 | /* bw_set_ctrl(0, bw_get_ctrl(0) | BW_CTRL_USER_TIMER); */ | |
503 | ||
504 | cpu = 0; | |
505 | while (!cpu_find_by_instance(cpu, NULL, &mid)) { | |
506 | sun4d_load_profile_irq(mid >> 3, 0); | |
507 | cpu++; | |
508 | } | |
509 | ||
510 | #ifdef CONFIG_SMP | |
511 | { | |
512 | unsigned long flags; | |
513 | extern unsigned long lvl14_save[4]; | |
514 | struct tt_entry *trap_table = &sparc_ttable[SP_TRAP_IRQ1 + (14 - 1)]; | |
515 | extern unsigned int real_irq_entry[], smp4d_ticker[]; | |
516 | extern unsigned int patchme_maybe_smp_msg[]; | |
517 | ||
518 | /* Adjust so that we jump directly to smp4d_ticker */ | |
519 | lvl14_save[2] += smp4d_ticker - real_irq_entry; | |
520 | ||
521 | /* For SMP we use the level 14 ticker, however the bootup code | |
522 | * has copied the firmwares level 14 vector into boot cpu's | |
523 | * trap table, we must fix this now or we get squashed. | |
524 | */ | |
525 | local_irq_save(flags); | |
526 | patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */ | |
527 | trap_table->inst_one = lvl14_save[0]; | |
528 | trap_table->inst_two = lvl14_save[1]; | |
529 | trap_table->inst_three = lvl14_save[2]; | |
530 | trap_table->inst_four = lvl14_save[3]; | |
531 | local_flush_cache_all(); | |
532 | local_irq_restore(flags); | |
533 | } | |
534 | #endif | |
535 | } | |
536 | ||
537 | void __init sun4d_init_sbi_irq(void) | |
538 | { | |
539 | struct sbus_bus *sbus; | |
540 | unsigned mask; | |
541 | ||
542 | nsbi = 0; | |
543 | for_each_sbus(sbus) | |
544 | nsbi++; | |
545 | sbus_actions = (struct sbus_action *)kmalloc (nsbi * 8 * 4 * sizeof(struct sbus_action), GFP_ATOMIC); | |
546 | memset (sbus_actions, 0, (nsbi * 8 * 4 * sizeof(struct sbus_action))); | |
547 | for_each_sbus(sbus) { | |
548 | #ifdef CONFIG_SMP | |
549 | extern unsigned char boot_cpu_id; | |
550 | ||
551 | set_sbi_tid(sbus->devid, boot_cpu_id << 3); | |
552 | sbus_tid[sbus->board] = boot_cpu_id; | |
553 | #endif | |
554 | /* Get rid of pending irqs from PROM */ | |
555 | mask = acquire_sbi(sbus->devid, 0xffffffff); | |
556 | if (mask) { | |
557 | printk ("Clearing pending IRQs %08x on SBI %d\n", mask, sbus->board); | |
558 | release_sbi(sbus->devid, mask); | |
559 | } | |
560 | } | |
561 | } | |
562 | ||
563 | static char *sun4d_irq_itoa(unsigned int irq) | |
564 | { | |
565 | static char buff[16]; | |
566 | ||
567 | if (irq < (1 << 5)) | |
568 | sprintf(buff, "%d", irq); | |
569 | else | |
570 | sprintf(buff, "%d,%x", sbus_to_pil[(irq >> 2) & 7], irq); | |
571 | return buff; | |
572 | } | |
573 | ||
574 | void __init sun4d_init_IRQ(void) | |
575 | { | |
576 | local_irq_disable(); | |
577 | ||
578 | BTFIXUPSET_CALL(sbint_to_irq, sun4d_sbint_to_irq, BTFIXUPCALL_NORM); | |
579 | BTFIXUPSET_CALL(enable_irq, sun4d_enable_irq, BTFIXUPCALL_NORM); | |
580 | BTFIXUPSET_CALL(disable_irq, sun4d_disable_irq, BTFIXUPCALL_NORM); | |
581 | BTFIXUPSET_CALL(clear_clock_irq, sun4d_clear_clock_irq, BTFIXUPCALL_NORM); | |
582 | BTFIXUPSET_CALL(clear_profile_irq, sun4d_clear_profile_irq, BTFIXUPCALL_NORM); | |
583 | BTFIXUPSET_CALL(load_profile_irq, sun4d_load_profile_irq, BTFIXUPCALL_NORM); | |
584 | BTFIXUPSET_CALL(__irq_itoa, sun4d_irq_itoa, BTFIXUPCALL_NORM); | |
585 | sparc_init_timers = sun4d_init_timers; | |
586 | #ifdef CONFIG_SMP | |
587 | BTFIXUPSET_CALL(set_cpu_int, sun4d_set_cpu_int, BTFIXUPCALL_NORM); | |
588 | BTFIXUPSET_CALL(clear_cpu_int, sun4d_clear_ipi, BTFIXUPCALL_NOP); | |
589 | BTFIXUPSET_CALL(set_irq_udt, sun4d_set_udt, BTFIXUPCALL_NOP); | |
590 | #endif | |
591 | /* Cannot enable interrupts until OBP ticker is disabled. */ | |
592 | } |