[mirror_ubuntu-bionic-kernel.git] / arch / sparc / kernel / sun4d_smp.c

/* sun4d_smp.c: Sparc SS1000/SC2000 SMP support.
 *
 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
 *
 * Based on sun4m's smp.c, which is:
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
 */

#include <asm/head.h>

#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/threads.h>
#include <linux/smp.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/profile.h>
#include <linux/delay.h>

#include <asm/ptrace.h>
#include <asm/atomic.h>
#include <asm/irq_regs.h>

#include <asm/irq.h>
#include <asm/page.h>
#include <asm/pgalloc.h>
#include <asm/pgtable.h>
#include <asm/oplib.h>
#include <asm/sbi.h>
#include <asm/tlbflush.h>
#include <asm/cacheflush.h>
#include <asm/cpudata.h>

#include "irq.h"
#define IRQ_CROSS_CALL		15

extern ctxd_t *srmmu_ctx_table_phys;

static volatile int smp_processors_ready = 0;
static int smp_highest_cpu;
extern volatile unsigned long cpu_callin_map[NR_CPUS];
extern cpuinfo_sparc cpu_data[NR_CPUS];
extern unsigned char boot_cpu_id;
extern volatile int smp_process_available;

extern cpumask_t smp_commenced_mask;

extern int __smp4d_processor_id(void);

/* #define SMP_DEBUG */

#ifdef SMP_DEBUG
#define SMP_PRINTK(x)	printk x
#else
#define SMP_PRINTK(x)
#endif

static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
{
	__asm__ __volatile__("swap [%1], %0\n\t" :
			     "=&r" (val), "=&r" (ptr) :
			     "0" (val), "1" (ptr));
	return val;
}

static void smp_setup_percpu_timer(void);
extern void cpu_probe(void);
extern void sun4d_distribute_irqs(void);

static unsigned char cpu_leds[32];

static inline void show_leds(int cpuid)
{
	cpuid &= 0x1e;
	__asm__ __volatile__ ("stba %0, [%1] %2" : :
			      "r" ((cpu_leds[cpuid] << 4) | cpu_leds[cpuid+1]),
			      "r" (ECSR_BASE(cpuid) | BB_LEDS),
			      "i" (ASI_M_CTL));
}

void __init smp4d_callin(void)
{
	int cpuid = hard_smp4d_processor_id();
	extern spinlock_t sun4d_imsk_lock;
	unsigned long flags;
	
	/* Show we are alive */
	cpu_leds[cpuid] = 0x6;
	show_leds(cpuid);

	/* Enable level15 interrupt, disable level14 interrupt for now */
	cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);

	local_flush_cache_all();
	local_flush_tlb_all();

	notify_cpu_starting(cpuid);
	/*
	 * Unblock the master CPU _only_ when the scheduler state
	 * of all secondary CPUs will be up-to-date, so after
	 * the SMP initialization the master will be just allowed
	 * to call the scheduler code.
	 */
	/* Get our local ticker going. */
	smp_setup_percpu_timer();

	calibrate_delay();
	smp_store_cpu_info(cpuid);
	local_flush_cache_all();
	local_flush_tlb_all();

	/* Allow master to continue. */
	swap((unsigned long *)&cpu_callin_map[cpuid], 1);
	local_flush_cache_all();
	local_flush_tlb_all();
	
	cpu_probe();

	while((unsigned long)current_set[cpuid] < PAGE_OFFSET)
		barrier();
		
	while(current_set[cpuid]->cpu != cpuid)
		barrier();
		
	/* Fix idle thread fields. */
	__asm__ __volatile__("ld [%0], %%g6\n\t"
			     : : "r" (&current_set[cpuid])
			     : "memory" /* paranoid */);

	cpu_leds[cpuid] = 0x9;
	show_leds(cpuid);
	
	/* Attach to the address space of init_task. */
	atomic_inc(&init_mm.mm_count);
	current->active_mm = &init_mm;

	local_flush_cache_all();
	local_flush_tlb_all();
	
	local_irq_enable();	/* We don't allow PIL 14 yet */
	
	while (!cpu_isset(cpuid, smp_commenced_mask))
		barrier();

	spin_lock_irqsave(&sun4d_imsk_lock, flags);
	cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
	spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
	cpu_set(cpuid, cpu_online_map);

}

extern void init_IRQ(void);
extern void cpu_panic(void);

/*
 *	Cycle through the processors asking the PROM to start each one.
 */
 
extern struct linux_prom_registers smp_penguin_ctable;
extern unsigned long trapbase_cpu1[];
extern unsigned long trapbase_cpu2[];
extern unsigned long trapbase_cpu3[];

void __init smp4d_boot_cpus(void)
{
	if (boot_cpu_id)
		current_set[0] = NULL;
	smp_setup_percpu_timer();
	local_flush_cache_all();
}

int __cpuinit smp4d_boot_one_cpu(int i)
{
			extern unsigned long sun4d_cpu_startup;
			unsigned long *entry = &sun4d_cpu_startup;
			struct task_struct *p;
			int timeout;
			int cpu_node;

			cpu_find_by_instance(i, &cpu_node,NULL);
			/* Cook up an idler for this guy. */
			p = fork_idle(i);
			current_set[i] = task_thread_info(p);

			/*
			 * Initialize the contexts table
			 * Since the call to prom_startcpu() trashes the structure,
			 * we need to re-initialize it for each cpu
			 */
			smp_penguin_ctable.which_io = 0;
			smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
			smp_penguin_ctable.reg_size = 0;

			/* whirrr, whirrr, whirrrrrrrrr... */
			SMP_PRINTK(("Starting CPU %d at %p \n", i, entry));
			local_flush_cache_all();
			prom_startcpu(cpu_node,
				      &smp_penguin_ctable, 0, (char *)entry);
				      
			SMP_PRINTK(("prom_startcpu returned :)\n"));

			/* wheee... it's going... */
			for(timeout = 0; timeout < 10000; timeout++) {
				if(cpu_callin_map[i])
					break;
				udelay(200);
			}
			
	if (!(cpu_callin_map[i])) {
		printk("Processor %d is stuck.\n", i);
		return -ENODEV;

	}
	local_flush_cache_all();
	return 0;
}

void __init smp4d_smp_done(void)
{
	int i, first;
	int *prev;

	/* setup cpu list for irq rotation */
	first = 0;
	prev = &first;
	for (i = 0; i < NR_CPUS; i++)
		if (cpu_online(i)) {
			*prev = i;
			prev = &cpu_data(i).next;
		}
	*prev = first;
	local_flush_cache_all();

	/* Free unneeded trap tables */
	ClearPageReserved(virt_to_page(trapbase_cpu1));
	init_page_count(virt_to_page(trapbase_cpu1));
	free_page((unsigned long)trapbase_cpu1);
	totalram_pages++;
	num_physpages++;

	ClearPageReserved(virt_to_page(trapbase_cpu2));
	init_page_count(virt_to_page(trapbase_cpu2));
	free_page((unsigned long)trapbase_cpu2);
	totalram_pages++;
	num_physpages++;

	ClearPageReserved(virt_to_page(trapbase_cpu3));
	init_page_count(virt_to_page(trapbase_cpu3));
	free_page((unsigned long)trapbase_cpu3);
	totalram_pages++;
	num_physpages++;

	/* Ok, they are spinning and ready to go. */
	smp_processors_ready = 1;
	sun4d_distribute_irqs();
}

static struct smp_funcall {
	smpfunc_t func;
	unsigned long arg1;
	unsigned long arg2;
	unsigned long arg3;
	unsigned long arg4;
	unsigned long arg5;
	unsigned char processors_in[NR_CPUS];  /* Set when ipi entered. */
	unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */
} ccall_info __attribute__((aligned(8)));

static DEFINE_SPINLOCK(cross_call_lock);

/* Cross calls must be serialized, at least currently. */
static void smp4d_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
			     unsigned long arg2, unsigned long arg3,
			     unsigned long arg4)
{
	if(smp_processors_ready) {
		register int high = smp_highest_cpu;
		unsigned long flags;

		spin_lock_irqsave(&cross_call_lock, flags);

		{
			/* If you make changes here, make sure gcc generates proper code... */
			register smpfunc_t f asm("i0") = func;
			register unsigned long a1 asm("i1") = arg1;
			register unsigned long a2 asm("i2") = arg2;
			register unsigned long a3 asm("i3") = arg3;
			register unsigned long a4 asm("i4") = arg4;
			register unsigned long a5 asm("i5") = 0;

			__asm__ __volatile__(
				"std %0, [%6]\n\t"
				"std %2, [%6 + 8]\n\t"
				"std %4, [%6 + 16]\n\t" : :
				"r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
				"r" (&ccall_info.func));
		}

		/* Init receive/complete mapping, plus fire the IPI's off. */
		{
			register int i;

			cpu_clear(smp_processor_id(), mask);
			cpus_and(mask, cpu_online_map, mask);
			for(i = 0; i <= high; i++) {
				if (cpu_isset(i, mask)) {
					ccall_info.processors_in[i] = 0;
					ccall_info.processors_out[i] = 0;
					sun4d_send_ipi(i, IRQ_CROSS_CALL);
				}
			}
		}

		{
			register int i;

			i = 0;
			do {
				if (!cpu_isset(i, mask))
					continue;
				while(!ccall_info.processors_in[i])
					barrier();
			} while(++i <= high);

			i = 0;
			do {
				if (!cpu_isset(i, mask))
					continue;
				while(!ccall_info.processors_out[i])
					barrier();
			} while(++i <= high);
		}

		spin_unlock_irqrestore(&cross_call_lock, flags);
	}
}

/* Running cross calls. */
void smp4d_cross_call_irq(void)
{
	int i = hard_smp4d_processor_id();

	ccall_info.processors_in[i] = 1;
	ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
			ccall_info.arg4, ccall_info.arg5);
	ccall_info.processors_out[i] = 1;
}

void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
{
	struct pt_regs *old_regs;
	int cpu = hard_smp4d_processor_id();
	static int cpu_tick[NR_CPUS];
	static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };

	old_regs = set_irq_regs(regs);
	bw_get_prof_limit(cpu);	
	bw_clear_intr_mask(0, 1);	/* INTR_TABLE[0] & 1 is Profile IRQ */

	cpu_tick[cpu]++;
	if (!(cpu_tick[cpu] & 15)) {
		if (cpu_tick[cpu] == 0x60)
			cpu_tick[cpu] = 0;
		cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4];
		show_leds(cpu);
	}

	profile_tick(CPU_PROFILING);

	if(!--prof_counter(cpu)) {
		int user = user_mode(regs);

		irq_enter();
		update_process_times(user);
		irq_exit();

		prof_counter(cpu) = prof_multiplier(cpu);
	}
	set_irq_regs(old_regs);
}

extern unsigned int lvl14_resolution;

static void __init smp_setup_percpu_timer(void)
{
	int cpu = hard_smp4d_processor_id();

	prof_counter(cpu) = prof_multiplier(cpu) = 1;
	load_profile_irq(cpu, lvl14_resolution);
}

void __init smp4d_blackbox_id(unsigned *addr)
{
	int rd = *addr & 0x3e000000;
	
	addr[0] = 0xc0800800 | rd;		/* lda [%g0] ASI_M_VIKING_TMP1, reg */
	addr[1] = 0x01000000;    		/* nop */
	addr[2] = 0x01000000;    		/* nop */
}

void __init smp4d_blackbox_current(unsigned *addr)
{
	int rd = *addr & 0x3e000000;
	
	addr[0] = 0xc0800800 | rd;		/* lda [%g0] ASI_M_VIKING_TMP1, reg */
	addr[2] = 0x81282002 | rd | (rd >> 11);	/* sll reg, 2, reg */
	addr[4] = 0x01000000;			/* nop */
}

void __init sun4d_init_smp(void)
{
	int i;
	extern unsigned int t_nmi[], linux_trap_ipi15_sun4d[], linux_trap_ipi15_sun4m[];

	/* Patch ipi15 trap table */
	t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);
	
	/* And set btfixup... */
	BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4d_blackbox_id);
	BTFIXUPSET_BLACKBOX(load_current, smp4d_blackbox_current);
	BTFIXUPSET_CALL(smp_cross_call, smp4d_cross_call, BTFIXUPCALL_NORM);
	BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4d_processor_id, BTFIXUPCALL_NORM);
	
	for (i = 0; i < NR_CPUS; i++) {
		ccall_info.processors_in[i] = 1;
		ccall_info.processors_out[i] = 1;
	}
}
Commit	Line	Data
1da177e4 LT	1	/* sun4d_smp.c: Sparc SS1000/SC2000 SMP support.
	2	*
	3	* Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
	4	*
	5	* Based on sun4m's smp.c, which is:
	6	* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
	7	*/
	8
	9	#include <asm/head.h>
	10
	11	#include <linux/kernel.h>
	12	#include <linux/sched.h>
	13	#include <linux/threads.h>
	14	#include <linux/smp.h>
1da177e4 LT	15	#include <linux/interrupt.h>
	16	#include <linux/kernel_stat.h>
	17	#include <linux/init.h>
	18	#include <linux/spinlock.h>
	19	#include <linux/mm.h>
	20	#include <linux/swap.h>
	21	#include <linux/profile.h>
6c81c32f	22	#include <linux/delay.h>
1da177e4 LT	23
	24	#include <asm/ptrace.h>
	25	#include <asm/atomic.h>
0d84438d	26	#include <asm/irq_regs.h>
1da177e4	27
1da177e4 LT	28	#include <asm/irq.h>
	29	#include <asm/page.h>
	30	#include <asm/pgalloc.h>
	31	#include <asm/pgtable.h>
	32	#include <asm/oplib.h>
1da177e4 LT	33	#include <asm/sbi.h>
	34	#include <asm/tlbflush.h>
	35	#include <asm/cacheflush.h>
	36	#include <asm/cpudata.h>
	37
32231a66	38	#include "irq.h"
1da177e4 LT	39	#define IRQ_CROSS_CALL 15
	40
	41	extern ctxd_t *srmmu_ctx_table_phys;
	42
5fec811e	43	static volatile int smp_processors_ready = 0;
1da177e4 LT	44	static int smp_highest_cpu;
1da177e4 LT	45	extern volatile unsigned long cpu_callin_map[NR_CPUS];
a54123e2	46	extern cpuinfo_sparc cpu_data[NR_CPUS];
1da177e4	47	extern unsigned char boot_cpu_id;
1da177e4	48	extern volatile int smp_process_available;
a54123e2 BB	49
	50	extern cpumask_t smp_commenced_mask;
	51
1da177e4 LT	52	extern int __smp4d_processor_id(void);
	53
	54	/* #define SMP_DEBUG */
	55
	56	#ifdef SMP_DEBUG
	57	#define SMP_PRINTK(x) printk x
	58	#else
	59	#define SMP_PRINTK(x)
	60	#endif
	61
	62	static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
	63	{
	64	__asm__ __volatile__("swap [%1], %0\n\t" :
	65	"=&r" (val), "=&r" (ptr) :
	66	"0" (val), "1" (ptr));
	67	return val;
	68	}
	69
	70	static void smp_setup_percpu_timer(void);
	71	extern void cpu_probe(void);
	72	extern void sun4d_distribute_irqs(void);
	73
7b1af32f DM	74	static unsigned char cpu_leds[32];
	75
	76	static inline void show_leds(int cpuid)
	77	{
	78	cpuid &= 0x1e;
	79	__asm__ __volatile__ ("stba %0, [%1] %2" : :
	80	"r" ((cpu_leds[cpuid] << 4) \| cpu_leds[cpuid+1]),
	81	"r" (ECSR_BASE(cpuid) \| BB_LEDS),
	82	"i" (ASI_M_CTL));
	83	}
	84
1da177e4 LT	85	void __init smp4d_callin(void)
	86	{
	87	int cpuid = hard_smp4d_processor_id();
	88	extern spinlock_t sun4d_imsk_lock;
	89	unsigned long flags;
	90
	91	/* Show we are alive */
	92	cpu_leds[cpuid] = 0x6;
	93	show_leds(cpuid);
	94
	95	/* Enable level15 interrupt, disable level14 interrupt for now */
	96	cc_set_imsk((cc_get_imsk() & ~0x8000) \| 0x4000);
	97
	98	local_flush_cache_all();
	99	local_flush_tlb_all();
	100
e545a614	101	notify_cpu_starting(cpuid);
1da177e4 LT	102	/*
	103	* Unblock the master CPU _only_ when the scheduler state
	104	* of all secondary CPUs will be up-to-date, so after
	105	* the SMP initialization the master will be just allowed
	106	* to call the scheduler code.
	107	*/
	108	/* Get our local ticker going. */
	109	smp_setup_percpu_timer();
	110
	111	calibrate_delay();
	112	smp_store_cpu_info(cpuid);
	113	local_flush_cache_all();
	114	local_flush_tlb_all();
	115
	116	/* Allow master to continue. */
	117	swap((unsigned long *)&cpu_callin_map[cpuid], 1);
	118	local_flush_cache_all();
	119	local_flush_tlb_all();
	120
	121	cpu_probe();
	122
	123	while((unsigned long)current_set[cpuid] < PAGE_OFFSET)
	124	barrier();
	125
	126	while(current_set[cpuid]->cpu != cpuid)
	127	barrier();
	128
	129	/* Fix idle thread fields. */
	130	__asm__ __volatile__("ld [%0], %%g6\n\t"
	131	: : "r" (&current_set[cpuid])
	132	: "memory" /* paranoid */);
	133
	134	cpu_leds[cpuid] = 0x9;
	135	show_leds(cpuid);
	136
	137	/* Attach to the address space of init_task. */
	138	atomic_inc(&init_mm.mm_count);
	139	current->active_mm = &init_mm;
	140
	141	local_flush_cache_all();
	142	local_flush_tlb_all();
	143
	144	local_irq_enable(); /* We don't allow PIL 14 yet */
	145
a54123e2	146	while (!cpu_isset(cpuid, smp_commenced_mask))
1da177e4 LT	147	barrier();
	148
	149	spin_lock_irqsave(&sun4d_imsk_lock, flags);
	150	cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
	151	spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
8b3c848c RB	152	cpu_set(cpuid, cpu_online_map);
8b3c848c RB	153
1da177e4 LT	154	}
	155
	156	extern void init_IRQ(void);
	157	extern void cpu_panic(void);
	158
	159	/*
	160	* Cycle through the processors asking the PROM to start each one.
	161	*/
	162
	163	extern struct linux_prom_registers smp_penguin_ctable;
	164	extern unsigned long trapbase_cpu1[];
	165	extern unsigned long trapbase_cpu2[];
	166	extern unsigned long trapbase_cpu3[];
	167
	168	void __init smp4d_boot_cpus(void)
	169	{
1da177e4 LT	170	if (boot_cpu_id)
1da177e4 LT	171	current_set[0] = NULL;
1da177e4 LT	172	smp_setup_percpu_timer();
1da177e4 LT	173	local_flush_cache_all();
8b3c848c RB	174	}
8b3c848c RB	175
b4cff846	176	int __cpuinit smp4d_boot_one_cpu(int i)
8b3c848c	177	{
1da177e4 LT	178	extern unsigned long sun4d_cpu_startup;
	179	unsigned long *entry = &sun4d_cpu_startup;
	180	struct task_struct *p;
	181	int timeout;
8b3c848c	182	int cpu_node;
1da177e4	183
8b3c848c	184	cpu_find_by_instance(i, &cpu_node,NULL);
1da177e4 LT	185	/* Cook up an idler for this guy. */
1da177e4 LT	186	p = fork_idle(i);
d562ef6a	187	current_set[i] = task_thread_info(p);
1da177e4 LT	188
	189	/*
	190	* Initialize the contexts table
	191	* Since the call to prom_startcpu() trashes the structure,
	192	* we need to re-initialize it for each cpu
	193	*/
	194	smp_penguin_ctable.which_io = 0;
	195	smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
	196	smp_penguin_ctable.reg_size = 0;
	197
	198	/* whirrr, whirrr, whirrrrrrrrr... */
8b3c848c	199	SMP_PRINTK(("Starting CPU %d at %p \n", i, entry));
1da177e4	200	local_flush_cache_all();
8b3c848c	201	prom_startcpu(cpu_node,
1da177e4 LT	202	&smp_penguin_ctable, 0, (char *)entry);
	203
	204	SMP_PRINTK(("prom_startcpu returned :)\n"));
	205
	206	/* wheee... it's going... */
	207	for(timeout = 0; timeout < 10000; timeout++) {
	208	if(cpu_callin_map[i])
	209	break;
	210	udelay(200);
	211	}
	212
8b3c848c RB	213	if (!(cpu_callin_map[i])) {
	214	printk("Processor %d is stuck.\n", i);
	215	return -ENODEV;
	216
1da177e4 LT	217	}
1da177e4 LT	218	local_flush_cache_all();
8b3c848c RB	219	return 0;
	220	}
	221
	222	void __init smp4d_smp_done(void)
	223	{
	224	int i, first;
	225	int *prev;
	226
	227	/* setup cpu list for irq rotation */
	228	first = 0;
	229	prev = &first;
	230	for (i = 0; i < NR_CPUS; i++)
	231	if (cpu_online(i)) {
	232	*prev = i;
	233	prev = &cpu_data(i).next;
1da177e4	234	}
8b3c848c RB	235	*prev = first;
8b3c848c RB	236	local_flush_cache_all();
1da177e4 LT	237
	238	/* Free unneeded trap tables */
	239	ClearPageReserved(virt_to_page(trapbase_cpu1));
7835e98b	240	init_page_count(virt_to_page(trapbase_cpu1));
1da177e4 LT	241	free_page((unsigned long)trapbase_cpu1);
	242	totalram_pages++;
	243	num_physpages++;
	244
	245	ClearPageReserved(virt_to_page(trapbase_cpu2));
7835e98b	246	init_page_count(virt_to_page(trapbase_cpu2));
1da177e4 LT	247	free_page((unsigned long)trapbase_cpu2);
	248	totalram_pages++;
	249	num_physpages++;
	250
	251	ClearPageReserved(virt_to_page(trapbase_cpu3));
7835e98b	252	init_page_count(virt_to_page(trapbase_cpu3));
1da177e4 LT	253	free_page((unsigned long)trapbase_cpu3);
	254	totalram_pages++;
	255	num_physpages++;
	256
	257	/* Ok, they are spinning and ready to go. */
	258	smp_processors_ready = 1;
	259	sun4d_distribute_irqs();
	260	}
	261
	262	static struct smp_funcall {
	263	smpfunc_t func;
	264	unsigned long arg1;
	265	unsigned long arg2;
	266	unsigned long arg3;
	267	unsigned long arg4;
	268	unsigned long arg5;
	269	unsigned char processors_in[NR_CPUS]; /* Set when ipi entered. */
	270	unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */
	271	} ccall_info __attribute__((aligned(8)));
	272
	273	static DEFINE_SPINLOCK(cross_call_lock);
	274
	275	/* Cross calls must be serialized, at least currently. */
66e4f8c0 DM	276	static void smp4d_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
	277	unsigned long arg2, unsigned long arg3,
	278	unsigned long arg4)
1da177e4 LT	279	{
	280	if(smp_processors_ready) {
	281	register int high = smp_highest_cpu;
	282	unsigned long flags;
	283
	284	spin_lock_irqsave(&cross_call_lock, flags);
	285
	286	{
	287	/* If you make changes here, make sure gcc generates proper code... */
	288	register smpfunc_t f asm("i0") = func;
	289	register unsigned long a1 asm("i1") = arg1;
	290	register unsigned long a2 asm("i2") = arg2;
	291	register unsigned long a3 asm("i3") = arg3;
	292	register unsigned long a4 asm("i4") = arg4;
66e4f8c0	293	register unsigned long a5 asm("i5") = 0;
1da177e4 LT	294
	295	__asm__ __volatile__(
	296	"std %0, [%6]\n\t"
	297	"std %2, [%6 + 8]\n\t"
	298	"std %4, [%6 + 16]\n\t" : :
	299	"r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
	300	"r" (&ccall_info.func));
	301	}
	302
	303	/* Init receive/complete mapping, plus fire the IPI's off. */
	304	{
1da177e4 LT	305	register int i;
1da177e4 LT	306
66e4f8c0 DM	307	cpu_clear(smp_processor_id(), mask);
66e4f8c0 DM	308	cpus_and(mask, cpu_online_map, mask);
1da177e4 LT	309	for(i = 0; i <= high; i++) {
	310	if (cpu_isset(i, mask)) {
	311	ccall_info.processors_in[i] = 0;
	312	ccall_info.processors_out[i] = 0;
	313	sun4d_send_ipi(i, IRQ_CROSS_CALL);
	314	}
	315	}
	316	}
	317
	318	{
	319	register int i;
	320
	321	i = 0;
	322	do {
66e4f8c0 DM	323	if (!cpu_isset(i, mask))
66e4f8c0 DM	324	continue;
1da177e4 LT	325	while(!ccall_info.processors_in[i])
	326	barrier();
	327	} while(++i <= high);
	328
	329	i = 0;
	330	do {
66e4f8c0 DM	331	if (!cpu_isset(i, mask))
66e4f8c0 DM	332	continue;
1da177e4 LT	333	while(!ccall_info.processors_out[i])
	334	barrier();
	335	} while(++i <= high);
	336	}
	337
	338	spin_unlock_irqrestore(&cross_call_lock, flags);
	339	}
	340	}
	341
	342	/* Running cross calls. */
	343	void smp4d_cross_call_irq(void)
	344	{
	345	int i = hard_smp4d_processor_id();
	346
	347	ccall_info.processors_in[i] = 1;
	348	ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
	349	ccall_info.arg4, ccall_info.arg5);
	350	ccall_info.processors_out[i] = 1;
	351	}
	352
1da177e4 LT	353	void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
1da177e4 LT	354	{
0d84438d	355	struct pt_regs *old_regs;
1da177e4 LT	356	int cpu = hard_smp4d_processor_id();
	357	static int cpu_tick[NR_CPUS];
	358	static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
	359
0d84438d	360	old_regs = set_irq_regs(regs);
1da177e4 LT	361	bw_get_prof_limit(cpu);
	362	bw_clear_intr_mask(0, 1); /* INTR_TABLE[0] & 1 is Profile IRQ */
	363
	364	cpu_tick[cpu]++;
	365	if (!(cpu_tick[cpu] & 15)) {
	366	if (cpu_tick[cpu] == 0x60)
	367	cpu_tick[cpu] = 0;
	368	cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4];
	369	show_leds(cpu);
	370	}
	371
0d84438d	372	profile_tick(CPU_PROFILING);
1da177e4 LT	373
	374	if(!--prof_counter(cpu)) {
	375	int user = user_mode(regs);
	376
	377	irq_enter();
	378	update_process_times(user);
	379	irq_exit();
	380
	381	prof_counter(cpu) = prof_multiplier(cpu);
	382	}
0d84438d	383	set_irq_regs(old_regs);
1da177e4 LT	384	}
	385
	386	extern unsigned int lvl14_resolution;
	387
	388	static void __init smp_setup_percpu_timer(void)
	389	{
	390	int cpu = hard_smp4d_processor_id();
	391
	392	prof_counter(cpu) = prof_multiplier(cpu) = 1;
	393	load_profile_irq(cpu, lvl14_resolution);
	394	}
	395
	396	void __init smp4d_blackbox_id(unsigned *addr)
	397	{
	398	int rd = *addr & 0x3e000000;
	399
	400	addr[0] = 0xc0800800 \| rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
	401	addr[1] = 0x01000000; /* nop */
	402	addr[2] = 0x01000000; /* nop */
	403	}
	404
	405	void __init smp4d_blackbox_current(unsigned *addr)
	406	{
	407	int rd = *addr & 0x3e000000;
	408
	409	addr[0] = 0xc0800800 \| rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
	410	addr[2] = 0x81282002 \| rd \| (rd >> 11); /* sll reg, 2, reg */
	411	addr[4] = 0x01000000; /* nop */
	412	}
	413
	414	void __init sun4d_init_smp(void)
	415	{
	416	int i;
	417	extern unsigned int t_nmi[], linux_trap_ipi15_sun4d[], linux_trap_ipi15_sun4m[];
	418
	419	/* Patch ipi15 trap table */
	420	t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);
	421
	422	/* And set btfixup... */
	423	BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4d_blackbox_id);
	424	BTFIXUPSET_BLACKBOX(load_current, smp4d_blackbox_current);
	425	BTFIXUPSET_CALL(smp_cross_call, smp4d_cross_call, BTFIXUPCALL_NORM);
1da177e4 LT	426	BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4d_processor_id, BTFIXUPCALL_NORM);
	427
	428	for (i = 0; i < NR_CPUS; i++) {
	429	ccall_info.processors_in[i] = 1;
	430	ccall_info.processors_out[i] = 1;
	431	}
	432	}