[mirror_ubuntu-bionic-kernel.git] / arch / sparc / kernel / sysfs.c

/* sysfs.c: Topology sysfs support code for sparc64.
 *
 * Copyright (C) 2007 David S. Miller <davem@davemloft.net>
 */
#include <linux/sched.h>
#include <linux/device.h>
#include <linux/cpu.h>
#include <linux/smp.h>
#include <linux/percpu.h>
#include <linux/init.h>

#include <asm/cpudata.h>
#include <asm/hypervisor.h>
#include <asm/spitfire.h>

static DEFINE_PER_CPU(struct hv_mmu_statistics, mmu_stats) __attribute__((aligned(64)));

#define SHOW_MMUSTAT_ULONG(NAME) \
static ssize_t show_##NAME(struct device *dev, \
			struct device_attribute *attr, char *buf) \
{ \
	struct hv_mmu_statistics *p = &per_cpu(mmu_stats, dev->id); \
	return sprintf(buf, "%lu\n", p->NAME); \
} \
static DEVICE_ATTR(NAME, 0444, show_##NAME, NULL)

SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_8k_tte);
SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_8k_tte);
SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_64k_tte);
SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_64k_tte);
SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_4mb_tte);
SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_4mb_tte);
SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_256mb_tte);
SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_256mb_tte);
SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_8k_tte);
SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_8k_tte);
SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_64k_tte);
SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_64k_tte);
SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_4mb_tte);
SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_4mb_tte);
SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_256mb_tte);
SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_256mb_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_8k_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_8k_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_64k_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_64k_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_4mb_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_4mb_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_256mb_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_256mb_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_8k_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_8k_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_64k_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_64k_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_4mb_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_4mb_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_256mb_tte);
SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_256mb_tte);

static struct attribute *mmu_stat_attrs[] = {
	&dev_attr_immu_tsb_hits_ctx0_8k_tte.attr,
	&dev_attr_immu_tsb_ticks_ctx0_8k_tte.attr,
	&dev_attr_immu_tsb_hits_ctx0_64k_tte.attr,
	&dev_attr_immu_tsb_ticks_ctx0_64k_tte.attr,
	&dev_attr_immu_tsb_hits_ctx0_4mb_tte.attr,
	&dev_attr_immu_tsb_ticks_ctx0_4mb_tte.attr,
	&dev_attr_immu_tsb_hits_ctx0_256mb_tte.attr,
	&dev_attr_immu_tsb_ticks_ctx0_256mb_tte.attr,
	&dev_attr_immu_tsb_hits_ctxnon0_8k_tte.attr,
	&dev_attr_immu_tsb_ticks_ctxnon0_8k_tte.attr,
	&dev_attr_immu_tsb_hits_ctxnon0_64k_tte.attr,
	&dev_attr_immu_tsb_ticks_ctxnon0_64k_tte.attr,
	&dev_attr_immu_tsb_hits_ctxnon0_4mb_tte.attr,
	&dev_attr_immu_tsb_ticks_ctxnon0_4mb_tte.attr,
	&dev_attr_immu_tsb_hits_ctxnon0_256mb_tte.attr,
	&dev_attr_immu_tsb_ticks_ctxnon0_256mb_tte.attr,
	&dev_attr_dmmu_tsb_hits_ctx0_8k_tte.attr,
	&dev_attr_dmmu_tsb_ticks_ctx0_8k_tte.attr,
	&dev_attr_dmmu_tsb_hits_ctx0_64k_tte.attr,
	&dev_attr_dmmu_tsb_ticks_ctx0_64k_tte.attr,
	&dev_attr_dmmu_tsb_hits_ctx0_4mb_tte.attr,
	&dev_attr_dmmu_tsb_ticks_ctx0_4mb_tte.attr,
	&dev_attr_dmmu_tsb_hits_ctx0_256mb_tte.attr,
	&dev_attr_dmmu_tsb_ticks_ctx0_256mb_tte.attr,
	&dev_attr_dmmu_tsb_hits_ctxnon0_8k_tte.attr,
	&dev_attr_dmmu_tsb_ticks_ctxnon0_8k_tte.attr,
	&dev_attr_dmmu_tsb_hits_ctxnon0_64k_tte.attr,
	&dev_attr_dmmu_tsb_ticks_ctxnon0_64k_tte.attr,
	&dev_attr_dmmu_tsb_hits_ctxnon0_4mb_tte.attr,
	&dev_attr_dmmu_tsb_ticks_ctxnon0_4mb_tte.attr,
	&dev_attr_dmmu_tsb_hits_ctxnon0_256mb_tte.attr,
	&dev_attr_dmmu_tsb_ticks_ctxnon0_256mb_tte.attr,
	NULL,
};

static struct attribute_group mmu_stat_group = {
	.attrs = mmu_stat_attrs,
	.name = "mmu_stats",
};

/* XXX convert to rusty's on_one_cpu */
static unsigned long run_on_cpu(unsigned long cpu,
			        unsigned long (*func)(unsigned long),
				unsigned long arg)
{
	cpumask_t old_affinity;
	unsigned long ret;

	cpumask_copy(&old_affinity, tsk_cpus_allowed(current));
	/* should return -EINVAL to userspace */
	if (set_cpus_allowed_ptr(current, cpumask_of(cpu)))
		return 0;

	ret = func(arg);

	set_cpus_allowed_ptr(current, &old_affinity);

	return ret;
}

static unsigned long read_mmustat_enable(unsigned long junk)
{
	unsigned long ra = 0;

	sun4v_mmustat_info(&ra);

	return ra != 0;
}

static unsigned long write_mmustat_enable(unsigned long val)
{
	unsigned long ra, orig_ra;

	if (val)
		ra = __pa(&per_cpu(mmu_stats, smp_processor_id()));
	else
		ra = 0UL;

	return sun4v_mmustat_conf(ra, &orig_ra);
}

static ssize_t show_mmustat_enable(struct device *s,
				struct device_attribute *attr, char *buf)
{
	unsigned long val = run_on_cpu(s->id, read_mmustat_enable, 0);
	return sprintf(buf, "%lx\n", val);
}

static ssize_t store_mmustat_enable(struct device *s,
			struct device_attribute *attr, const char *buf,
			size_t count)
{
	unsigned long val, err;
	int ret = sscanf(buf, "%lu", &val);

	if (ret != 1)
		return -EINVAL;

	err = run_on_cpu(s->id, write_mmustat_enable, val);
	if (err)
		return -EIO;

	return count;
}

static DEVICE_ATTR(mmustat_enable, 0644, show_mmustat_enable, store_mmustat_enable);

static int mmu_stats_supported;

static int register_mmu_stats(struct device *s)
{
	if (!mmu_stats_supported)
		return 0;
	device_create_file(s, &dev_attr_mmustat_enable);
	return sysfs_create_group(&s->kobj, &mmu_stat_group);
}

#ifdef CONFIG_HOTPLUG_CPU
static void unregister_mmu_stats(struct device *s)
{
	if (!mmu_stats_supported)
		return;
	sysfs_remove_group(&s->kobj, &mmu_stat_group);
	device_remove_file(s, &dev_attr_mmustat_enable);
}
#endif

#define SHOW_CPUDATA_ULONG_NAME(NAME, MEMBER) \
static ssize_t show_##NAME(struct device *dev, \
		struct device_attribute *attr, char *buf) \
{ \
	cpuinfo_sparc *c = &cpu_data(dev->id); \
	return sprintf(buf, "%lu\n", c->MEMBER); \
}

#define SHOW_CPUDATA_UINT_NAME(NAME, MEMBER) \
static ssize_t show_##NAME(struct device *dev, \
		struct device_attribute *attr, char *buf) \
{ \
	cpuinfo_sparc *c = &cpu_data(dev->id); \
	return sprintf(buf, "%u\n", c->MEMBER); \
}

SHOW_CPUDATA_ULONG_NAME(clock_tick, clock_tick);
SHOW_CPUDATA_UINT_NAME(l1_dcache_size, dcache_size);
SHOW_CPUDATA_UINT_NAME(l1_dcache_line_size, dcache_line_size);
SHOW_CPUDATA_UINT_NAME(l1_icache_size, icache_size);
SHOW_CPUDATA_UINT_NAME(l1_icache_line_size, icache_line_size);
SHOW_CPUDATA_UINT_NAME(l2_cache_size, ecache_size);
SHOW_CPUDATA_UINT_NAME(l2_cache_line_size, ecache_line_size);

static struct device_attribute cpu_core_attrs[] = {
	__ATTR(clock_tick,          0444, show_clock_tick, NULL),
	__ATTR(l1_dcache_size,      0444, show_l1_dcache_size, NULL),
	__ATTR(l1_dcache_line_size, 0444, show_l1_dcache_line_size, NULL),
	__ATTR(l1_icache_size,      0444, show_l1_icache_size, NULL),
	__ATTR(l1_icache_line_size, 0444, show_l1_icache_line_size, NULL),
	__ATTR(l2_cache_size,       0444, show_l2_cache_size, NULL),
	__ATTR(l2_cache_line_size,  0444, show_l2_cache_line_size, NULL),
};

static DEFINE_PER_CPU(struct cpu, cpu_devices);

static int register_cpu_online(unsigned int cpu)
{
	struct cpu *c = &per_cpu(cpu_devices, cpu);
	struct device *s = &c->dev;
	int i;

	for (i = 0; i < ARRAY_SIZE(cpu_core_attrs); i++)
		device_create_file(s, &cpu_core_attrs[i]);

	register_mmu_stats(s);
	return 0;
}

static int unregister_cpu_online(unsigned int cpu)
{
#ifdef CONFIG_HOTPLUG_CPU
	struct cpu *c = &per_cpu(cpu_devices, cpu);
	struct device *s = &c->dev;
	int i;

	unregister_mmu_stats(s);
	for (i = 0; i < ARRAY_SIZE(cpu_core_attrs); i++)
		device_remove_file(s, &cpu_core_attrs[i]);
#endif
	return 0;
}

static void __init check_mmu_stats(void)
{
	unsigned long dummy1, err;

	if (tlb_type != hypervisor)
		return;

	err = sun4v_mmustat_info(&dummy1);
	if (!err)
		mmu_stats_supported = 1;
}

static void register_nodes(void)
{
#ifdef CONFIG_NUMA
	int i;

	for (i = 0; i < MAX_NUMNODES; i++)
		register_one_node(i);
#endif
}

static int __init topology_init(void)
{
	int cpu, ret;

	register_nodes();

	check_mmu_stats();

	for_each_possible_cpu(cpu) {
		struct cpu *c = &per_cpu(cpu_devices, cpu);

		register_cpu(c, cpu);
	}

	ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "sparc/topology:online",
				register_cpu_online, unregister_cpu_online);
	WARN_ON(ret < 0);
	return 0;
}

subsys_initcall(topology_init);
Commit	Line	Data
08f80073	1	/* sysfs.c: Topology sysfs support code for sparc64.
eff3414b DM	2	*
	3	* Copyright (C) 2007 David S. Miller <davem@davemloft.net>
	4	*/
8abf9196	5	#include <linux/sched.h>
8a25a2fd	6	#include <linux/device.h>
eff3414b DM	7	#include <linux/cpu.h>
	8	#include <linux/smp.h>
	9	#include <linux/percpu.h>
	10	#include <linux/init.h>
	11
6e6ab2e2	12	#include <asm/cpudata.h>
d887ab3a DM	13	#include <asm/hypervisor.h>
	14	#include <asm/spitfire.h>
	15
	16	static DEFINE_PER_CPU(struct hv_mmu_statistics, mmu_stats) __attribute__((aligned(64)));
eff3414b	17
d887ab3a	18	#define SHOW_MMUSTAT_ULONG(NAME) \
8a25a2fd KS	19	static ssize_t show_##NAME(struct device *dev, \
8a25a2fd KS	20	struct device_attribute attr, char buf) \
d1f253e6	21	{ \
d887ab3a DM	22	struct hv_mmu_statistics *p = &per_cpu(mmu_stats, dev->id); \
	23	return sprintf(buf, "%lu\n", p->NAME); \
	24	} \
8a25a2fd	25	static DEVICE_ATTR(NAME, 0444, show_##NAME, NULL)
d887ab3a DM	26
	27	SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_8k_tte);
	28	SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_8k_tte);
	29	SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_64k_tte);
	30	SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_64k_tte);
	31	SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_4mb_tte);
	32	SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_4mb_tte);
	33	SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_256mb_tte);
	34	SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_256mb_tte);
	35	SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_8k_tte);
	36	SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_8k_tte);
	37	SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_64k_tte);
	38	SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_64k_tte);
	39	SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_4mb_tte);
	40	SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_4mb_tte);
	41	SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_256mb_tte);
	42	SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_256mb_tte);
	43	SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_8k_tte);
	44	SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_8k_tte);
	45	SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_64k_tte);
	46	SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_64k_tte);
	47	SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_4mb_tte);
	48	SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_4mb_tte);
	49	SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_256mb_tte);
	50	SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_256mb_tte);
	51	SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_8k_tte);
	52	SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_8k_tte);
	53	SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_64k_tte);
	54	SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_64k_tte);
	55	SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_4mb_tte);
	56	SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_4mb_tte);
	57	SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_256mb_tte);
	58	SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_256mb_tte);
	59
	60	static struct attribute *mmu_stat_attrs[] = {
8a25a2fd KS	61	&dev_attr_immu_tsb_hits_ctx0_8k_tte.attr,
	62	&dev_attr_immu_tsb_ticks_ctx0_8k_tte.attr,
	63	&dev_attr_immu_tsb_hits_ctx0_64k_tte.attr,
	64	&dev_attr_immu_tsb_ticks_ctx0_64k_tte.attr,
	65	&dev_attr_immu_tsb_hits_ctx0_4mb_tte.attr,
	66	&dev_attr_immu_tsb_ticks_ctx0_4mb_tte.attr,
	67	&dev_attr_immu_tsb_hits_ctx0_256mb_tte.attr,
	68	&dev_attr_immu_tsb_ticks_ctx0_256mb_tte.attr,
	69	&dev_attr_immu_tsb_hits_ctxnon0_8k_tte.attr,
	70	&dev_attr_immu_tsb_ticks_ctxnon0_8k_tte.attr,
	71	&dev_attr_immu_tsb_hits_ctxnon0_64k_tte.attr,
	72	&dev_attr_immu_tsb_ticks_ctxnon0_64k_tte.attr,
	73	&dev_attr_immu_tsb_hits_ctxnon0_4mb_tte.attr,
	74	&dev_attr_immu_tsb_ticks_ctxnon0_4mb_tte.attr,
	75	&dev_attr_immu_tsb_hits_ctxnon0_256mb_tte.attr,
	76	&dev_attr_immu_tsb_ticks_ctxnon0_256mb_tte.attr,
	77	&dev_attr_dmmu_tsb_hits_ctx0_8k_tte.attr,
	78	&dev_attr_dmmu_tsb_ticks_ctx0_8k_tte.attr,
	79	&dev_attr_dmmu_tsb_hits_ctx0_64k_tte.attr,
	80	&dev_attr_dmmu_tsb_ticks_ctx0_64k_tte.attr,
	81	&dev_attr_dmmu_tsb_hits_ctx0_4mb_tte.attr,
	82	&dev_attr_dmmu_tsb_ticks_ctx0_4mb_tte.attr,
	83	&dev_attr_dmmu_tsb_hits_ctx0_256mb_tte.attr,
	84	&dev_attr_dmmu_tsb_ticks_ctx0_256mb_tte.attr,
	85	&dev_attr_dmmu_tsb_hits_ctxnon0_8k_tte.attr,
	86	&dev_attr_dmmu_tsb_ticks_ctxnon0_8k_tte.attr,
	87	&dev_attr_dmmu_tsb_hits_ctxnon0_64k_tte.attr,
	88	&dev_attr_dmmu_tsb_ticks_ctxnon0_64k_tte.attr,
	89	&dev_attr_dmmu_tsb_hits_ctxnon0_4mb_tte.attr,
	90	&dev_attr_dmmu_tsb_ticks_ctxnon0_4mb_tte.attr,
	91	&dev_attr_dmmu_tsb_hits_ctxnon0_256mb_tte.attr,
	92	&dev_attr_dmmu_tsb_ticks_ctxnon0_256mb_tte.attr,
d887ab3a DM	93	NULL,
	94	};
	95
	96	static struct attribute_group mmu_stat_group = {
	97	.attrs = mmu_stat_attrs,
	98	.name = "mmu_stats",
	99	};
	100
	101	/* XXX convert to rusty's on_one_cpu */
	102	static unsigned long run_on_cpu(unsigned long cpu,
	103	unsigned long (*func)(unsigned long),
	104	unsigned long arg)
	105	{
fb1fece5	106	cpumask_t old_affinity;
d887ab3a DM	107	unsigned long ret;
d887ab3a DM	108
fb1fece5	109	cpumask_copy(&old_affinity, tsk_cpus_allowed(current));
d887ab3a	110	/* should return -EINVAL to userspace */
d2566af8	111	if (set_cpus_allowed_ptr(current, cpumask_of(cpu)))
d887ab3a DM	112	return 0;
	113
	114	ret = func(arg);
	115
d2566af8	116	set_cpus_allowed_ptr(current, &old_affinity);
d887ab3a DM	117
	118	return ret;
	119	}
	120
	121	static unsigned long read_mmustat_enable(unsigned long junk)
	122	{
	123	unsigned long ra = 0;
	124
	125	sun4v_mmustat_info(&ra);
	126
	127	return ra != 0;
	128	}
	129
	130	static unsigned long write_mmustat_enable(unsigned long val)
	131	{
	132	unsigned long ra, orig_ra;
	133
	134	if (val)
	135	ra = __pa(&per_cpu(mmu_stats, smp_processor_id()));
	136	else
	137	ra = 0UL;
	138
	139	return sun4v_mmustat_conf(ra, &orig_ra);
	140	}
	141
8a25a2fd KS	142	static ssize_t show_mmustat_enable(struct device *s,
8a25a2fd KS	143	struct device_attribute attr, char buf)
d887ab3a DM	144	{
	145	unsigned long val = run_on_cpu(s->id, read_mmustat_enable, 0);
	146	return sprintf(buf, "%lx\n", val);
	147	}
	148
8a25a2fd KS	149	static ssize_t store_mmustat_enable(struct device *s,
8a25a2fd KS	150	struct device_attribute attr, const char buf,
4a0b2b4d	151	size_t count)
d887ab3a DM	152	{
d887ab3a DM	153	unsigned long val, err;
8ecc1bad	154	int ret = sscanf(buf, "%lu", &val);
d887ab3a DM	155
	156	if (ret != 1)
	157	return -EINVAL;
	158
	159	err = run_on_cpu(s->id, write_mmustat_enable, val);
	160	if (err)
	161	return -EIO;
	162
	163	return count;
	164	}
	165
8a25a2fd	166	static DEVICE_ATTR(mmustat_enable, 0644, show_mmustat_enable, store_mmustat_enable);
d887ab3a DM	167
	168	static int mmu_stats_supported;
	169
8a25a2fd	170	static int register_mmu_stats(struct device *s)
d887ab3a DM	171	{
	172	if (!mmu_stats_supported)
	173	return 0;
8a25a2fd	174	device_create_file(s, &dev_attr_mmustat_enable);
d887ab3a DM	175	return sysfs_create_group(&s->kobj, &mmu_stat_group);
	176	}
	177
	178	#ifdef CONFIG_HOTPLUG_CPU
8a25a2fd	179	static void unregister_mmu_stats(struct device *s)
d887ab3a DM	180	{
	181	if (!mmu_stats_supported)
	182	return;
	183	sysfs_remove_group(&s->kobj, &mmu_stat_group);
8a25a2fd	184	device_remove_file(s, &dev_attr_mmustat_enable);
d887ab3a DM	185	}
	186	#endif
	187
	188	#define SHOW_CPUDATA_ULONG_NAME(NAME, MEMBER) \
8a25a2fd KS	189	static ssize_t show_##NAME(struct device *dev, \
8a25a2fd KS	190	struct device_attribute attr, char buf) \
d887ab3a DM	191	{ \
d887ab3a DM	192	cpuinfo_sparc *c = &cpu_data(dev->id); \
d1f253e6 DM	193	return sprintf(buf, "%lu\n", c->MEMBER); \
	194	}
	195
d887ab3a	196	#define SHOW_CPUDATA_UINT_NAME(NAME, MEMBER) \
8a25a2fd KS	197	static ssize_t show_##NAME(struct device *dev, \
8a25a2fd KS	198	struct device_attribute attr, char buf) \
d1f253e6	199	{ \
d887ab3a	200	cpuinfo_sparc *c = &cpu_data(dev->id); \
d1f253e6 DM	201	return sprintf(buf, "%u\n", c->MEMBER); \
	202	}
	203
d887ab3a	204	SHOW_CPUDATA_ULONG_NAME(clock_tick, clock_tick);
d887ab3a DM	205	SHOW_CPUDATA_UINT_NAME(l1_dcache_size, dcache_size);
	206	SHOW_CPUDATA_UINT_NAME(l1_dcache_line_size, dcache_line_size);
	207	SHOW_CPUDATA_UINT_NAME(l1_icache_size, icache_size);
	208	SHOW_CPUDATA_UINT_NAME(l1_icache_line_size, icache_line_size);
	209	SHOW_CPUDATA_UINT_NAME(l2_cache_size, ecache_size);
	210	SHOW_CPUDATA_UINT_NAME(l2_cache_line_size, ecache_line_size);
d1f253e6	211
8a25a2fd KS	212	static struct device_attribute cpu_core_attrs[] = {
	213	__ATTR(clock_tick, 0444, show_clock_tick, NULL),
	214	__ATTR(l1_dcache_size, 0444, show_l1_dcache_size, NULL),
	215	__ATTR(l1_dcache_line_size, 0444, show_l1_dcache_line_size, NULL),
	216	__ATTR(l1_icache_size, 0444, show_l1_icache_size, NULL),
	217	__ATTR(l1_icache_line_size, 0444, show_l1_icache_line_size, NULL),
	218	__ATTR(l2_cache_size, 0444, show_l2_cache_size, NULL),
	219	__ATTR(l2_cache_line_size, 0444, show_l2_cache_line_size, NULL),
d1f253e6 DM	220	};
d1f253e6 DM	221
d887ab3a DM	222	static DEFINE_PER_CPU(struct cpu, cpu_devices);
d887ab3a DM	223
e5355cd6	224	static int register_cpu_online(unsigned int cpu)
d1f253e6 DM	225	{
d1f253e6 DM	226	struct cpu *c = &per_cpu(cpu_devices, cpu);
8a25a2fd	227	struct device *s = &c->dev;
d1f253e6 DM	228	int i;
	229
	230	for (i = 0; i < ARRAY_SIZE(cpu_core_attrs); i++)
8a25a2fd	231	device_create_file(s, &cpu_core_attrs[i]);
d887ab3a DM	232
d887ab3a DM	233	register_mmu_stats(s);
e5355cd6	234	return 0;
d1f253e6 DM	235	}
d1f253e6 DM	236
e5355cd6	237	static int unregister_cpu_online(unsigned int cpu)
d1f253e6	238	{
e5355cd6	239	#ifdef CONFIG_HOTPLUG_CPU
d1f253e6	240	struct cpu *c = &per_cpu(cpu_devices, cpu);
8a25a2fd	241	struct device *s = &c->dev;
d1f253e6 DM	242	int i;
d1f253e6 DM	243
d887ab3a	244	unregister_mmu_stats(s);
d1f253e6	245	for (i = 0; i < ARRAY_SIZE(cpu_core_attrs); i++)
8a25a2fd	246	device_remove_file(s, &cpu_core_attrs[i]);
d1f253e6	247	#endif
e5355cd6	248	return 0;
d1f253e6 DM	249	}
d1f253e6 DM	250
d887ab3a DM	251	static void __init check_mmu_stats(void)
	252	{
	253	unsigned long dummy1, err;
	254
	255	if (tlb_type != hypervisor)
	256	return;
	257
	258	err = sun4v_mmustat_info(&dummy1);
	259	if (!err)
	260	mmu_stats_supported = 1;
	261	}
	262
919ee677 DM	263	static void register_nodes(void)
	264	{
	265	#ifdef CONFIG_NUMA
	266	int i;
	267
	268	for (i = 0; i < MAX_NUMNODES; i++)
	269	register_one_node(i);
	270	#endif
	271	}
	272
eff3414b DM	273	static int __init topology_init(void)
eff3414b DM	274	{
e5355cd6	275	int cpu, ret;
eff3414b	276
919ee677 DM	277	register_nodes();
919ee677 DM	278
d887ab3a DM	279	check_mmu_stats();
d887ab3a DM	280
eff3414b DM	281	for_each_possible_cpu(cpu) {
	282	struct cpu *c = &per_cpu(cpu_devices, cpu);
	283
	284	register_cpu(c, cpu);
	285	}
	286
e5355cd6 SAS	287	ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "sparc/topology:online",
	288	register_cpu_online, unregister_cpu_online);
	289	WARN_ON(ret < 0);
eff3414b DM	290	return 0;
	291	}
	292
	293	subsys_initcall(topology_init);