]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - arch/sparc/kernel/time.c
[SPARC64]: __inline__ --> inline
[mirror_ubuntu-artful-kernel.git] / arch / sparc / kernel / time.c
CommitLineData
1da177e4
LT
1/* $Id: time.c,v 1.60 2002/01/23 14:33:55 davem Exp $
2 * linux/arch/sparc/kernel/time.c
3 *
4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
6 *
7 * Chris Davis (cdavis@cois.on.ca) 03/27/1998
8 * Added support for the intersil on the sun4/4200
9 *
10 * Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998
11 * Support for MicroSPARC-IIep, PCI CPU.
12 *
13 * This file handles the Sparc specific time handling details.
14 *
15 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
16 * "A Kernel Model for Precision Timekeeping" by Dave Mills
17 */
1da177e4
LT
18#include <linux/errno.h>
19#include <linux/module.h>
20#include <linux/sched.h>
21#include <linux/kernel.h>
22#include <linux/param.h>
23#include <linux/string.h>
24#include <linux/mm.h>
25#include <linux/interrupt.h>
26#include <linux/time.h>
27#include <linux/timex.h>
28#include <linux/init.h>
29#include <linux/pci.h>
30#include <linux/ioport.h>
31#include <linux/profile.h>
32
33#include <asm/oplib.h>
1da177e4
LT
34#include <asm/timer.h>
35#include <asm/mostek.h>
36#include <asm/system.h>
37#include <asm/irq.h>
38#include <asm/io.h>
39#include <asm/idprom.h>
40#include <asm/machines.h>
41#include <asm/sun4paddr.h>
42#include <asm/page.h>
43#include <asm/pcic.h>
ee5caf0e 44#include <asm/of_device.h>
0d84438d 45#include <asm/irq_regs.h>
1da177e4 46
32231a66
AV
47#include "irq.h"
48
1da177e4
LT
49DEFINE_SPINLOCK(rtc_lock);
50enum sparc_clock_type sp_clock_typ;
51DEFINE_SPINLOCK(mostek_lock);
52void __iomem *mstk48t02_regs = NULL;
c316ef04 53static struct mostek48t08 __iomem *mstk48t08_regs = NULL;
1da177e4
LT
54static int set_rtc_mmss(unsigned long);
55static int sbus_do_settimeofday(struct timespec *tv);
56
57#ifdef CONFIG_SUN4
58struct intersil *intersil_clock;
59#define intersil_cmd(intersil_reg, intsil_cmd) intersil_reg->int_cmd_reg = \
60 (intsil_cmd)
61
62#define intersil_intr(intersil_reg, intsil_cmd) intersil_reg->int_intr_reg = \
63 (intsil_cmd)
64
65#define intersil_start(intersil_reg) intersil_cmd(intersil_reg, \
66 ( INTERSIL_START | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
67 INTERSIL_INTR_ENABLE))
68
69#define intersil_stop(intersil_reg) intersil_cmd(intersil_reg, \
70 ( INTERSIL_STOP | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
71 INTERSIL_INTR_ENABLE))
72
73#define intersil_read_intr(intersil_reg, towhere) towhere = \
74 intersil_reg->int_intr_reg
75
76#endif
77
78unsigned long profile_pc(struct pt_regs *regs)
79{
80 extern char __copy_user_begin[], __copy_user_end[];
81 extern char __atomic_begin[], __atomic_end[];
82 extern char __bzero_begin[], __bzero_end[];
1da177e4
LT
83
84 unsigned long pc = regs->pc;
85
86 if (in_lock_functions(pc) ||
87 (pc >= (unsigned long) __copy_user_begin &&
88 pc < (unsigned long) __copy_user_end) ||
89 (pc >= (unsigned long) __atomic_begin &&
90 pc < (unsigned long) __atomic_end) ||
91 (pc >= (unsigned long) __bzero_begin &&
8a8b836b 92 pc < (unsigned long) __bzero_end))
1da177e4
LT
93 pc = regs->u_regs[UREG_RETPC];
94 return pc;
95}
96
9550e59c
MH
97EXPORT_SYMBOL(profile_pc);
98
1da177e4
LT
99__volatile__ unsigned int *master_l10_counter;
100__volatile__ unsigned int *master_l10_limit;
101
102/*
103 * timer_interrupt() needs to keep up the real-time clock,
104 * as well as call the "do_timer()" routine every clocktick
105 */
106
107#define TICK_SIZE (tick_nsec / 1000)
108
0d84438d 109irqreturn_t timer_interrupt(int irq, void *dev_id)
1da177e4
LT
110{
111 /* last time the cmos clock got updated */
112 static long last_rtc_update;
113
114#ifndef CONFIG_SMP
0d84438d 115 profile_tick(CPU_PROFILING);
1da177e4
LT
116#endif
117
118 /* Protect counter clear so that do_gettimeoffset works */
119 write_seqlock(&xtime_lock);
120#ifdef CONFIG_SUN4
121 if((idprom->id_machtype == (SM_SUN4 | SM_4_260)) ||
122 (idprom->id_machtype == (SM_SUN4 | SM_4_110))) {
123 int temp;
124 intersil_read_intr(intersil_clock, temp);
125 /* re-enable the irq */
126 enable_pil_irq(10);
127 }
128#endif
129 clear_clock_irq();
130
3171a030 131 do_timer(1);
1da177e4 132#ifndef CONFIG_SMP
0d84438d 133 update_process_times(user_mode(get_irq_regs()));
1da177e4
LT
134#endif
135
136
137 /* Determine when to update the Mostek clock. */
b149ee22 138 if (ntp_synced() &&
1da177e4
LT
139 xtime.tv_sec > last_rtc_update + 660 &&
140 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
141 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
142 if (set_rtc_mmss(xtime.tv_sec) == 0)
143 last_rtc_update = xtime.tv_sec;
144 else
145 last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
146 }
147 write_sequnlock(&xtime_lock);
148
149 return IRQ_HANDLED;
150}
151
152/* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
42e28264 153static void __devinit kick_start_clock(void)
1da177e4
LT
154{
155 struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
156 unsigned char sec;
157 int i, count;
158
159 prom_printf("CLOCK: Clock was stopped. Kick start ");
160
161 spin_lock_irq(&mostek_lock);
162
163 /* Turn on the kick start bit to start the oscillator. */
164 regs->creg |= MSTK_CREG_WRITE;
165 regs->sec &= ~MSTK_STOP;
166 regs->hour |= MSTK_KICK_START;
167 regs->creg &= ~MSTK_CREG_WRITE;
168
169 spin_unlock_irq(&mostek_lock);
170
171 /* Delay to allow the clock oscillator to start. */
172 sec = MSTK_REG_SEC(regs);
173 for (i = 0; i < 3; i++) {
174 while (sec == MSTK_REG_SEC(regs))
175 for (count = 0; count < 100000; count++)
176 /* nothing */ ;
177 prom_printf(".");
178 sec = regs->sec;
179 }
180 prom_printf("\n");
181
182 spin_lock_irq(&mostek_lock);
183
184 /* Turn off kick start and set a "valid" time and date. */
185 regs->creg |= MSTK_CREG_WRITE;
186 regs->hour &= ~MSTK_KICK_START;
187 MSTK_SET_REG_SEC(regs,0);
188 MSTK_SET_REG_MIN(regs,0);
189 MSTK_SET_REG_HOUR(regs,0);
190 MSTK_SET_REG_DOW(regs,5);
191 MSTK_SET_REG_DOM(regs,1);
192 MSTK_SET_REG_MONTH(regs,8);
193 MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
194 regs->creg &= ~MSTK_CREG_WRITE;
195
196 spin_unlock_irq(&mostek_lock);
197
198 /* Ensure the kick start bit is off. If it isn't, turn it off. */
199 while (regs->hour & MSTK_KICK_START) {
200 prom_printf("CLOCK: Kick start still on!\n");
201
202 spin_lock_irq(&mostek_lock);
203 regs->creg |= MSTK_CREG_WRITE;
204 regs->hour &= ~MSTK_KICK_START;
205 regs->creg &= ~MSTK_CREG_WRITE;
206 spin_unlock_irq(&mostek_lock);
207 }
208
209 prom_printf("CLOCK: Kick start procedure successful.\n");
210}
211
212/* Return nonzero if the clock chip battery is low. */
213static __inline__ int has_low_battery(void)
214{
215 struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
216 unsigned char data1, data2;
217
218 spin_lock_irq(&mostek_lock);
219 data1 = regs->eeprom[0]; /* Read some data. */
220 regs->eeprom[0] = ~data1; /* Write back the complement. */
221 data2 = regs->eeprom[0]; /* Read back the complement. */
222 regs->eeprom[0] = data1; /* Restore the original value. */
223 spin_unlock_irq(&mostek_lock);
224
225 return (data1 == data2); /* Was the write blocked? */
226}
227
42e28264 228static void __devinit mostek_set_system_time(void)
96ba989d
BB
229{
230 unsigned int year, mon, day, hour, min, sec;
231 struct mostek48t02 *mregs;
232
233 mregs = (struct mostek48t02 *)mstk48t02_regs;
234 if(!mregs) {
235 prom_printf("Something wrong, clock regs not mapped yet.\n");
236 prom_halt();
237 }
238 spin_lock_irq(&mostek_lock);
239 mregs->creg |= MSTK_CREG_READ;
240 sec = MSTK_REG_SEC(mregs);
241 min = MSTK_REG_MIN(mregs);
242 hour = MSTK_REG_HOUR(mregs);
243 day = MSTK_REG_DOM(mregs);
244 mon = MSTK_REG_MONTH(mregs);
245 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
246 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
247 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
248 set_normalized_timespec(&wall_to_monotonic,
249 -xtime.tv_sec, -xtime.tv_nsec);
250 mregs->creg &= ~MSTK_CREG_READ;
251 spin_unlock_irq(&mostek_lock);
252}
253
1da177e4
LT
254/* Probe for the real time clock chip on Sun4 */
255static __inline__ void sun4_clock_probe(void)
256{
257#ifdef CONFIG_SUN4
258 int temp;
259 struct resource r;
260
261 memset(&r, 0, sizeof(r));
262 if( idprom->id_machtype == (SM_SUN4 | SM_4_330) ) {
263 sp_clock_typ = MSTK48T02;
264 r.start = sun4_clock_physaddr;
265 mstk48t02_regs = sbus_ioremap(&r, 0,
266 sizeof(struct mostek48t02), NULL);
267 mstk48t08_regs = NULL; /* To catch weirdness */
268 intersil_clock = NULL; /* just in case */
269
270 /* Kick start the clock if it is completely stopped. */
271 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
272 kick_start_clock();
273 } else if( idprom->id_machtype == (SM_SUN4 | SM_4_260)) {
274 /* intersil setup code */
275 printk("Clock: INTERSIL at %8x ",sun4_clock_physaddr);
276 sp_clock_typ = INTERSIL;
277 r.start = sun4_clock_physaddr;
278 intersil_clock = (struct intersil *)
279 sbus_ioremap(&r, 0, sizeof(*intersil_clock), "intersil");
280 mstk48t02_regs = 0; /* just be sure */
281 mstk48t08_regs = NULL; /* ditto */
282 /* initialise the clock */
283
284 intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
285
286 intersil_start(intersil_clock);
287
288 intersil_read_intr(intersil_clock, temp);
289 while (!(temp & 0x80))
290 intersil_read_intr(intersil_clock, temp);
291
292 intersil_read_intr(intersil_clock, temp);
293 while (!(temp & 0x80))
294 intersil_read_intr(intersil_clock, temp);
295
296 intersil_stop(intersil_clock);
297
298 }
299#endif
300}
301
96ba989d 302#ifndef CONFIG_SUN4
ee5caf0e 303static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
1da177e4 304{
ee5caf0e 305 struct device_node *dp = op->node;
8271f042 306 const char *model = of_get_property(dp, "model", NULL);
1da177e4 307
ee5caf0e
DM
308 if (!model)
309 return -ENODEV;
1da177e4 310
ee5caf0e 311 if (!strcmp(model, "mk48t02")) {
1da177e4 312 sp_clock_typ = MSTK48T02;
ee5caf0e 313
1da177e4 314 /* Map the clock register io area read-only */
ee5caf0e
DM
315 mstk48t02_regs = of_ioremap(&op->resource[0], 0,
316 sizeof(struct mostek48t02),
317 "mk48t02");
1da177e4 318 mstk48t08_regs = NULL; /* To catch weirdness */
ee5caf0e 319 } else if (!strcmp(model, "mk48t08")) {
1da177e4 320 sp_clock_typ = MSTK48T08;
ee5caf0e
DM
321 mstk48t08_regs = of_ioremap(&op->resource[0], 0,
322 sizeof(struct mostek48t08),
323 "mk48t08");
1da177e4
LT
324
325 mstk48t02_regs = &mstk48t08_regs->regs;
ee5caf0e
DM
326 } else
327 return -ENODEV;
1da177e4
LT
328
329 /* Report a low battery voltage condition. */
330 if (has_low_battery())
331 printk(KERN_CRIT "NVRAM: Low battery voltage!\n");
332
333 /* Kick start the clock if it is completely stopped. */
334 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
335 kick_start_clock();
ee5caf0e 336
96ba989d
BB
337 mostek_set_system_time();
338
ee5caf0e
DM
339 return 0;
340}
341
342static struct of_device_id clock_match[] = {
343 {
344 .name = "eeprom",
345 },
346 {},
347};
348
349static struct of_platform_driver clock_driver = {
ee5caf0e
DM
350 .match_table = clock_match,
351 .probe = clock_probe,
a2cd1558
SR
352 .driver = {
353 .name = "clock",
354 },
ee5caf0e
DM
355};
356
357
358/* Probe for the mostek real time clock chip. */
96ba989d 359static int __init clock_init(void)
ee5caf0e 360{
37b7754a 361 return of_register_driver(&clock_driver, &of_platform_bus_type);
1da177e4
LT
362}
363
96ba989d
BB
364/* Must be after subsys_initcall() so that busses are probed. Must
365 * be before device_initcall() because things like the RTC driver
366 * need to see the clock registers.
367 */
368fs_initcall(clock_init);
369#endif /* !CONFIG_SUN4 */
370
1da177e4
LT
371void __init sbus_time_init(void)
372{
1da177e4
LT
373
374 BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM);
375 btfixup();
376
377 if (ARCH_SUN4)
378 sun4_clock_probe();
1da177e4
LT
379
380 sparc_init_timers(timer_interrupt);
381
382#ifdef CONFIG_SUN4
383 if(idprom->id_machtype == (SM_SUN4 | SM_4_330)) {
96ba989d 384 mostek_set_system_time();
1da177e4
LT
385 } else if(idprom->id_machtype == (SM_SUN4 | SM_4_260) ) {
386 /* initialise the intersil on sun4 */
96ba989d
BB
387 unsigned int year, mon, day, hour, min, sec;
388 int temp;
389 struct intersil *iregs;
1da177e4
LT
390
391 iregs=intersil_clock;
392 if(!iregs) {
393 prom_printf("Something wrong, clock regs not mapped yet.\n");
394 prom_halt();
395 }
396
397 intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
398 disable_pil_irq(10);
399 intersil_stop(iregs);
400 intersil_read_intr(intersil_clock, temp);
401
402 temp = iregs->clk.int_csec;
403
404 sec = iregs->clk.int_sec;
405 min = iregs->clk.int_min;
406 hour = iregs->clk.int_hour;
407 day = iregs->clk.int_day;
408 mon = iregs->clk.int_month;
409 year = MSTK_CVT_YEAR(iregs->clk.int_year);
410
411 enable_pil_irq(10);
412 intersil_start(iregs);
413
414 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
415 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
416 set_normalized_timespec(&wall_to_monotonic,
417 -xtime.tv_sec, -xtime.tv_nsec);
418 printk("%u/%u/%u %u:%u:%u\n",day,mon,year,hour,min,sec);
419 }
420#endif
421
422 /* Now that OBP ticker has been silenced, it is safe to enable IRQ. */
423 local_irq_enable();
424}
425
426void __init time_init(void)
427{
428#ifdef CONFIG_PCI
429 extern void pci_time_init(void);
430 if (pcic_present()) {
431 pci_time_init();
432 return;
433 }
434#endif
435 sbus_time_init();
436}
437
3115624e 438static inline unsigned long do_gettimeoffset(void)
1da177e4
LT
439{
440 return (*master_l10_counter >> 10) & 0x1fffff;
441}
442
1da177e4
LT
443/* Ok, my cute asm atomicity trick doesn't work anymore.
444 * There are just too many variables that need to be protected
8ef38609 445 * now (both members of xtime, et al.)
1da177e4
LT
446 */
447void do_gettimeofday(struct timeval *tv)
448{
449 unsigned long flags;
450 unsigned long seq;
451 unsigned long usec, sec;
452 unsigned long max_ntp_tick = tick_usec - tickadj;
453
454 do {
1da177e4
LT
455 seq = read_seqbegin_irqsave(&xtime_lock, flags);
456 usec = do_gettimeoffset();
1da177e4
LT
457
458 /*
459 * If time_adjust is negative then NTP is slowing the clock
460 * so make sure not to go into next possible interval.
461 * Better to lose some accuracy than have time go backwards..
462 */
8ef38609 463 if (unlikely(time_adjust < 0))
1da177e4
LT
464 usec = min(usec, max_ntp_tick);
465
1da177e4
LT
466 sec = xtime.tv_sec;
467 usec += (xtime.tv_nsec / 1000);
468 } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
469
470 while (usec >= 1000000) {
471 usec -= 1000000;
472 sec++;
473 }
474
475 tv->tv_sec = sec;
476 tv->tv_usec = usec;
477}
478
479EXPORT_SYMBOL(do_gettimeofday);
480
481int do_settimeofday(struct timespec *tv)
482{
483 int ret;
484
485 write_seqlock_irq(&xtime_lock);
486 ret = bus_do_settimeofday(tv);
487 write_sequnlock_irq(&xtime_lock);
488 clock_was_set();
489 return ret;
490}
491
492EXPORT_SYMBOL(do_settimeofday);
493
494static int sbus_do_settimeofday(struct timespec *tv)
495{
496 time_t wtm_sec, sec = tv->tv_sec;
497 long wtm_nsec, nsec = tv->tv_nsec;
498
499 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
500 return -EINVAL;
501
502 /*
503 * This is revolting. We need to set "xtime" correctly. However, the
504 * value in this location is the value at the most recent update of
505 * wall time. Discover what correction gettimeofday() would have
506 * made, and then undo it!
507 */
8ef38609 508 nsec -= 1000 * do_gettimeoffset();
1da177e4
LT
509
510 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
511 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
512
513 set_normalized_timespec(&xtime, sec, nsec);
514 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
515
b149ee22 516 ntp_clear();
1da177e4
LT
517 return 0;
518}
519
520/*
521 * BUG: This routine does not handle hour overflow properly; it just
522 * sets the minutes. Usually you won't notice until after reboot!
523 */
524static int set_rtc_mmss(unsigned long nowtime)
525{
526 int real_seconds, real_minutes, mostek_minutes;
527 struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
528 unsigned long flags;
529#ifdef CONFIG_SUN4
530 struct intersil *iregs = intersil_clock;
531 int temp;
532#endif
533
534 /* Not having a register set can lead to trouble. */
535 if (!regs) {
536#ifdef CONFIG_SUN4
537 if(!iregs)
538 return -1;
539 else {
540 temp = iregs->clk.int_csec;
541
542 mostek_minutes = iregs->clk.int_min;
543
544 real_seconds = nowtime % 60;
545 real_minutes = nowtime / 60;
546 if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
547 real_minutes += 30; /* correct for half hour time zone */
548 real_minutes %= 60;
549
550 if (abs(real_minutes - mostek_minutes) < 30) {
551 intersil_stop(iregs);
552 iregs->clk.int_sec=real_seconds;
553 iregs->clk.int_min=real_minutes;
554 intersil_start(iregs);
555 } else {
556 printk(KERN_WARNING
557 "set_rtc_mmss: can't update from %d to %d\n",
558 mostek_minutes, real_minutes);
559 return -1;
560 }
561
562 return 0;
563 }
564#endif
565 }
566
567 spin_lock_irqsave(&mostek_lock, flags);
568 /* Read the current RTC minutes. */
569 regs->creg |= MSTK_CREG_READ;
570 mostek_minutes = MSTK_REG_MIN(regs);
571 regs->creg &= ~MSTK_CREG_READ;
572
573 /*
574 * since we're only adjusting minutes and seconds,
575 * don't interfere with hour overflow. This avoids
576 * messing with unknown time zones but requires your
577 * RTC not to be off by more than 15 minutes
578 */
579 real_seconds = nowtime % 60;
580 real_minutes = nowtime / 60;
581 if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
582 real_minutes += 30; /* correct for half hour time zone */
583 real_minutes %= 60;
584
585 if (abs(real_minutes - mostek_minutes) < 30) {
586 regs->creg |= MSTK_CREG_WRITE;
587 MSTK_SET_REG_SEC(regs,real_seconds);
588 MSTK_SET_REG_MIN(regs,real_minutes);
589 regs->creg &= ~MSTK_CREG_WRITE;
590 spin_unlock_irqrestore(&mostek_lock, flags);
591 return 0;
592 } else {
593 spin_unlock_irqrestore(&mostek_lock, flags);
594 return -1;
595 }
596}