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Commit | Line | Data |
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1b1fbbca | 1 | /* ld script for sparc32/sparc64 kernel */ |
1da177e4 LT |
2 | |
3 | #include <asm-generic/vmlinux.lds.h> | |
b74e34db | 4 | |
bcbe40eb | 5 | #include <asm/page.h> |
b74e34db | 6 | #include <asm/thread_info.h> |
1da177e4 | 7 | |
1b1fbbca SR |
8 | #ifdef CONFIG_SPARC32 |
9 | #define INITIAL_ADDRESS 0x10000 + SIZEOF_HEADERS | |
10 | #define TEXTSTART 0xf0004000 | |
11 | ||
12 | #define SMP_CACHE_BYTES_SHIFT 5 | |
13 | ||
14 | #else | |
15 | #define SMP_CACHE_BYTES_SHIFT 6 | |
16 | #define INITIAL_ADDRESS 0x4000 | |
17 | #define TEXTSTART 0x0000000000404000 | |
18 | ||
19 | #endif | |
20 | ||
21 | #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) | |
22 | ||
23 | #ifdef CONFIG_SPARC32 | |
1da177e4 LT |
24 | OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") |
25 | OUTPUT_ARCH(sparc) | |
26 | ENTRY(_start) | |
27 | jiffies = jiffies_64 + 4; | |
1b1fbbca SR |
28 | #else |
29 | /* sparc64 */ | |
30 | OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc") | |
31 | OUTPUT_ARCH(sparc:v9a) | |
32 | ENTRY(_start) | |
33 | jiffies = jiffies_64; | |
34 | #endif | |
35 | ||
49fa5230 DM |
36 | #ifdef CONFIG_SPARC64 |
37 | ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large") | |
38 | #endif | |
39 | ||
1da177e4 LT |
40 | SECTIONS |
41 | { | |
d195b71b DM |
42 | #ifdef CONFIG_SPARC64 |
43 | swapper_pg_dir = 0x0000000000402000; | |
44 | #endif | |
1b1fbbca SR |
45 | . = INITIAL_ADDRESS; |
46 | .text TEXTSTART : | |
bcbe40eb SR |
47 | { |
48 | _text = .; | |
ce8a7424 | 49 | HEAD_TEXT |
bcbe40eb SR |
50 | TEXT_TEXT |
51 | SCHED_TEXT | |
6727ad9e | 52 | CPUIDLE_TEXT |
bcbe40eb | 53 | LOCK_TEXT |
1b1fbbca | 54 | KPROBES_TEXT |
9960e9e8 | 55 | IRQENTRY_TEXT |
be7635e7 | 56 | SOFTIRQENTRY_TEXT |
bcbe40eb SR |
57 | *(.gnu.warning) |
58 | } = 0 | |
59 | _etext = .; | |
1b1fbbca SR |
60 | |
61 | RO_DATA(PAGE_SIZE) | |
8b8d8e28 DM |
62 | |
63 | /* Start of data section */ | |
64 | _sdata = .; | |
65 | ||
bcbe40eb SR |
66 | .data1 : { |
67 | *(.data1) | |
68 | } | |
3240a77b GT |
69 | RW_DATA_SECTION(SMP_CACHE_BYTES, 0, THREAD_SIZE) |
70 | ||
b74e34db | 71 | /* End of data section */ |
bcbe40eb | 72 | _edata = .; |
b74e34db | 73 | |
bcbe40eb SR |
74 | .fixup : { |
75 | __start___fixup = .; | |
76 | *(.fixup) | |
77 | __stop___fixup = .; | |
78 | } | |
3240a77b | 79 | EXCEPTION_TABLE(16) |
bcbe40eb SR |
80 | NOTES |
81 | ||
82 | . = ALIGN(PAGE_SIZE); | |
3240a77b GT |
83 | __init_begin = ALIGN(PAGE_SIZE); |
84 | INIT_TEXT_SECTION(PAGE_SIZE) | |
bcbe40eb | 85 | __init_text_end = .; |
3240a77b | 86 | INIT_DATA_SECTION(16) |
67d38229 | 87 | |
1b1fbbca SR |
88 | . = ALIGN(4); |
89 | .tsb_ldquad_phys_patch : { | |
90 | __tsb_ldquad_phys_patch = .; | |
91 | *(.tsb_ldquad_phys_patch) | |
92 | __tsb_ldquad_phys_patch_end = .; | |
93 | } | |
94 | ||
95 | .tsb_phys_patch : { | |
96 | __tsb_phys_patch = .; | |
97 | *(.tsb_phys_patch) | |
98 | __tsb_phys_patch_end = .; | |
99 | } | |
100 | ||
101 | .cpuid_patch : { | |
102 | __cpuid_patch = .; | |
103 | *(.cpuid_patch) | |
104 | __cpuid_patch_end = .; | |
105 | } | |
106 | ||
107 | .sun4v_1insn_patch : { | |
108 | __sun4v_1insn_patch = .; | |
109 | *(.sun4v_1insn_patch) | |
110 | __sun4v_1insn_patch_end = .; | |
111 | } | |
112 | .sun4v_2insn_patch : { | |
113 | __sun4v_2insn_patch = .; | |
114 | *(.sun4v_2insn_patch) | |
115 | __sun4v_2insn_patch_end = .; | |
116 | } | |
5b8b93c4 SR |
117 | .leon_1insn_patch : { |
118 | __leon_1insn_patch = .; | |
119 | *(.leon_1insn_patch) | |
120 | __leon_1insn_patch_end = .; | |
121 | } | |
9076d0e7 DM |
122 | .swapper_tsb_phys_patch : { |
123 | __swapper_tsb_phys_patch = .; | |
124 | *(.swapper_tsb_phys_patch) | |
125 | __swapper_tsb_phys_patch_end = .; | |
126 | } | |
127 | .swapper_4m_tsb_phys_patch : { | |
128 | __swapper_4m_tsb_phys_patch = .; | |
129 | *(.swapper_4m_tsb_phys_patch) | |
130 | __swapper_4m_tsb_phys_patch_end = .; | |
131 | } | |
ef7c4d46 DM |
132 | .popc_3insn_patch : { |
133 | __popc_3insn_patch = .; | |
134 | *(.popc_3insn_patch) | |
135 | __popc_3insn_patch_end = .; | |
136 | } | |
56d205cc DM |
137 | .popc_6insn_patch : { |
138 | __popc_6insn_patch = .; | |
139 | *(.popc_6insn_patch) | |
140 | __popc_6insn_patch_end = .; | |
141 | } | |
187818cd DM |
142 | .pause_3insn_patch : { |
143 | __pause_3insn_patch = .; | |
144 | *(.pause_3insn_patch) | |
145 | __pause_3insn_patch_end = .; | |
e9b9eb59 | 146 | } |
494e5b6f KA |
147 | .sun_m7_2insn_patch : { |
148 | __sun_m7_2insn_patch = .; | |
149 | *(.sun_m7_2insn_patch) | |
150 | __sun_m7_2insn_patch_end = .; | |
151 | } | |
4929c83a PT |
152 | .get_tick_patch : { |
153 | __get_tick_patch = .; | |
154 | *(.get_tick_patch) | |
155 | __get_tick_patch_end = .; | |
156 | } | |
df7b2155 NG |
157 | .pud_huge_patch : { |
158 | __pud_huge_patch = .; | |
159 | *(.pud_huge_patch) | |
160 | __pud_huge_patch_end = .; | |
161 | } | |
a7159a87 AY |
162 | .fast_win_ctrl_1insn_patch : { |
163 | __fast_win_ctrl_1insn_patch = .; | |
164 | *(.fast_win_ctrl_1insn_patch) | |
165 | __fast_win_ctrl_1insn_patch_end = .; | |
166 | } | |
0415b00d | 167 | PERCPU_SECTION(SMP_CACHE_BYTES) |
1b1fbbca | 168 | |
10d7227b JB |
169 | #ifdef CONFIG_JUMP_LABEL |
170 | . = ALIGN(PAGE_SIZE); | |
171 | .exit.text : { | |
172 | EXIT_TEXT | |
173 | } | |
174 | #endif | |
175 | ||
bcbe40eb SR |
176 | . = ALIGN(PAGE_SIZE); |
177 | __init_end = .; | |
3240a77b | 178 | BSS_SECTION(0, 0, 0) |
bcbe40eb | 179 | _end = . ; |
1b1fbbca | 180 | |
bcbe40eb SR |
181 | STABS_DEBUG |
182 | DWARF_DEBUG | |
023bf6f1 TH |
183 | |
184 | DISCARDS | |
1da177e4 | 185 | } |