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b2441318 1// SPDX-License-Identifier: GPL-2.0
74bf4312
DM
2/* arch/sparc64/mm/tsb.c
3 *
a3cf5e6b 4 * Copyright (C) 2006, 2008 David S. Miller <davem@davemloft.net>
74bf4312
DM
5 */
6
7#include <linux/kernel.h>
a3cf5e6b 8#include <linux/preempt.h>
5a0e3ad6 9#include <linux/slab.h>
589ee628
IM
10#include <linux/mm_types.h>
11
74bf4312 12#include <asm/page.h>
98c5584c 13#include <asm/pgtable.h>
f36391d2 14#include <asm/mmu_context.h>
8c7260c0 15#include <asm/setup.h>
bd40791e 16#include <asm/tsb.h>
f36391d2 17#include <asm/tlb.h>
9b4006dc 18#include <asm/oplib.h>
74bf4312 19
74bf4312
DM
20extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES];
21
dcc1e8dd 22static inline unsigned long tsb_hash(unsigned long vaddr, unsigned long hash_shift, unsigned long nentries)
74bf4312 23{
dcc1e8dd 24 vaddr >>= hash_shift;
98c5584c 25 return vaddr & (nentries - 1);
74bf4312
DM
26}
27
8b234274 28static inline int tag_compare(unsigned long tag, unsigned long vaddr)
74bf4312 29{
8b234274 30 return (tag == (vaddr >> 22));
74bf4312
DM
31}
32
849c4987
DM
33static void flush_tsb_kernel_range_scan(unsigned long start, unsigned long end)
34{
35 unsigned long idx;
36
37 for (idx = 0; idx < KERNEL_TSB_NENTRIES; idx++) {
38 struct tsb *ent = &swapper_tsb[idx];
39 unsigned long match = idx << 13;
40
41 match |= (ent->tag << 22);
42 if (match >= start && match < end)
43 ent->tag = (1UL << TSB_TAG_INVALID_BIT);
44 }
45}
46
74bf4312
DM
47/* TSB flushes need only occur on the processor initiating the address
48 * space modification, not on each cpu the address space has run on.
49 * Only the TLB flush needs that treatment.
50 */
51
52void flush_tsb_kernel_range(unsigned long start, unsigned long end)
53{
54 unsigned long v;
55
849c4987
DM
56 if ((end - start) >> PAGE_SHIFT >= 2 * KERNEL_TSB_NENTRIES)
57 return flush_tsb_kernel_range_scan(start, end);
58
74bf4312 59 for (v = start; v < end; v += PAGE_SIZE) {
dcc1e8dd
DM
60 unsigned long hash = tsb_hash(v, PAGE_SHIFT,
61 KERNEL_TSB_NENTRIES);
98c5584c 62 struct tsb *ent = &swapper_tsb[hash];
74bf4312 63
293666b7 64 if (tag_compare(ent->tag, v))
8b234274 65 ent->tag = (1UL << TSB_TAG_INVALID_BIT);
74bf4312
DM
66 }
67}
68
f36391d2
DM
69static void __flush_tsb_one_entry(unsigned long tsb, unsigned long v,
70 unsigned long hash_shift,
71 unsigned long nentries)
74bf4312 72{
f36391d2 73 unsigned long tag, ent, hash;
7a1ac526 74
f36391d2
DM
75 v &= ~0x1UL;
76 hash = tsb_hash(v, hash_shift, nentries);
77 ent = tsb + (hash * sizeof(struct tsb));
78 tag = (v >> 22UL);
74bf4312 79
f36391d2
DM
80 tsb_flush(ent, tag);
81}
74bf4312 82
f36391d2
DM
83static void __flush_tsb_one(struct tlb_batch *tb, unsigned long hash_shift,
84 unsigned long tsb, unsigned long nentries)
85{
86 unsigned long i;
517af332 87
f36391d2
DM
88 for (i = 0; i < tb->tlb_nr; i++)
89 __flush_tsb_one_entry(tsb, tb->vaddrs[i], hash_shift, nentries);
dcc1e8dd
DM
90}
91
c7d9f77d
NG
92#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
93static void __flush_huge_tsb_one_entry(unsigned long tsb, unsigned long v,
94 unsigned long hash_shift,
95 unsigned long nentries,
96 unsigned int hugepage_shift)
97{
98 unsigned int hpage_entries;
99 unsigned int i;
100
101 hpage_entries = 1 << (hugepage_shift - hash_shift);
102 for (i = 0; i < hpage_entries; i++)
103 __flush_tsb_one_entry(tsb, v + (i << hash_shift), hash_shift,
104 nentries);
105}
106
107static void __flush_huge_tsb_one(struct tlb_batch *tb, unsigned long hash_shift,
108 unsigned long tsb, unsigned long nentries,
109 unsigned int hugepage_shift)
110{
111 unsigned long i;
112
113 for (i = 0; i < tb->tlb_nr; i++)
114 __flush_huge_tsb_one_entry(tsb, tb->vaddrs[i], hash_shift,
115 nentries, hugepage_shift);
116}
117#endif
118
90f08e39 119void flush_tsb_user(struct tlb_batch *tb)
dcc1e8dd 120{
90f08e39 121 struct mm_struct *mm = tb->mm;
dcc1e8dd
DM
122 unsigned long nentries, base, flags;
123
124 spin_lock_irqsave(&mm->context.lock, flags);
7a1ac526 125
76811263 126 if (tb->hugepage_shift < REAL_HPAGE_SHIFT) {
24e49ee3
NG
127 base = (unsigned long) mm->context.tsb_block[MM_TSB_BASE].tsb;
128 nentries = mm->context.tsb_block[MM_TSB_BASE].tsb_nentries;
129 if (tlb_type == cheetah_plus || tlb_type == hypervisor)
130 base = __pa(base);
ac65e282
NG
131 if (tb->hugepage_shift == PAGE_SHIFT)
132 __flush_tsb_one(tb, PAGE_SHIFT, base, nentries);
133#if defined(CONFIG_HUGETLB_PAGE)
134 else
135 __flush_huge_tsb_one(tb, PAGE_SHIFT, base, nentries,
136 tb->hugepage_shift);
137#endif
24e49ee3 138 }
9e695d2e 139#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
c7d9f77d 140 else if (mm->context.tsb_block[MM_TSB_HUGE].tsb) {
dcc1e8dd
DM
141 base = (unsigned long) mm->context.tsb_block[MM_TSB_HUGE].tsb;
142 nentries = mm->context.tsb_block[MM_TSB_HUGE].tsb_nentries;
143 if (tlb_type == cheetah_plus || tlb_type == hypervisor)
144 base = __pa(base);
c7d9f77d
NG
145 __flush_huge_tsb_one(tb, REAL_HPAGE_SHIFT, base, nentries,
146 tb->hugepage_shift);
dcc1e8dd
DM
147 }
148#endif
7a1ac526 149 spin_unlock_irqrestore(&mm->context.lock, flags);
74bf4312 150}
09f94287 151
c7d9f77d
NG
152void flush_tsb_user_page(struct mm_struct *mm, unsigned long vaddr,
153 unsigned int hugepage_shift)
f36391d2
DM
154{
155 unsigned long nentries, base, flags;
156
157 spin_lock_irqsave(&mm->context.lock, flags);
158
76811263 159 if (hugepage_shift < REAL_HPAGE_SHIFT) {
24e49ee3
NG
160 base = (unsigned long) mm->context.tsb_block[MM_TSB_BASE].tsb;
161 nentries = mm->context.tsb_block[MM_TSB_BASE].tsb_nentries;
162 if (tlb_type == cheetah_plus || tlb_type == hypervisor)
163 base = __pa(base);
ac65e282
NG
164 if (hugepage_shift == PAGE_SHIFT)
165 __flush_tsb_one_entry(base, vaddr, PAGE_SHIFT,
166 nentries);
167#if defined(CONFIG_HUGETLB_PAGE)
168 else
169 __flush_huge_tsb_one_entry(base, vaddr, PAGE_SHIFT,
170 nentries, hugepage_shift);
171#endif
24e49ee3 172 }
f36391d2 173#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
c7d9f77d 174 else if (mm->context.tsb_block[MM_TSB_HUGE].tsb) {
f36391d2
DM
175 base = (unsigned long) mm->context.tsb_block[MM_TSB_HUGE].tsb;
176 nentries = mm->context.tsb_block[MM_TSB_HUGE].tsb_nentries;
177 if (tlb_type == cheetah_plus || tlb_type == hypervisor)
178 base = __pa(base);
c7d9f77d
NG
179 __flush_huge_tsb_one_entry(base, vaddr, REAL_HPAGE_SHIFT,
180 nentries, hugepage_shift);
f36391d2
DM
181 }
182#endif
183 spin_unlock_irqrestore(&mm->context.lock, flags);
184}
185
dcc1e8dd
DM
186#define HV_PGSZ_IDX_BASE HV_PGSZ_IDX_8K
187#define HV_PGSZ_MASK_BASE HV_PGSZ_MASK_8K
dcc1e8dd 188
9e695d2e 189#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
dcc1e8dd
DM
190#define HV_PGSZ_IDX_HUGE HV_PGSZ_IDX_4MB
191#define HV_PGSZ_MASK_HUGE HV_PGSZ_MASK_4MB
dcc1e8dd
DM
192#endif
193
194static void setup_tsb_params(struct mm_struct *mm, unsigned long tsb_idx, unsigned long tsb_bytes)
98c5584c
DM
195{
196 unsigned long tsb_reg, base, tsb_paddr;
197 unsigned long page_sz, tte;
198
dcc1e8dd
DM
199 mm->context.tsb_block[tsb_idx].tsb_nentries =
200 tsb_bytes / sizeof(struct tsb);
98c5584c 201
b18eb2d7
DM
202 switch (tsb_idx) {
203 case MM_TSB_BASE:
204 base = TSBMAP_8K_BASE;
205 break;
206#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
207 case MM_TSB_HUGE:
208 base = TSBMAP_4M_BASE;
209 break;
210#endif
211 default:
212 BUG();
213 }
214
c4bce90e 215 tte = pgprot_val(PAGE_KERNEL_LOCKED);
dcc1e8dd 216 tsb_paddr = __pa(mm->context.tsb_block[tsb_idx].tsb);
517af332 217 BUG_ON(tsb_paddr & (tsb_bytes - 1UL));
98c5584c
DM
218
219 /* Use the smallest page size that can map the whole TSB
220 * in one TLB entry.
221 */
222 switch (tsb_bytes) {
223 case 8192 << 0:
224 tsb_reg = 0x0UL;
225#ifdef DCACHE_ALIASING_POSSIBLE
226 base += (tsb_paddr & 8192);
227#endif
98c5584c
DM
228 page_sz = 8192;
229 break;
230
231 case 8192 << 1:
232 tsb_reg = 0x1UL;
98c5584c
DM
233 page_sz = 64 * 1024;
234 break;
235
236 case 8192 << 2:
237 tsb_reg = 0x2UL;
98c5584c
DM
238 page_sz = 64 * 1024;
239 break;
240
241 case 8192 << 3:
242 tsb_reg = 0x3UL;
98c5584c
DM
243 page_sz = 64 * 1024;
244 break;
245
246 case 8192 << 4:
247 tsb_reg = 0x4UL;
98c5584c
DM
248 page_sz = 512 * 1024;
249 break;
250
251 case 8192 << 5:
252 tsb_reg = 0x5UL;
98c5584c
DM
253 page_sz = 512 * 1024;
254 break;
255
256 case 8192 << 6:
257 tsb_reg = 0x6UL;
98c5584c
DM
258 page_sz = 512 * 1024;
259 break;
260
261 case 8192 << 7:
262 tsb_reg = 0x7UL;
98c5584c
DM
263 page_sz = 4 * 1024 * 1024;
264 break;
bd40791e
DM
265
266 default:
7e5766fa
DM
267 printk(KERN_ERR "TSB[%s:%d]: Impossible TSB size %lu, killing process.\n",
268 current->comm, current->pid, tsb_bytes);
269 do_exit(SIGSEGV);
6cb79b3f 270 }
c4bce90e 271 tte |= pte_sz_bits(page_sz);
98c5584c 272
618e9ed9 273 if (tlb_type == cheetah_plus || tlb_type == hypervisor) {
517af332
DM
274 /* Physical mapping, no locked TLB entry for TSB. */
275 tsb_reg |= tsb_paddr;
276
dcc1e8dd
DM
277 mm->context.tsb_block[tsb_idx].tsb_reg_val = tsb_reg;
278 mm->context.tsb_block[tsb_idx].tsb_map_vaddr = 0;
279 mm->context.tsb_block[tsb_idx].tsb_map_pte = 0;
517af332
DM
280 } else {
281 tsb_reg |= base;
282 tsb_reg |= (tsb_paddr & (page_sz - 1UL));
283 tte |= (tsb_paddr & ~(page_sz - 1UL));
284
dcc1e8dd
DM
285 mm->context.tsb_block[tsb_idx].tsb_reg_val = tsb_reg;
286 mm->context.tsb_block[tsb_idx].tsb_map_vaddr = base;
287 mm->context.tsb_block[tsb_idx].tsb_map_pte = tte;
517af332 288 }
98c5584c 289
618e9ed9
DM
290 /* Setup the Hypervisor TSB descriptor. */
291 if (tlb_type == hypervisor) {
dcc1e8dd 292 struct hv_tsb_descr *hp = &mm->context.tsb_descr[tsb_idx];
618e9ed9 293
dcc1e8dd
DM
294 switch (tsb_idx) {
295 case MM_TSB_BASE:
296 hp->pgsz_idx = HV_PGSZ_IDX_BASE;
618e9ed9 297 break;
9e695d2e 298#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
dcc1e8dd
DM
299 case MM_TSB_HUGE:
300 hp->pgsz_idx = HV_PGSZ_IDX_HUGE;
618e9ed9 301 break;
dcc1e8dd
DM
302#endif
303 default:
304 BUG();
6cb79b3f 305 }
618e9ed9
DM
306 hp->assoc = 1;
307 hp->num_ttes = tsb_bytes / 16;
308 hp->ctx_idx = 0;
dcc1e8dd
DM
309 switch (tsb_idx) {
310 case MM_TSB_BASE:
311 hp->pgsz_mask = HV_PGSZ_MASK_BASE;
618e9ed9 312 break;
9e695d2e 313#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
dcc1e8dd
DM
314 case MM_TSB_HUGE:
315 hp->pgsz_mask = HV_PGSZ_MASK_HUGE;
618e9ed9 316 break;
dcc1e8dd
DM
317#endif
318 default:
319 BUG();
6cb79b3f 320 }
618e9ed9
DM
321 hp->tsb_base = tsb_paddr;
322 hp->resv = 0;
323 }
98c5584c
DM
324}
325
4dedbf8d
DM
326struct kmem_cache *pgtable_cache __read_mostly;
327
e18b890b 328static struct kmem_cache *tsb_caches[8] __read_mostly;
9b4006dc
DM
329
330static const char *tsb_cache_names[8] = {
331 "tsb_8KB",
332 "tsb_16KB",
333 "tsb_32KB",
334 "tsb_64KB",
335 "tsb_128KB",
336 "tsb_256KB",
337 "tsb_512KB",
338 "tsb_1MB",
339};
340
3a2cba99 341void __init pgtable_cache_init(void)
9b4006dc
DM
342{
343 unsigned long i;
344
4dedbf8d
DM
345 pgtable_cache = kmem_cache_create("pgtable_cache",
346 PAGE_SIZE, PAGE_SIZE,
347 0,
348 _clear_page);
349 if (!pgtable_cache) {
350 prom_printf("pgtable_cache_init(): Could not create!\n");
351 prom_halt();
352 }
353
151b628f 354 for (i = 0; i < ARRAY_SIZE(tsb_cache_names); i++) {
9b4006dc
DM
355 unsigned long size = 8192 << i;
356 const char *name = tsb_cache_names[i];
357
358 tsb_caches[i] = kmem_cache_create(name,
359 size, size,
20c2df83 360 0, NULL);
9b4006dc
DM
361 if (!tsb_caches[i]) {
362 prom_printf("Could not create %s cache\n", name);
363 prom_halt();
364 }
365 }
366}
367
0871420f
DM
368int sysctl_tsb_ratio = -2;
369
370static unsigned long tsb_size_to_rss_limit(unsigned long new_size)
371{
372 unsigned long num_ents = (new_size / sizeof(struct tsb));
373
374 if (sysctl_tsb_ratio < 0)
375 return num_ents - (num_ents >> -sysctl_tsb_ratio);
376 else
377 return num_ents + (num_ents >> sysctl_tsb_ratio);
378}
379
dcc1e8dd
DM
380/* When the RSS of an address space exceeds tsb_rss_limit for a TSB,
381 * do_sparc64_fault() invokes this routine to try and grow it.
7a1ac526 382 *
bd40791e 383 * When we reach the maximum TSB size supported, we stick ~0UL into
dcc1e8dd 384 * tsb_rss_limit for that TSB so the grow checks in do_sparc64_fault()
bd40791e
DM
385 * will not trigger any longer.
386 *
387 * The TSB can be anywhere from 8K to 1MB in size, in increasing powers
388 * of two. The TSB must be aligned to it's size, so f.e. a 512K TSB
b52439c2
DM
389 * must be 512K aligned. It also must be physically contiguous, so we
390 * cannot use vmalloc().
bd40791e
DM
391 *
392 * The idea here is to grow the TSB when the RSS of the process approaches
393 * the number of entries that the current TSB can hold at once. Currently,
394 * we trigger when the RSS hits 3/4 of the TSB capacity.
395 */
dcc1e8dd 396void tsb_grow(struct mm_struct *mm, unsigned long tsb_index, unsigned long rss)
bd40791e
DM
397{
398 unsigned long max_tsb_size = 1 * 1024 * 1024;
9b4006dc 399 unsigned long new_size, old_size, flags;
7a1ac526 400 struct tsb *old_tsb, *new_tsb;
9b4006dc
DM
401 unsigned long new_cache_index, old_cache_index;
402 unsigned long new_rss_limit;
b52439c2 403 gfp_t gfp_flags;
bd40791e
DM
404
405 if (max_tsb_size > (PAGE_SIZE << MAX_ORDER))
406 max_tsb_size = (PAGE_SIZE << MAX_ORDER);
407
9b4006dc
DM
408 new_cache_index = 0;
409 for (new_size = 8192; new_size < max_tsb_size; new_size <<= 1UL) {
0871420f
DM
410 new_rss_limit = tsb_size_to_rss_limit(new_size);
411 if (new_rss_limit > rss)
bd40791e 412 break;
9b4006dc 413 new_cache_index++;
bd40791e
DM
414 }
415
9b4006dc 416 if (new_size == max_tsb_size)
b52439c2 417 new_rss_limit = ~0UL;
b52439c2 418
9b4006dc 419retry_tsb_alloc:
b52439c2 420 gfp_flags = GFP_KERNEL;
9b4006dc 421 if (new_size > (PAGE_SIZE * 2))
a55ee1ff 422 gfp_flags |= __GFP_NOWARN | __GFP_NORETRY;
b52439c2 423
1f261ef5
DM
424 new_tsb = kmem_cache_alloc_node(tsb_caches[new_cache_index],
425 gfp_flags, numa_node_id());
9b4006dc 426 if (unlikely(!new_tsb)) {
b52439c2
DM
427 /* Not being able to fork due to a high-order TSB
428 * allocation failure is very bad behavior. Just back
429 * down to a 0-order allocation and force no TSB
430 * growing for this address space.
431 */
dcc1e8dd
DM
432 if (mm->context.tsb_block[tsb_index].tsb == NULL &&
433 new_cache_index > 0) {
9b4006dc
DM
434 new_cache_index = 0;
435 new_size = 8192;
b52439c2 436 new_rss_limit = ~0UL;
9b4006dc 437 goto retry_tsb_alloc;
b52439c2
DM
438 }
439
440 /* If we failed on a TSB grow, we are under serious
441 * memory pressure so don't try to grow any more.
442 */
dcc1e8dd
DM
443 if (mm->context.tsb_block[tsb_index].tsb != NULL)
444 mm->context.tsb_block[tsb_index].tsb_rss_limit = ~0UL;
bd40791e 445 return;
b52439c2 446 }
bd40791e 447
8b234274 448 /* Mark all tags as invalid. */
bb8646d8 449 tsb_init(new_tsb, new_size);
7a1ac526
DM
450
451 /* Ok, we are about to commit the changes. If we are
452 * growing an existing TSB the locking is very tricky,
453 * so WATCH OUT!
454 *
455 * We have to hold mm->context.lock while committing to the
456 * new TSB, this synchronizes us with processors in
457 * flush_tsb_user() and switch_mm() for this address space.
458 *
459 * But even with that lock held, processors run asynchronously
460 * accessing the old TSB via TLB miss handling. This is OK
461 * because those actions are just propagating state from the
462 * Linux page tables into the TSB, page table mappings are not
463 * being changed. If a real fault occurs, the processor will
464 * synchronize with us when it hits flush_tsb_user(), this is
465 * also true for the case where vmscan is modifying the page
466 * tables. The only thing we need to be careful with is to
467 * skip any locked TSB entries during copy_tsb().
468 *
469 * When we finish committing to the new TSB, we have to drop
470 * the lock and ask all other cpus running this address space
471 * to run tsb_context_switch() to see the new TSB table.
472 */
473 spin_lock_irqsave(&mm->context.lock, flags);
474
dcc1e8dd
DM
475 old_tsb = mm->context.tsb_block[tsb_index].tsb;
476 old_cache_index =
477 (mm->context.tsb_block[tsb_index].tsb_reg_val & 0x7UL);
478 old_size = (mm->context.tsb_block[tsb_index].tsb_nentries *
479 sizeof(struct tsb));
7a1ac526 480
9b4006dc 481
7a1ac526
DM
482 /* Handle multiple threads trying to grow the TSB at the same time.
483 * One will get in here first, and bump the size and the RSS limit.
484 * The others will get in here next and hit this check.
485 */
dcc1e8dd
DM
486 if (unlikely(old_tsb &&
487 (rss < mm->context.tsb_block[tsb_index].tsb_rss_limit))) {
7a1ac526
DM
488 spin_unlock_irqrestore(&mm->context.lock, flags);
489
9b4006dc 490 kmem_cache_free(tsb_caches[new_cache_index], new_tsb);
7a1ac526
DM
491 return;
492 }
8b234274 493
dcc1e8dd 494 mm->context.tsb_block[tsb_index].tsb_rss_limit = new_rss_limit;
bd40791e 495
7a1ac526
DM
496 if (old_tsb) {
497 extern void copy_tsb(unsigned long old_tsb_base,
498 unsigned long old_tsb_size,
499 unsigned long new_tsb_base,
654f4807
MK
500 unsigned long new_tsb_size,
501 unsigned long page_size_shift);
7a1ac526
DM
502 unsigned long old_tsb_base = (unsigned long) old_tsb;
503 unsigned long new_tsb_base = (unsigned long) new_tsb;
504
505 if (tlb_type == cheetah_plus || tlb_type == hypervisor) {
506 old_tsb_base = __pa(old_tsb_base);
507 new_tsb_base = __pa(new_tsb_base);
508 }
654f4807
MK
509 copy_tsb(old_tsb_base, old_size, new_tsb_base, new_size,
510 tsb_index == MM_TSB_BASE ?
511 PAGE_SHIFT : REAL_HPAGE_SHIFT);
7a1ac526 512 }
bd40791e 513
dcc1e8dd
DM
514 mm->context.tsb_block[tsb_index].tsb = new_tsb;
515 setup_tsb_params(mm, tsb_index, new_size);
bd40791e 516
7a1ac526
DM
517 spin_unlock_irqrestore(&mm->context.lock, flags);
518
bd40791e
DM
519 /* If old_tsb is NULL, we're being invoked for the first time
520 * from init_new_context().
521 */
522 if (old_tsb) {
7a1ac526 523 /* Reload it on the local cpu. */
bd40791e
DM
524 tsb_context_switch(mm);
525
7a1ac526 526 /* Now force other processors to do the same. */
a3cf5e6b 527 preempt_disable();
7a1ac526 528 smp_tsb_sync(mm);
a3cf5e6b 529 preempt_enable();
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530
531 /* Now it is safe to free the old tsb. */
9b4006dc 532 kmem_cache_free(tsb_caches[old_cache_index], old_tsb);
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533 }
534}
535
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536int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
537{
1e953d84 538 unsigned long mm_rss = get_mm_rss(mm);
9e695d2e 539#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
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540 unsigned long saved_hugetlb_pte_count;
541 unsigned long saved_thp_pte_count;
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542#endif
543 unsigned int i;
544
a77754b4 545 spin_lock_init(&mm->context.lock);
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546
547 mm->context.sparc64_ctx_val = 0UL;
09f94287 548
9e695d2e 549#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
af1b1a9b 550 /* We reset them to zero because the fork() page copying
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551 * will re-increment the counters as the parent PTEs are
552 * copied into the child address space.
553 */
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554 saved_hugetlb_pte_count = mm->context.hugetlb_pte_count;
555 saved_thp_pte_count = mm->context.thp_pte_count;
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556 mm->context.hugetlb_pte_count = 0;
557 mm->context.thp_pte_count = 0;
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558
559 mm_rss -= saved_thp_pte_count * (HPAGE_SIZE / PAGE_SIZE);
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560#endif
561
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562 /* copy_mm() copies over the parent's mm_struct before calling
563 * us, so we need to zero out the TSB pointer or else tsb_grow()
564 * will be confused and think there is an older TSB to free up.
565 */
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566 for (i = 0; i < MM_NUM_TSBS; i++)
567 mm->context.tsb_block[i].tsb = NULL;
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568
569 /* If this is fork, inherit the parent's TSB size. We would
570 * grow it to that size on the first page fault anyways.
571 */
1e953d84 572 tsb_grow(mm, MM_TSB_BASE, mm_rss);
bd40791e 573
9e695d2e 574#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
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575 if (unlikely(saved_hugetlb_pte_count + saved_thp_pte_count))
576 tsb_grow(mm, MM_TSB_HUGE,
577 (saved_hugetlb_pte_count + saved_thp_pte_count) *
578 REAL_HPAGE_PER_HPAGE);
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579#endif
580
581 if (unlikely(!mm->context.tsb_block[MM_TSB_BASE].tsb))
bd40791e 582 return -ENOMEM;
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583
584 return 0;
585}
586
dcc1e8dd 587static void tsb_destroy_one(struct tsb_config *tp)
09f94287 588{
dcc1e8dd 589 unsigned long cache_index;
bd40791e 590
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591 if (!tp->tsb)
592 return;
593 cache_index = tp->tsb_reg_val & 0x7UL;
594 kmem_cache_free(tsb_caches[cache_index], tp->tsb);
595 tp->tsb = NULL;
596 tp->tsb_reg_val = 0UL;
597}
98c5584c 598
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599void destroy_context(struct mm_struct *mm)
600{
601 unsigned long flags, i;
602
603 for (i = 0; i < MM_NUM_TSBS; i++)
604 tsb_destroy_one(&mm->context.tsb_block[i]);
09f94287 605
77b838fa 606 spin_lock_irqsave(&ctx_alloc_lock, flags);
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607
608 if (CTX_VALID(mm->context)) {
609 unsigned long nr = CTX_NRBITS(mm->context);
610 mmu_context_bmap[nr>>6] &= ~(1UL << (nr & 63));
611 }
612
77b838fa 613 spin_unlock_irqrestore(&ctx_alloc_lock, flags);
09f94287 614}