[mirror_ubuntu-artful-kernel.git] / arch / sparc64 / kernel / kprobes.c

/* arch/sparc64/kernel/kprobes.c
 *
 * Copyright (C) 2004 David S. Miller <davem@davemloft.net>
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/kprobes.h>
#include <asm/kdebug.h>
#include <asm/signal.h>

/* We do not have hardware single-stepping on sparc64.
 * So we implement software single-stepping with breakpoint
 * traps.  The top-level scheme is similar to that used
 * in the x86 kprobes implementation.
 *
 * In the kprobe->ainsn.insn[] array we store the original
 * instruction at index zero and a break instruction at
 * index one.
 *
 * When we hit a kprobe we:
 * - Run the pre-handler
 * - Remember "regs->tnpc" and interrupt level stored in
 *   "regs->tstate" so we can restore them later
 * - Disable PIL interrupts
 * - Set regs->tpc to point to kprobe->ainsn.insn[0]
 * - Set regs->tnpc to point to kprobe->ainsn.insn[1]
 * - Mark that we are actively in a kprobe
 *
 * At this point we wait for the second breakpoint at
 * kprobe->ainsn.insn[1] to hit.  When it does we:
 * - Run the post-handler
 * - Set regs->tpc to "remembered" regs->tnpc stored above,
 *   restore the PIL interrupt level in "regs->tstate" as well
 * - Make any adjustments necessary to regs->tnpc in order
 *   to handle relative branches correctly.  See below.
 * - Mark that we are no longer actively in a kprobe.
 */

int arch_prepare_kprobe(struct kprobe *p)
{
	return 0;
}

void arch_copy_kprobe(struct kprobe *p)
{
	p->ainsn.insn[0] = *p->addr;
	p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2;
	p->opcode = *p->addr;
}

void arch_arm_kprobe(struct kprobe *p)
{
	*p->addr = BREAKPOINT_INSTRUCTION;
	flushi(p->addr);
}

void arch_disarm_kprobe(struct kprobe *p)
{
	*p->addr = p->opcode;
	flushi(p->addr);
}

void arch_remove_kprobe(struct kprobe *p)
{
}

static struct kprobe *current_kprobe;
static unsigned long current_kprobe_orig_tnpc;
static unsigned long current_kprobe_orig_tstate_pil;
static unsigned int kprobe_status;
static struct kprobe *kprobe_prev;
static unsigned long kprobe_orig_tnpc_prev;
static unsigned long kprobe_orig_tstate_pil_prev;
static unsigned int kprobe_status_prev;

static inline void save_previous_kprobe(void)
{
	kprobe_status_prev = kprobe_status;
	kprobe_orig_tnpc_prev = current_kprobe_orig_tnpc;
	kprobe_orig_tstate_pil_prev = current_kprobe_orig_tstate_pil;
	kprobe_prev = current_kprobe;
}

static inline void restore_previous_kprobe(void)
{
	kprobe_status = kprobe_status_prev;
	current_kprobe_orig_tnpc = kprobe_orig_tnpc_prev;
	current_kprobe_orig_tstate_pil = kprobe_orig_tstate_pil_prev;
	current_kprobe = kprobe_prev;
}

static inline void set_current_kprobe(struct kprobe *p, struct pt_regs *regs)
{
	current_kprobe_orig_tnpc = regs->tnpc;
	current_kprobe_orig_tstate_pil = (regs->tstate & TSTATE_PIL);
	current_kprobe = p;
}

static inline void prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
{
	regs->tstate |= TSTATE_PIL;

	/*single step inline, if it a breakpoint instruction*/
	if (p->opcode == BREAKPOINT_INSTRUCTION) {
		regs->tpc = (unsigned long) p->addr;
		regs->tnpc = current_kprobe_orig_tnpc;
	} else {
		regs->tpc = (unsigned long) &p->ainsn.insn[0];
		regs->tnpc = (unsigned long) &p->ainsn.insn[1];
	}
}

static int kprobe_handler(struct pt_regs *regs)
{
	struct kprobe *p;
	void *addr = (void *) regs->tpc;
	int ret = 0;

	preempt_disable();

	if (kprobe_running()) {
		/* We *are* holding lock here, so this is safe.
		 * Disarm the probe we just hit, and ignore it.
		 */
		p = get_kprobe(addr);
		if (p) {
			if (kprobe_status == KPROBE_HIT_SS) {
				regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
					current_kprobe_orig_tstate_pil);
				unlock_kprobes();
				goto no_kprobe;
			}
			/* We have reentered the kprobe_handler(), since
			 * another probe was hit while within the handler.
			 * We here save the original kprobes variables and
			 * just single step on the instruction of the new probe
			 * without calling any user handlers.
			 */
			save_previous_kprobe();
			set_current_kprobe(p, regs);
			p->nmissed++;
			kprobe_status = KPROBE_REENTER;
			prepare_singlestep(p, regs);
			return 1;
		} else {
			p = current_kprobe;
			if (p->break_handler && p->break_handler(p, regs))
				goto ss_probe;
		}
		/* If it's not ours, can't be delete race, (we hold lock). */
		goto no_kprobe;
	}

	lock_kprobes();
	p = get_kprobe(addr);
	if (!p) {
		unlock_kprobes();
		if (*(u32 *)addr != BREAKPOINT_INSTRUCTION) {
			/*
			 * The breakpoint instruction was removed right
			 * after we hit it.  Another cpu has removed
			 * either a probepoint or a debugger breakpoint
			 * at this address.  In either case, no further
			 * handling of this interrupt is appropriate.
			 */
			ret = 1;
		}
		/* Not one of ours: let kernel handle it */
		goto no_kprobe;
	}

	set_current_kprobe(p, regs);
	kprobe_status = KPROBE_HIT_ACTIVE;
	if (p->pre_handler && p->pre_handler(p, regs))
		return 1;

ss_probe:
	prepare_singlestep(p, regs);
	kprobe_status = KPROBE_HIT_SS;
	return 1;

no_kprobe:
	preempt_enable_no_resched();
	return ret;
}

/* If INSN is a relative control transfer instruction,
 * return the corrected branch destination value.
 *
 * The original INSN location was REAL_PC, it actually
 * executed at PC and produced destination address NPC.
 */
static unsigned long relbranch_fixup(u32 insn, unsigned long real_pc,
				     unsigned long pc, unsigned long npc)
{
	/* Branch not taken, no mods necessary.  */
	if (npc == pc + 0x4UL)
		return real_pc + 0x4UL;

	/* The three cases are call, branch w/prediction,
	 * and traditional branch.
	 */
	if ((insn & 0xc0000000) == 0x40000000 ||
	    (insn & 0xc1c00000) == 0x00400000 ||
	    (insn & 0xc1c00000) == 0x00800000) {
		/* The instruction did all the work for us
		 * already, just apply the offset to the correct
		 * instruction location.
		 */
		return (real_pc + (npc - pc));
	}

	return real_pc + 0x4UL;
}

/* If INSN is an instruction which writes it's PC location
 * into a destination register, fix that up.
 */
static void retpc_fixup(struct pt_regs *regs, u32 insn, unsigned long real_pc)
{
	unsigned long *slot = NULL;

	/* Simplest cast is call, which always uses %o7 */
	if ((insn & 0xc0000000) == 0x40000000) {
		slot = &regs->u_regs[UREG_I7];
	}

	/* Jmpl encodes the register inside of the opcode */
	if ((insn & 0xc1f80000) == 0x81c00000) {
		unsigned long rd = ((insn >> 25) & 0x1f);

		if (rd <= 15) {
			slot = &regs->u_regs[rd];
		} else {
			/* Hard case, it goes onto the stack. */
			flushw_all();

			rd -= 16;
			slot = (unsigned long *)
				(regs->u_regs[UREG_FP] + STACK_BIAS);
			slot += rd;
		}
	}
	if (slot != NULL)
		*slot = real_pc;
}

/*
 * Called after single-stepping.  p->addr is the address of the
 * instruction whose first byte has been replaced by the breakpoint
 * instruction.  To avoid the SMP problems that can occur when we
 * temporarily put back the original opcode to single-step, we
 * single-stepped a copy of the instruction.  The address of this
 * copy is p->ainsn.insn.
 *
 * This function prepares to return from the post-single-step
 * breakpoint trap.
 */
static void resume_execution(struct kprobe *p, struct pt_regs *regs)
{
	u32 insn = p->ainsn.insn[0];

	regs->tpc = current_kprobe_orig_tnpc;
	regs->tnpc = relbranch_fixup(insn,
				     (unsigned long) p->addr,
				     (unsigned long) &p->ainsn.insn[0],
				     regs->tnpc);
	retpc_fixup(regs, insn, (unsigned long) p->addr);

	regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
			current_kprobe_orig_tstate_pil);
}

static inline int post_kprobe_handler(struct pt_regs *regs)
{
	if (!kprobe_running())
		return 0;

	if ((kprobe_status != KPROBE_REENTER) && current_kprobe->post_handler) {
		kprobe_status = KPROBE_HIT_SSDONE;
		current_kprobe->post_handler(current_kprobe, regs, 0);
	}

	resume_execution(current_kprobe, regs);

	/*Restore back the original saved kprobes variables and continue. */
	if (kprobe_status == KPROBE_REENTER) {
		restore_previous_kprobe();
		goto out;
	}
	unlock_kprobes();
out:
	preempt_enable_no_resched();

	return 1;
}

/* Interrupts disabled, kprobe_lock held. */
static inline int kprobe_fault_handler(struct pt_regs *regs, int trapnr)
{
	if (current_kprobe->fault_handler
	    && current_kprobe->fault_handler(current_kprobe, regs, trapnr))
		return 1;

	if (kprobe_status & KPROBE_HIT_SS) {
		resume_execution(current_kprobe, regs);

		unlock_kprobes();
		preempt_enable_no_resched();
	}
	return 0;
}

/*
 * Wrapper routine to for handling exceptions.
 */
int kprobe_exceptions_notify(struct notifier_block *self, unsigned long val,
			     void *data)
{
	struct die_args *args = (struct die_args *)data;
	switch (val) {
	case DIE_DEBUG:
		if (kprobe_handler(args->regs))
			return NOTIFY_STOP;
		break;
	case DIE_DEBUG_2:
		if (post_kprobe_handler(args->regs))
			return NOTIFY_STOP;
		break;
	case DIE_GPF:
		if (kprobe_running() &&
		    kprobe_fault_handler(args->regs, args->trapnr))
			return NOTIFY_STOP;
		break;
	case DIE_PAGE_FAULT:
		if (kprobe_running() &&
		    kprobe_fault_handler(args->regs, args->trapnr))
			return NOTIFY_STOP;
		break;
	default:
		break;
	}
	return NOTIFY_DONE;
}

asmlinkage void kprobe_trap(unsigned long trap_level, struct pt_regs *regs)
{
	BUG_ON(trap_level != 0x170 && trap_level != 0x171);

	if (user_mode(regs)) {
		local_irq_enable();
		bad_trap(regs, trap_level);
		return;
	}

	/* trap_level == 0x170 --> ta 0x70
	 * trap_level == 0x171 --> ta 0x71
	 */
	if (notify_die((trap_level == 0x170) ? DIE_DEBUG : DIE_DEBUG_2,
		       (trap_level == 0x170) ? "debug" : "debug_2",
		       regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
		bad_trap(regs, trap_level);
}

/* Jprobes support.  */
static struct pt_regs jprobe_saved_regs;
static struct pt_regs *jprobe_saved_regs_location;
static struct sparc_stackf jprobe_saved_stack;

int setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
{
	struct jprobe *jp = container_of(p, struct jprobe, kp);

	jprobe_saved_regs_location = regs;
	memcpy(&jprobe_saved_regs, regs, sizeof(*regs));

	/* Save a whole stack frame, this gets arguments
	 * pushed onto the stack after using up all the
	 * arg registers.
	 */
	memcpy(&jprobe_saved_stack,
	       (char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
	       sizeof(jprobe_saved_stack));

	regs->tpc  = (unsigned long) jp->entry;
	regs->tnpc = ((unsigned long) jp->entry) + 0x4UL;
	regs->tstate |= TSTATE_PIL;

	return 1;
}

void jprobe_return(void)
{
	preempt_enable_no_resched();
	__asm__ __volatile__(
		".globl	jprobe_return_trap_instruction\n"
"jprobe_return_trap_instruction:\n\t"
		"ta 0x70");
}

extern void jprobe_return_trap_instruction(void);

extern void __show_regs(struct pt_regs * regs);

int longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
{
	u32 *addr = (u32 *) regs->tpc;

	if (addr == (u32 *) jprobe_return_trap_instruction) {
		if (jprobe_saved_regs_location != regs) {
			printk("JPROBE: Current regs (%p) does not match "
			       "saved regs (%p).\n",
			       regs, jprobe_saved_regs_location);
			printk("JPROBE: Saved registers\n");
			__show_regs(jprobe_saved_regs_location);
			printk("JPROBE: Current registers\n");
			__show_regs(regs);
			BUG();
		}
		/* Restore old register state.  Do pt_regs
		 * first so that UREG_FP is the original one for
		 * the stack frame restore.
		 */
		memcpy(regs, &jprobe_saved_regs, sizeof(*regs));

		memcpy((char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
		       &jprobe_saved_stack,
		       sizeof(jprobe_saved_stack));

		return 1;
	}
	return 0;
}
Commit	Line	Data
1da177e4 LT	1	/* arch/sparc64/kernel/kprobes.c
	2	*
	3	* Copyright (C) 2004 David S. Miller <davem@davemloft.net>
	4	*/
	5
	6	#include <linux/config.h>
	7	#include <linux/kernel.h>
	8	#include <linux/kprobes.h>
1da177e4 LT	9	#include <asm/kdebug.h>
	10	#include <asm/signal.h>
	11
	12	/* We do not have hardware single-stepping on sparc64.
	13	* So we implement software single-stepping with breakpoint
	14	* traps. The top-level scheme is similar to that used
	15	* in the x86 kprobes implementation.
	16	*
	17	* In the kprobe->ainsn.insn[] array we store the original
	18	* instruction at index zero and a break instruction at
	19	* index one.
	20	*
	21	* When we hit a kprobe we:
	22	* - Run the pre-handler
	23	* - Remember "regs->tnpc" and interrupt level stored in
	24	* "regs->tstate" so we can restore them later
	25	* - Disable PIL interrupts
	26	* - Set regs->tpc to point to kprobe->ainsn.insn[0]
	27	* - Set regs->tnpc to point to kprobe->ainsn.insn[1]
	28	* - Mark that we are actively in a kprobe
	29	*
	30	* At this point we wait for the second breakpoint at
	31	* kprobe->ainsn.insn[1] to hit. When it does we:
	32	* - Run the post-handler
	33	* - Set regs->tpc to "remembered" regs->tnpc stored above,
	34	* restore the PIL interrupt level in "regs->tstate" as well
	35	* - Make any adjustments necessary to regs->tnpc in order
	36	* to handle relative branches correctly. See below.
	37	* - Mark that we are no longer actively in a kprobe.
	38	*/
	39
	40	int arch_prepare_kprobe(struct kprobe *p)
	41	{
	42	return 0;
	43	}
	44
	45	void arch_copy_kprobe(struct kprobe *p)
	46	{
	47	p->ainsn.insn[0] = *p->addr;
	48	p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2;
7e1048b1 RL	49	p->opcode = *p->addr;
	50	}
	51
	52	void arch_arm_kprobe(struct kprobe *p)
	53	{
	54	*p->addr = BREAKPOINT_INSTRUCTION;
	55	flushi(p->addr);
	56	}
	57
	58	void arch_disarm_kprobe(struct kprobe *p)
	59	{
	60	*p->addr = p->opcode;
	61	flushi(p->addr);
1da177e4 LT	62	}
	63
	64	void arch_remove_kprobe(struct kprobe *p)
	65	{
	66	}
	67
1da177e4 LT	68	static struct kprobe *current_kprobe;
	69	static unsigned long current_kprobe_orig_tnpc;
	70	static unsigned long current_kprobe_orig_tstate_pil;
	71	static unsigned int kprobe_status;
e539c233 PP	72	static struct kprobe *kprobe_prev;
	73	static unsigned long kprobe_orig_tnpc_prev;
	74	static unsigned long kprobe_orig_tstate_pil_prev;
	75	static unsigned int kprobe_status_prev;
1da177e4	76
e539c233 PP	77	static inline void save_previous_kprobe(void)
	78	{
	79	kprobe_status_prev = kprobe_status;
	80	kprobe_orig_tnpc_prev = current_kprobe_orig_tnpc;
	81	kprobe_orig_tstate_pil_prev = current_kprobe_orig_tstate_pil;
	82	kprobe_prev = current_kprobe;
	83	}
	84
	85	static inline void restore_previous_kprobe(void)
	86	{
	87	kprobe_status = kprobe_status_prev;
	88	current_kprobe_orig_tnpc = kprobe_orig_tnpc_prev;
	89	current_kprobe_orig_tstate_pil = kprobe_orig_tstate_pil_prev;
	90	current_kprobe = kprobe_prev;
	91	}
	92
	93	static inline void set_current_kprobe(struct kprobe p, struct pt_regs regs)
1da177e4 LT	94	{
	95	current_kprobe_orig_tnpc = regs->tnpc;
	96	current_kprobe_orig_tstate_pil = (regs->tstate & TSTATE_PIL);
e539c233 PP	97	current_kprobe = p;
	98	}
	99
	100	static inline void prepare_singlestep(struct kprobe p, struct pt_regs regs)
	101	{
1da177e4 LT	102	regs->tstate \|= TSTATE_PIL;
	103
	104	/single step inline, if it a breakpoint instruction/
	105	if (p->opcode == BREAKPOINT_INSTRUCTION) {
	106	regs->tpc = (unsigned long) p->addr;
	107	regs->tnpc = current_kprobe_orig_tnpc;
	108	} else {
	109	regs->tpc = (unsigned long) &p->ainsn.insn[0];
	110	regs->tnpc = (unsigned long) &p->ainsn.insn[1];
	111	}
	112	}
	113
1da177e4 LT	114	static int kprobe_handler(struct pt_regs *regs)
	115	{
	116	struct kprobe *p;
	117	void addr = (void ) regs->tpc;
	118	int ret = 0;
	119
	120	preempt_disable();
	121
	122	if (kprobe_running()) {
	123	/* We are holding lock here, so this is safe.
	124	* Disarm the probe we just hit, and ignore it.
	125	*/
	126	p = get_kprobe(addr);
	127	if (p) {
	128	if (kprobe_status == KPROBE_HIT_SS) {
	129	regs->tstate = ((regs->tstate & ~TSTATE_PIL) \|
	130	current_kprobe_orig_tstate_pil);
	131	unlock_kprobes();
	132	goto no_kprobe;
	133	}
e539c233 PP	134	/* We have reentered the kprobe_handler(), since
	135	* another probe was hit while within the handler.
	136	* We here save the original kprobes variables and
	137	* just single step on the instruction of the new probe
	138	* without calling any user handlers.
	139	*/
	140	save_previous_kprobe();
	141	set_current_kprobe(p, regs);
	142	p->nmissed++;
	143	kprobe_status = KPROBE_REENTER;
	144	prepare_singlestep(p, regs);
	145	return 1;
1da177e4 LT	146	} else {
	147	p = current_kprobe;
	148	if (p->break_handler && p->break_handler(p, regs))
	149	goto ss_probe;
	150	}
	151	/* If it's not ours, can't be delete race, (we hold lock). */
	152	goto no_kprobe;
	153	}
	154
	155	lock_kprobes();
	156	p = get_kprobe(addr);
	157	if (!p) {
	158	unlock_kprobes();
	159	if ((u32 )addr != BREAKPOINT_INSTRUCTION) {
	160	/*
	161	* The breakpoint instruction was removed right
	162	* after we hit it. Another cpu has removed
	163	* either a probepoint or a debugger breakpoint
	164	* at this address. In either case, no further
	165	* handling of this interrupt is appropriate.
	166	*/
	167	ret = 1;
	168	}
	169	/* Not one of ours: let kernel handle it */
	170	goto no_kprobe;
	171	}
	172
e539c233	173	set_current_kprobe(p, regs);
1da177e4	174	kprobe_status = KPROBE_HIT_ACTIVE;
1da177e4 LT	175	if (p->pre_handler && p->pre_handler(p, regs))
	176	return 1;
	177
	178	ss_probe:
	179	prepare_singlestep(p, regs);
	180	kprobe_status = KPROBE_HIT_SS;
	181	return 1;
	182
	183	no_kprobe:
	184	preempt_enable_no_resched();
	185	return ret;
	186	}
	187
	188	/* If INSN is a relative control transfer instruction,
	189	* return the corrected branch destination value.
	190	*
	191	* The original INSN location was REAL_PC, it actually
	192	* executed at PC and produced destination address NPC.
	193	*/
	194	static unsigned long relbranch_fixup(u32 insn, unsigned long real_pc,
	195	unsigned long pc, unsigned long npc)
	196	{
	197	/* Branch not taken, no mods necessary. */
	198	if (npc == pc + 0x4UL)
	199	return real_pc + 0x4UL;
	200
	201	/* The three cases are call, branch w/prediction,
	202	* and traditional branch.
	203	*/
	204	if ((insn & 0xc0000000) == 0x40000000 \|\|
	205	(insn & 0xc1c00000) == 0x00400000 \|\|
	206	(insn & 0xc1c00000) == 0x00800000) {
	207	/* The instruction did all the work for us
	208	* already, just apply the offset to the correct
	209	* instruction location.
	210	*/
	211	return (real_pc + (npc - pc));
	212	}
	213
	214	return real_pc + 0x4UL;
	215	}
	216
	217	/* If INSN is an instruction which writes it's PC location
	218	* into a destination register, fix that up.
	219	*/
	220	static void retpc_fixup(struct pt_regs *regs, u32 insn, unsigned long real_pc)
	221	{
	222	unsigned long *slot = NULL;
	223
	224	/* Simplest cast is call, which always uses %o7 */
	225	if ((insn & 0xc0000000) == 0x40000000) {
	226	slot = &regs->u_regs[UREG_I7];
	227	}
	228
	229	/* Jmpl encodes the register inside of the opcode */
	230	if ((insn & 0xc1f80000) == 0x81c00000) {
	231	unsigned long rd = ((insn >> 25) & 0x1f);
	232
	233	if (rd <= 15) {
	234	slot = &regs->u_regs[rd];
	235	} else {
	236	/* Hard case, it goes onto the stack. */
	237	flushw_all();
	238
239	rd -= 16;
240	slot = (unsigned long *)
241	(regs->u_regs[UREG_FP] + STACK_BIAS);
242	slot += rd;
243	}
244	}
245	if (slot != NULL)
246	*slot = real_pc;
247	}
248
249	/*
250	* Called after single-stepping. p->addr is the address of the
251	* instruction whose first byte has been replaced by the breakpoint
252	* instruction. To avoid the SMP problems that can occur when we
253	* temporarily put back the original opcode to single-step, we
254	* single-stepped a copy of the instruction. The address of this
255	* copy is p->ainsn.insn.
256	*
257	* This function prepares to return from the post-single-step
258	* breakpoint trap.
259	*/
260	static void resume_execution(struct kprobe p, struct pt_regs regs)
261	{
262	u32 insn = p->ainsn.insn[0];
263
264	regs->tpc = current_kprobe_orig_tnpc;
265	regs->tnpc = relbranch_fixup(insn,
266	(unsigned long) p->addr,
267	(unsigned long) &p->ainsn.insn[0],
268	regs->tnpc);
269	retpc_fixup(regs, insn, (unsigned long) p->addr);
270
271	regs->tstate = ((regs->tstate & ~TSTATE_PIL) \|
272	current_kprobe_orig_tstate_pil);
273	}
274
275	static inline int post_kprobe_handler(struct pt_regs *regs)
276	{
277	if (!kprobe_running())
278	return 0;
279
e539c233 PP	280	if ((kprobe_status != KPROBE_REENTER) && current_kprobe->post_handler) {
e539c233 PP	281	kprobe_status = KPROBE_HIT_SSDONE;
1da177e4	282	current_kprobe->post_handler(current_kprobe, regs, 0);
e539c233	283	}
1da177e4 LT	284
	285	resume_execution(current_kprobe, regs);
	286
e539c233 PP	287	/Restore back the original saved kprobes variables and continue. /
	288	if (kprobe_status == KPROBE_REENTER) {
	289	restore_previous_kprobe();
	290	goto out;
	291	}
1da177e4	292	unlock_kprobes();
e539c233	293	out:
1da177e4 LT	294	preempt_enable_no_resched();
	295
	296	return 1;
	297	}
	298
	299	/* Interrupts disabled, kprobe_lock held. */
	300	static inline int kprobe_fault_handler(struct pt_regs *regs, int trapnr)
	301	{
	302	if (current_kprobe->fault_handler
	303	&& current_kprobe->fault_handler(current_kprobe, regs, trapnr))
	304	return 1;
	305
	306	if (kprobe_status & KPROBE_HIT_SS) {
	307	resume_execution(current_kprobe, regs);
	308
	309	unlock_kprobes();
	310	preempt_enable_no_resched();
	311	}
	312	return 0;
	313	}
	314
	315	/*
	316	* Wrapper routine to for handling exceptions.
	317	*/
	318	int kprobe_exceptions_notify(struct notifier_block *self, unsigned long val,
	319	void *data)
	320	{
	321	struct die_args args = (struct die_args )data;
	322	switch (val) {
	323	case DIE_DEBUG:
	324	if (kprobe_handler(args->regs))
	325	return NOTIFY_STOP;
	326	break;
	327	case DIE_DEBUG_2:
	328	if (post_kprobe_handler(args->regs))
	329	return NOTIFY_STOP;
	330	break;
	331	case DIE_GPF:
	332	if (kprobe_running() &&
	333	kprobe_fault_handler(args->regs, args->trapnr))
	334	return NOTIFY_STOP;
	335	break;
	336	case DIE_PAGE_FAULT:
	337	if (kprobe_running() &&
	338	kprobe_fault_handler(args->regs, args->trapnr))
	339	return NOTIFY_STOP;
	340	break;
	341	default:
	342	break;
	343	}
	344	return NOTIFY_DONE;
	345	}
	346
	347	asmlinkage void kprobe_trap(unsigned long trap_level, struct pt_regs *regs)
	348	{
	349	BUG_ON(trap_level != 0x170 && trap_level != 0x171);
	350
	351	if (user_mode(regs)) {
	352	local_irq_enable();
	353	bad_trap(regs, trap_level);
	354	return;
	355	}
	356
	357	/* trap_level == 0x170 --> ta 0x70
358	* trap_level == 0x171 --> ta 0x71
359	*/
360	if (notify_die((trap_level == 0x170) ? DIE_DEBUG : DIE_DEBUG_2,
361	(trap_level == 0x170) ? "debug" : "debug_2",
362	regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
363	bad_trap(regs, trap_level);
364	}
365
366	/* Jprobes support. */
367	static struct pt_regs jprobe_saved_regs;
368	static struct pt_regs *jprobe_saved_regs_location;
369	static struct sparc_stackf jprobe_saved_stack;
370
371	int setjmp_pre_handler(struct kprobe p, struct pt_regs regs)
372	{
373	struct jprobe *jp = container_of(p, struct jprobe, kp);
374
375	jprobe_saved_regs_location = regs;
376	memcpy(&jprobe_saved_regs, regs, sizeof(*regs));
377
378	/* Save a whole stack frame, this gets arguments
379	* pushed onto the stack after using up all the
380	* arg registers.
381	*/
382	memcpy(&jprobe_saved_stack,
383	(char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
384	sizeof(jprobe_saved_stack));
385
386	regs->tpc = (unsigned long) jp->entry;
387	regs->tnpc = ((unsigned long) jp->entry) + 0x4UL;
388	regs->tstate \|= TSTATE_PIL;
389
390	return 1;
391	}
392
393	void jprobe_return(void)
394	{
395	preempt_enable_no_resched();
396	__asm__ __volatile__(
397	".globl jprobe_return_trap_instruction\n"
398	"jprobe_return_trap_instruction:\n\t"
399	"ta 0x70");
400	}
401
402	extern void jprobe_return_trap_instruction(void);
403
404	extern void __show_regs(struct pt_regs * regs);
405
406	int longjmp_break_handler(struct kprobe p, struct pt_regs regs)
407	{
408	u32 addr = (u32 ) regs->tpc;
409
410	if (addr == (u32 *) jprobe_return_trap_instruction) {
411	if (jprobe_saved_regs_location != regs) {
412	printk("JPROBE: Current regs (%p) does not match "
413	"saved regs (%p).\n",
414	regs, jprobe_saved_regs_location);
415	printk("JPROBE: Saved registers\n");
416	__show_regs(jprobe_saved_regs_location);
417	printk("JPROBE: Current registers\n");
418	__show_regs(regs);
419	BUG();
420	}
421	/* Restore old register state. Do pt_regs
422	* first so that UREG_FP is the original one for
423	* the stack frame restore.
424	*/
425	memcpy(regs, &jprobe_saved_regs, sizeof(*regs));
426
427	memcpy((char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
428	&jprobe_saved_stack,
429	sizeof(jprobe_saved_stack));
430
431	return 1;
432	}
433	return 0;
434	}
e539c233	435