[mirror_ubuntu-artful-kernel.git] / arch / sparc64 / kernel / kprobes.c

/* arch/sparc64/kernel/kprobes.c
 *
 * Copyright (C) 2004 David S. Miller <davem@davemloft.net>
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/kprobes.h>
#include <asm/kdebug.h>
#include <asm/signal.h>
#include <asm/cacheflush.h>

/* We do not have hardware single-stepping on sparc64.
 * So we implement software single-stepping with breakpoint
 * traps.  The top-level scheme is similar to that used
 * in the x86 kprobes implementation.
 *
 * In the kprobe->ainsn.insn[] array we store the original
 * instruction at index zero and a break instruction at
 * index one.
 *
 * When we hit a kprobe we:
 * - Run the pre-handler
 * - Remember "regs->tnpc" and interrupt level stored in
 *   "regs->tstate" so we can restore them later
 * - Disable PIL interrupts
 * - Set regs->tpc to point to kprobe->ainsn.insn[0]
 * - Set regs->tnpc to point to kprobe->ainsn.insn[1]
 * - Mark that we are actively in a kprobe
 *
 * At this point we wait for the second breakpoint at
 * kprobe->ainsn.insn[1] to hit.  When it does we:
 * - Run the post-handler
 * - Set regs->tpc to "remembered" regs->tnpc stored above,
 *   restore the PIL interrupt level in "regs->tstate" as well
 * - Make any adjustments necessary to regs->tnpc in order
 *   to handle relative branches correctly.  See below.
 * - Mark that we are no longer actively in a kprobe.
 */

DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);

int __kprobes arch_prepare_kprobe(struct kprobe *p)
{
	return 0;
}

void __kprobes arch_copy_kprobe(struct kprobe *p)
{
	p->ainsn.insn[0] = *p->addr;
	p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2;
	p->opcode = *p->addr;
}

void __kprobes arch_arm_kprobe(struct kprobe *p)
{
	*p->addr = BREAKPOINT_INSTRUCTION;
	flushi(p->addr);
}

void __kprobes arch_disarm_kprobe(struct kprobe *p)
{
	*p->addr = p->opcode;
	flushi(p->addr);
}

void __kprobes arch_remove_kprobe(struct kprobe *p)
{
}

static inline void save_previous_kprobe(struct kprobe_ctlblk *kcb)
{
	kcb->prev_kprobe.kp = kprobe_running();
	kcb->prev_kprobe.status = kcb->kprobe_status;
	kcb->prev_kprobe.orig_tnpc = kcb->kprobe_orig_tnpc;
	kcb->prev_kprobe.orig_tstate_pil = kcb->kprobe_orig_tstate_pil;
}

static inline void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
{
	__get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp;
	kcb->kprobe_status = kcb->prev_kprobe.status;
	kcb->kprobe_orig_tnpc = kcb->prev_kprobe.orig_tnpc;
	kcb->kprobe_orig_tstate_pil = kcb->prev_kprobe.orig_tstate_pil;
}

static inline void set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
				struct kprobe_ctlblk *kcb)
{
	__get_cpu_var(current_kprobe) = p;
	kcb->kprobe_orig_tnpc = regs->tnpc;
	kcb->kprobe_orig_tstate_pil = (regs->tstate & TSTATE_PIL);
}

static inline void prepare_singlestep(struct kprobe *p, struct pt_regs *regs,
			struct kprobe_ctlblk *kcb)
{
	regs->tstate |= TSTATE_PIL;

	/*single step inline, if it a breakpoint instruction*/
	if (p->opcode == BREAKPOINT_INSTRUCTION) {
		regs->tpc = (unsigned long) p->addr;
		regs->tnpc = kcb->kprobe_orig_tnpc;
	} else {
		regs->tpc = (unsigned long) &p->ainsn.insn[0];
		regs->tnpc = (unsigned long) &p->ainsn.insn[1];
	}
}

static int __kprobes kprobe_handler(struct pt_regs *regs)
{
	struct kprobe *p;
	void *addr = (void *) regs->tpc;
	int ret = 0;
	struct kprobe_ctlblk *kcb;

	/*
	 * We don't want to be preempted for the entire
	 * duration of kprobe processing
	 */
	preempt_disable();
	kcb = get_kprobe_ctlblk();

	if (kprobe_running()) {
		p = get_kprobe(addr);
		if (p) {
			if (kcb->kprobe_status == KPROBE_HIT_SS) {
				regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
					kcb->kprobe_orig_tstate_pil);
				goto no_kprobe;
			}
			/* We have reentered the kprobe_handler(), since
			 * another probe was hit while within the handler.
			 * We here save the original kprobes variables and
			 * just single step on the instruction of the new probe
			 * without calling any user handlers.
			 */
			save_previous_kprobe(kcb);
			set_current_kprobe(p, regs, kcb);
			p->nmissed++;
			kcb->kprobe_status = KPROBE_REENTER;
			prepare_singlestep(p, regs, kcb);
			return 1;
		} else {
			p = __get_cpu_var(current_kprobe);
			if (p->break_handler && p->break_handler(p, regs))
				goto ss_probe;
		}
		goto no_kprobe;
	}

	p = get_kprobe(addr);
	if (!p) {
		if (*(u32 *)addr != BREAKPOINT_INSTRUCTION) {
			/*
			 * The breakpoint instruction was removed right
			 * after we hit it.  Another cpu has removed
			 * either a probepoint or a debugger breakpoint
			 * at this address.  In either case, no further
			 * handling of this interrupt is appropriate.
			 */
			ret = 1;
		}
		/* Not one of ours: let kernel handle it */
		goto no_kprobe;
	}

	set_current_kprobe(p, regs, kcb);
	kcb->kprobe_status = KPROBE_HIT_ACTIVE;
	if (p->pre_handler && p->pre_handler(p, regs))
		return 1;

ss_probe:
	prepare_singlestep(p, regs, kcb);
	kcb->kprobe_status = KPROBE_HIT_SS;
	return 1;

no_kprobe:
	preempt_enable_no_resched();
	return ret;
}

/* If INSN is a relative control transfer instruction,
 * return the corrected branch destination value.
 *
 * The original INSN location was REAL_PC, it actually
 * executed at PC and produced destination address NPC.
 */
static unsigned long __kprobes relbranch_fixup(u32 insn, unsigned long real_pc,
					       unsigned long pc,
					       unsigned long npc)
{
	/* Branch not taken, no mods necessary.  */
	if (npc == pc + 0x4UL)
		return real_pc + 0x4UL;

	/* The three cases are call, branch w/prediction,
	 * and traditional branch.
	 */
	if ((insn & 0xc0000000) == 0x40000000 ||
	    (insn & 0xc1c00000) == 0x00400000 ||
	    (insn & 0xc1c00000) == 0x00800000) {
		/* The instruction did all the work for us
		 * already, just apply the offset to the correct
		 * instruction location.
		 */
		return (real_pc + (npc - pc));
	}

	return real_pc + 0x4UL;
}

/* If INSN is an instruction which writes it's PC location
 * into a destination register, fix that up.
 */
static void __kprobes retpc_fixup(struct pt_regs *regs, u32 insn,
				  unsigned long real_pc)
{
	unsigned long *slot = NULL;

	/* Simplest cast is call, which always uses %o7 */
	if ((insn & 0xc0000000) == 0x40000000) {
		slot = &regs->u_regs[UREG_I7];
	}

	/* Jmpl encodes the register inside of the opcode */
	if ((insn & 0xc1f80000) == 0x81c00000) {
		unsigned long rd = ((insn >> 25) & 0x1f);

		if (rd <= 15) {
			slot = &regs->u_regs[rd];
		} else {
			/* Hard case, it goes onto the stack. */
			flushw_all();

			rd -= 16;
			slot = (unsigned long *)
				(regs->u_regs[UREG_FP] + STACK_BIAS);
			slot += rd;
		}
	}
	if (slot != NULL)
		*slot = real_pc;
}

/*
 * Called after single-stepping.  p->addr is the address of the
 * instruction whose first byte has been replaced by the breakpoint
 * instruction.  To avoid the SMP problems that can occur when we
 * temporarily put back the original opcode to single-step, we
 * single-stepped a copy of the instruction.  The address of this
 * copy is p->ainsn.insn.
 *
 * This function prepares to return from the post-single-step
 * breakpoint trap.
 */
static void __kprobes resume_execution(struct kprobe *p,
		struct pt_regs *regs, struct kprobe_ctlblk *kcb)
{
	u32 insn = p->ainsn.insn[0];

	regs->tpc = kcb->kprobe_orig_tnpc;
	regs->tnpc = relbranch_fixup(insn,
				     (unsigned long) p->addr,
				     (unsigned long) &p->ainsn.insn[0],
				     regs->tnpc);
	retpc_fixup(regs, insn, (unsigned long) p->addr);

	regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
			kcb->kprobe_orig_tstate_pil);
}

static inline int post_kprobe_handler(struct pt_regs *regs)
{
	struct kprobe *cur = kprobe_running();
	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();

	if (!cur)
		return 0;

	if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) {
		kcb->kprobe_status = KPROBE_HIT_SSDONE;
		cur->post_handler(cur, regs, 0);
	}

	resume_execution(cur, regs, kcb);

	/*Restore back the original saved kprobes variables and continue. */
	if (kcb->kprobe_status == KPROBE_REENTER) {
		restore_previous_kprobe(kcb);
		goto out;
	}
	reset_current_kprobe();
out:
	preempt_enable_no_resched();

	return 1;
}

static inline int kprobe_fault_handler(struct pt_regs *regs, int trapnr)
{
	struct kprobe *cur = kprobe_running();
	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();

	if (cur->fault_handler && cur->fault_handler(cur, regs, trapnr))
		return 1;

	if (kcb->kprobe_status & KPROBE_HIT_SS) {
		resume_execution(cur, regs, kcb);

		reset_current_kprobe();
		preempt_enable_no_resched();
	}
	return 0;
}

/*
 * Wrapper routine to for handling exceptions.
 */
int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
				       unsigned long val, void *data)
{
	struct die_args *args = (struct die_args *)data;
	int ret = NOTIFY_DONE;

	switch (val) {
	case DIE_DEBUG:
		if (kprobe_handler(args->regs))
			ret = NOTIFY_STOP;
		break;
	case DIE_DEBUG_2:
		if (post_kprobe_handler(args->regs))
			ret = NOTIFY_STOP;
		break;
	case DIE_GPF:
	case DIE_PAGE_FAULT:
		/* kprobe_running() needs smp_processor_id() */
		preempt_disable();
		if (kprobe_running() &&
		    kprobe_fault_handler(args->regs, args->trapnr))
			ret = NOTIFY_STOP;
		preempt_enable();
		break;
	default:
		break;
	}
	return ret;
}

asmlinkage void __kprobes kprobe_trap(unsigned long trap_level,
				      struct pt_regs *regs)
{
	BUG_ON(trap_level != 0x170 && trap_level != 0x171);

	if (user_mode(regs)) {
		local_irq_enable();
		bad_trap(regs, trap_level);
		return;
	}

	/* trap_level == 0x170 --> ta 0x70
	 * trap_level == 0x171 --> ta 0x71
	 */
	if (notify_die((trap_level == 0x170) ? DIE_DEBUG : DIE_DEBUG_2,
		       (trap_level == 0x170) ? "debug" : "debug_2",
		       regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
		bad_trap(regs, trap_level);
}

/* Jprobes support.  */
int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
{
	struct jprobe *jp = container_of(p, struct jprobe, kp);
	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();

	kcb->jprobe_saved_regs_location = regs;
	memcpy(&(kcb->jprobe_saved_regs), regs, sizeof(*regs));

	/* Save a whole stack frame, this gets arguments
	 * pushed onto the stack after using up all the
	 * arg registers.
	 */
	memcpy(&(kcb->jprobe_saved_stack),
	       (char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
	       sizeof(kcb->jprobe_saved_stack));

	regs->tpc  = (unsigned long) jp->entry;
	regs->tnpc = ((unsigned long) jp->entry) + 0x4UL;
	regs->tstate |= TSTATE_PIL;

	return 1;
}

void __kprobes jprobe_return(void)
{
	__asm__ __volatile__(
		".globl	jprobe_return_trap_instruction\n"
"jprobe_return_trap_instruction:\n\t"
		"ta 0x70");
}

extern void jprobe_return_trap_instruction(void);

extern void __show_regs(struct pt_regs * regs);

int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
{
	u32 *addr = (u32 *) regs->tpc;
	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();

	if (addr == (u32 *) jprobe_return_trap_instruction) {
		if (kcb->jprobe_saved_regs_location != regs) {
			printk("JPROBE: Current regs (%p) does not match "
			       "saved regs (%p).\n",
			       regs, kcb->jprobe_saved_regs_location);
			printk("JPROBE: Saved registers\n");
			__show_regs(kcb->jprobe_saved_regs_location);
			printk("JPROBE: Current registers\n");
			__show_regs(regs);
			BUG();
		}
		/* Restore old register state.  Do pt_regs
		 * first so that UREG_FP is the original one for
		 * the stack frame restore.
		 */
		memcpy(regs, &(kcb->jprobe_saved_regs), sizeof(*regs));

		memcpy((char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
		       &(kcb->jprobe_saved_stack),
		       sizeof(kcb->jprobe_saved_stack));

		preempt_enable_no_resched();
		return 1;
	}
	return 0;
}

/* architecture specific initialization */
int arch_init_kprobes(void)
{
	return 0;
}
Commit	Line	Data
1da177e4 LT	1	/* arch/sparc64/kernel/kprobes.c
	2	*
	3	* Copyright (C) 2004 David S. Miller <davem@davemloft.net>
	4	*/
	5
	6	#include <linux/config.h>
	7	#include <linux/kernel.h>
	8	#include <linux/kprobes.h>
1da177e4 LT	9	#include <asm/kdebug.h>
1da177e4 LT	10	#include <asm/signal.h>
05e14cb3	11	#include <asm/cacheflush.h>
1da177e4 LT	12
	13	/* We do not have hardware single-stepping on sparc64.
	14	* So we implement software single-stepping with breakpoint
	15	* traps. The top-level scheme is similar to that used
	16	* in the x86 kprobes implementation.
	17	*
	18	* In the kprobe->ainsn.insn[] array we store the original
	19	* instruction at index zero and a break instruction at
	20	* index one.
	21	*
	22	* When we hit a kprobe we:
	23	* - Run the pre-handler
	24	* - Remember "regs->tnpc" and interrupt level stored in
	25	* "regs->tstate" so we can restore them later
	26	* - Disable PIL interrupts
	27	* - Set regs->tpc to point to kprobe->ainsn.insn[0]
	28	* - Set regs->tnpc to point to kprobe->ainsn.insn[1]
	29	* - Mark that we are actively in a kprobe
	30	*
	31	* At this point we wait for the second breakpoint at
	32	* kprobe->ainsn.insn[1] to hit. When it does we:
	33	* - Run the post-handler
	34	* - Set regs->tpc to "remembered" regs->tnpc stored above,
	35	* restore the PIL interrupt level in "regs->tstate" as well
	36	* - Make any adjustments necessary to regs->tnpc in order
	37	* to handle relative branches correctly. See below.
	38	* - Mark that we are no longer actively in a kprobe.
	39	*/
	40
f215d985 AM	41	DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
	42	DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
	43
05e14cb3	44	int __kprobes arch_prepare_kprobe(struct kprobe *p)
1da177e4 LT	45	{
	46	return 0;
	47	}
	48
05e14cb3	49	void __kprobes arch_copy_kprobe(struct kprobe *p)
1da177e4 LT	50	{
	51	p->ainsn.insn[0] = *p->addr;
	52	p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2;
7e1048b1 RL	53	p->opcode = *p->addr;
	54	}
	55
05e14cb3	56	void __kprobes arch_arm_kprobe(struct kprobe *p)
7e1048b1 RL	57	{
	58	*p->addr = BREAKPOINT_INSTRUCTION;
	59	flushi(p->addr);
	60	}
	61
05e14cb3	62	void __kprobes arch_disarm_kprobe(struct kprobe *p)
7e1048b1 RL	63	{
	64	*p->addr = p->opcode;
	65	flushi(p->addr);
1da177e4 LT	66	}
1da177e4 LT	67
05e14cb3	68	void __kprobes arch_remove_kprobe(struct kprobe *p)
1da177e4 LT	69	{
	70	}
	71
f215d985	72	static inline void save_previous_kprobe(struct kprobe_ctlblk *kcb)
e539c233	73	{
f215d985 AM	74	kcb->prev_kprobe.kp = kprobe_running();
	75	kcb->prev_kprobe.status = kcb->kprobe_status;
	76	kcb->prev_kprobe.orig_tnpc = kcb->kprobe_orig_tnpc;
	77	kcb->prev_kprobe.orig_tstate_pil = kcb->kprobe_orig_tstate_pil;
e539c233 PP	78	}
e539c233 PP	79
f215d985	80	static inline void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
e539c233	81	{
f215d985 AM	82	__get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp;
	83	kcb->kprobe_status = kcb->prev_kprobe.status;
	84	kcb->kprobe_orig_tnpc = kcb->prev_kprobe.orig_tnpc;
	85	kcb->kprobe_orig_tstate_pil = kcb->prev_kprobe.orig_tstate_pil;
e539c233 PP	86	}
e539c233 PP	87
f215d985 AM	88	static inline void set_current_kprobe(struct kprobe p, struct pt_regs regs,
f215d985 AM	89	struct kprobe_ctlblk *kcb)
1da177e4	90	{
f215d985 AM	91	__get_cpu_var(current_kprobe) = p;
	92	kcb->kprobe_orig_tnpc = regs->tnpc;
	93	kcb->kprobe_orig_tstate_pil = (regs->tstate & TSTATE_PIL);
e539c233 PP	94	}
e539c233 PP	95
f215d985 AM	96	static inline void prepare_singlestep(struct kprobe p, struct pt_regs regs,
f215d985 AM	97	struct kprobe_ctlblk *kcb)
e539c233	98	{
1da177e4 LT	99	regs->tstate \|= TSTATE_PIL;
	100
	101	/single step inline, if it a breakpoint instruction/
	102	if (p->opcode == BREAKPOINT_INSTRUCTION) {
	103	regs->tpc = (unsigned long) p->addr;
f215d985	104	regs->tnpc = kcb->kprobe_orig_tnpc;
1da177e4 LT	105	} else {
	106	regs->tpc = (unsigned long) &p->ainsn.insn[0];
	107	regs->tnpc = (unsigned long) &p->ainsn.insn[1];
	108	}
	109	}
	110
05e14cb3	111	static int __kprobes kprobe_handler(struct pt_regs *regs)
1da177e4 LT	112	{
	113	struct kprobe *p;
	114	void addr = (void ) regs->tpc;
	115	int ret = 0;
d217d545 AM	116	struct kprobe_ctlblk *kcb;
	117
	118	/*
	119	* We don't want to be preempted for the entire
	120	* duration of kprobe processing
	121	*/
	122	preempt_disable();
	123	kcb = get_kprobe_ctlblk();
1da177e4	124
1da177e4	125	if (kprobe_running()) {
1da177e4 LT	126	p = get_kprobe(addr);
1da177e4 LT	127	if (p) {
f215d985	128	if (kcb->kprobe_status == KPROBE_HIT_SS) {
1da177e4	129	regs->tstate = ((regs->tstate & ~TSTATE_PIL) \|
f215d985	130	kcb->kprobe_orig_tstate_pil);
1da177e4 LT	131	goto no_kprobe;
1da177e4 LT	132	}
e539c233 PP	133	/* We have reentered the kprobe_handler(), since
	134	* another probe was hit while within the handler.
	135	* We here save the original kprobes variables and
	136	* just single step on the instruction of the new probe
	137	* without calling any user handlers.
	138	*/
f215d985 AM	139	save_previous_kprobe(kcb);
f215d985 AM	140	set_current_kprobe(p, regs, kcb);
e539c233	141	p->nmissed++;
f215d985 AM	142	kcb->kprobe_status = KPROBE_REENTER;
f215d985 AM	143	prepare_singlestep(p, regs, kcb);
e539c233	144	return 1;
1da177e4	145	} else {
f215d985	146	p = __get_cpu_var(current_kprobe);
1da177e4 LT	147	if (p->break_handler && p->break_handler(p, regs))
	148	goto ss_probe;
	149	}
1da177e4 LT	150	goto no_kprobe;
	151	}
	152
1da177e4 LT	153	p = get_kprobe(addr);
1da177e4 LT	154	if (!p) {
1da177e4 LT	155	if ((u32 )addr != BREAKPOINT_INSTRUCTION) {
	156	/*
	157	* The breakpoint instruction was removed right
	158	* after we hit it. Another cpu has removed
	159	* either a probepoint or a debugger breakpoint
	160	* at this address. In either case, no further
	161	* handling of this interrupt is appropriate.
	162	*/
	163	ret = 1;
	164	}
	165	/* Not one of ours: let kernel handle it */
	166	goto no_kprobe;
	167	}
	168
f215d985 AM	169	set_current_kprobe(p, regs, kcb);
f215d985 AM	170	kcb->kprobe_status = KPROBE_HIT_ACTIVE;
1da177e4 LT	171	if (p->pre_handler && p->pre_handler(p, regs))
	172	return 1;
	173
	174	ss_probe:
f215d985 AM	175	prepare_singlestep(p, regs, kcb);
f215d985 AM	176	kcb->kprobe_status = KPROBE_HIT_SS;
1da177e4 LT	177	return 1;
	178
	179	no_kprobe:
d217d545	180	preempt_enable_no_resched();
1da177e4 LT	181	return ret;
	182	}
	183
	184	/* If INSN is a relative control transfer instruction,
	185	* return the corrected branch destination value.
	186	*
	187	* The original INSN location was REAL_PC, it actually
	188	* executed at PC and produced destination address NPC.
	189	*/
05e14cb3 PP	190	static unsigned long __kprobes relbranch_fixup(u32 insn, unsigned long real_pc,
	191	unsigned long pc,
	192	unsigned long npc)
1da177e4 LT	193	{
	194	/* Branch not taken, no mods necessary. */
	195	if (npc == pc + 0x4UL)
	196	return real_pc + 0x4UL;
	197
	198	/* The three cases are call, branch w/prediction,
	199	* and traditional branch.
	200	*/
	201	if ((insn & 0xc0000000) == 0x40000000 \|\|
	202	(insn & 0xc1c00000) == 0x00400000 \|\|
	203	(insn & 0xc1c00000) == 0x00800000) {
	204	/* The instruction did all the work for us
	205	* already, just apply the offset to the correct
	206	* instruction location.
	207	*/
	208	return (real_pc + (npc - pc));
	209	}
	210
	211	return real_pc + 0x4UL;
	212	}
	213
	214	/* If INSN is an instruction which writes it's PC location
	215	* into a destination register, fix that up.
	216	*/
05e14cb3 PP	217	static void __kprobes retpc_fixup(struct pt_regs *regs, u32 insn,
05e14cb3 PP	218	unsigned long real_pc)
1da177e4 LT	219	{
	220	unsigned long *slot = NULL;
	221
	222	/* Simplest cast is call, which always uses %o7 */
	223	if ((insn & 0xc0000000) == 0x40000000) {
	224	slot = &regs->u_regs[UREG_I7];
	225	}
	226
	227	/* Jmpl encodes the register inside of the opcode */
	228	if ((insn & 0xc1f80000) == 0x81c00000) {
	229	unsigned long rd = ((insn >> 25) & 0x1f);
	230
	231	if (rd <= 15) {
	232	slot = &regs->u_regs[rd];
	233	} else {
	234	/* Hard case, it goes onto the stack. */
	235	flushw_all();
	236
	237	rd -= 16;
	238	slot = (unsigned long *)
	239	(regs->u_regs[UREG_FP] + STACK_BIAS);
	240	slot += rd;
	241	}
	242	}
	243	if (slot != NULL)
	244	*slot = real_pc;
	245	}
	246
	247	/*
	248	* Called after single-stepping. p->addr is the address of the
	249	* instruction whose first byte has been replaced by the breakpoint
	250	* instruction. To avoid the SMP problems that can occur when we
	251	* temporarily put back the original opcode to single-step, we
	252	* single-stepped a copy of the instruction. The address of this
	253	* copy is p->ainsn.insn.
	254	*
	255	* This function prepares to return from the post-single-step
	256	* breakpoint trap.
	257	*/
f215d985 AM	258	static void __kprobes resume_execution(struct kprobe *p,
f215d985 AM	259	struct pt_regs regs, struct kprobe_ctlblk kcb)
1da177e4 LT	260	{
	261	u32 insn = p->ainsn.insn[0];
	262
f215d985	263	regs->tpc = kcb->kprobe_orig_tnpc;
1da177e4 LT	264	regs->tnpc = relbranch_fixup(insn,
	265	(unsigned long) p->addr,
	266	(unsigned long) &p->ainsn.insn[0],
	267	regs->tnpc);
	268	retpc_fixup(regs, insn, (unsigned long) p->addr);
	269
	270	regs->tstate = ((regs->tstate & ~TSTATE_PIL) \|
f215d985	271	kcb->kprobe_orig_tstate_pil);
1da177e4 LT	272	}
	273
	274	static inline int post_kprobe_handler(struct pt_regs *regs)
	275	{
f215d985 AM	276	struct kprobe *cur = kprobe_running();
	277	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
	278
	279	if (!cur)
1da177e4 LT	280	return 0;
1da177e4 LT	281
f215d985 AM	282	if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) {
	283	kcb->kprobe_status = KPROBE_HIT_SSDONE;
	284	cur->post_handler(cur, regs, 0);
e539c233	285	}
1da177e4	286
f215d985	287	resume_execution(cur, regs, kcb);
1da177e4	288
e539c233	289	/Restore back the original saved kprobes variables and continue. /
f215d985 AM	290	if (kcb->kprobe_status == KPROBE_REENTER) {
f215d985 AM	291	restore_previous_kprobe(kcb);
e539c233 PP	292	goto out;
e539c233 PP	293	}
f215d985	294	reset_current_kprobe();
e539c233	295	out:
1da177e4 LT	296	preempt_enable_no_resched();
	297
	298	return 1;
	299	}
	300
1da177e4 LT	301	static inline int kprobe_fault_handler(struct pt_regs *regs, int trapnr)
1da177e4 LT	302	{
f215d985 AM	303	struct kprobe *cur = kprobe_running();
	304	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
	305
	306	if (cur->fault_handler && cur->fault_handler(cur, regs, trapnr))
1da177e4 LT	307	return 1;
1da177e4 LT	308
f215d985 AM	309	if (kcb->kprobe_status & KPROBE_HIT_SS) {
f215d985 AM	310	resume_execution(cur, regs, kcb);
1da177e4	311
f215d985	312	reset_current_kprobe();
1da177e4 LT	313	preempt_enable_no_resched();
	314	}
	315	return 0;
	316	}
	317
	318	/*
	319	* Wrapper routine to for handling exceptions.
	320	*/
05e14cb3 PP	321	int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
05e14cb3 PP	322	unsigned long val, void *data)
1da177e4 LT	323	{
1da177e4 LT	324	struct die_args args = (struct die_args )data;
66ff2d06 AM	325	int ret = NOTIFY_DONE;
66ff2d06 AM	326
1da177e4 LT	327	switch (val) {
	328	case DIE_DEBUG:
	329	if (kprobe_handler(args->regs))
66ff2d06	330	ret = NOTIFY_STOP;
1da177e4 LT	331	break;
	332	case DIE_DEBUG_2:
	333	if (post_kprobe_handler(args->regs))
66ff2d06	334	ret = NOTIFY_STOP;
1da177e4 LT	335	break;
1da177e4 LT	336	case DIE_GPF:
1da177e4	337	case DIE_PAGE_FAULT:
d217d545 AM	338	/* kprobe_running() needs smp_processor_id() */
d217d545 AM	339	preempt_disable();
1da177e4 LT	340	if (kprobe_running() &&
1da177e4 LT	341	kprobe_fault_handler(args->regs, args->trapnr))
66ff2d06	342	ret = NOTIFY_STOP;
d217d545	343	preempt_enable();
1da177e4 LT	344	break;
	345	default:
	346	break;
	347	}
66ff2d06	348	return ret;
1da177e4 LT	349	}
1da177e4 LT	350
05e14cb3 PP	351	asmlinkage void __kprobes kprobe_trap(unsigned long trap_level,
05e14cb3 PP	352	struct pt_regs *regs)
1da177e4 LT	353	{
	354	BUG_ON(trap_level != 0x170 && trap_level != 0x171);
	355
	356	if (user_mode(regs)) {
	357	local_irq_enable();
	358	bad_trap(regs, trap_level);
	359	return;
	360	}
	361
	362	/* trap_level == 0x170 --> ta 0x70
	363	* trap_level == 0x171 --> ta 0x71
	364	*/
	365	if (notify_die((trap_level == 0x170) ? DIE_DEBUG : DIE_DEBUG_2,
	366	(trap_level == 0x170) ? "debug" : "debug_2",
	367	regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
	368	bad_trap(regs, trap_level);
	369	}
	370
	371	/* Jprobes support. */
05e14cb3	372	int __kprobes setjmp_pre_handler(struct kprobe p, struct pt_regs regs)
1da177e4 LT	373	{
1da177e4 LT	374	struct jprobe *jp = container_of(p, struct jprobe, kp);
f215d985	375	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
1da177e4	376
f215d985 AM	377	kcb->jprobe_saved_regs_location = regs;
f215d985 AM	378	memcpy(&(kcb->jprobe_saved_regs), regs, sizeof(*regs));
1da177e4 LT	379
	380	/* Save a whole stack frame, this gets arguments
	381	* pushed onto the stack after using up all the
	382	* arg registers.
	383	*/
f215d985	384	memcpy(&(kcb->jprobe_saved_stack),
1da177e4	385	(char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
f215d985	386	sizeof(kcb->jprobe_saved_stack));
1da177e4 LT	387
	388	regs->tpc = (unsigned long) jp->entry;
	389	regs->tnpc = ((unsigned long) jp->entry) + 0x4UL;
	390	regs->tstate \|= TSTATE_PIL;
	391
	392	return 1;
	393	}
	394
05e14cb3	395	void __kprobes jprobe_return(void)
1da177e4	396	{
1da177e4 LT	397	__asm__ __volatile__(
	398	".globl jprobe_return_trap_instruction\n"
	399	"jprobe_return_trap_instruction:\n\t"
	400	"ta 0x70");
	401	}
	402
	403	extern void jprobe_return_trap_instruction(void);
	404
	405	extern void __show_regs(struct pt_regs * regs);
	406
05e14cb3	407	int __kprobes longjmp_break_handler(struct kprobe p, struct pt_regs regs)
1da177e4 LT	408	{
1da177e4 LT	409	u32 addr = (u32 ) regs->tpc;
f215d985	410	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
1da177e4 LT	411
1da177e4 LT	412	if (addr == (u32 *) jprobe_return_trap_instruction) {
f215d985	413	if (kcb->jprobe_saved_regs_location != regs) {
1da177e4 LT	414	printk("JPROBE: Current regs (%p) does not match "
1da177e4 LT	415	"saved regs (%p).\n",
f215d985	416	regs, kcb->jprobe_saved_regs_location);
1da177e4	417	printk("JPROBE: Saved registers\n");
f215d985	418	__show_regs(kcb->jprobe_saved_regs_location);
1da177e4 LT	419	printk("JPROBE: Current registers\n");
	420	__show_regs(regs);
	421	BUG();
	422	}
	423	/* Restore old register state. Do pt_regs
	424	* first so that UREG_FP is the original one for
	425	* the stack frame restore.
	426	*/
f215d985	427	memcpy(regs, &(kcb->jprobe_saved_regs), sizeof(*regs));
1da177e4 LT	428
1da177e4 LT	429	memcpy((char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
f215d985 AM	430	&(kcb->jprobe_saved_stack),
f215d985 AM	431	sizeof(kcb->jprobe_saved_stack));
1da177e4	432
d217d545	433	preempt_enable_no_resched();
1da177e4 LT	434	return 1;
	435	}
	436	return 0;
	437	}
e539c233	438
6772926b RL	439	/* architecture specific initialization */
	440	int arch_init_kprobes(void)
	441	{
	442	return 0;
	443	}