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Commit | Line | Data |
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a2bd4fd1 DM |
1 | #include <linux/string.h> |
2 | #include <linux/kernel.h> | |
f85ff305 | 3 | #include <linux/of.h> |
a2bd4fd1 DM |
4 | #include <linux/init.h> |
5 | #include <linux/module.h> | |
6 | #include <linux/mod_devicetable.h> | |
7 | #include <linux/slab.h> | |
3f23de10 SR |
8 | #include <linux/errno.h> |
9 | #include <linux/of_device.h> | |
10 | #include <linux/of_platform.h> | |
a2bd4fd1 | 11 | |
3ca9fab4 DM |
12 | void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name) |
13 | { | |
14 | unsigned long ret = res->start + offset; | |
6bda5736 | 15 | struct resource *r; |
3ca9fab4 | 16 | |
6bda5736 DM |
17 | if (res->flags & IORESOURCE_MEM) |
18 | r = request_mem_region(ret, size, name); | |
19 | else | |
20 | r = request_region(ret, size, name); | |
21 | if (!r) | |
3ca9fab4 DM |
22 | ret = 0; |
23 | ||
24 | return (void __iomem *) ret; | |
25 | } | |
26 | EXPORT_SYMBOL(of_ioremap); | |
27 | ||
e3a411a3 | 28 | void of_iounmap(struct resource *res, void __iomem *base, unsigned long size) |
3ca9fab4 | 29 | { |
e3a411a3 DM |
30 | if (res->flags & IORESOURCE_MEM) |
31 | release_mem_region((unsigned long) base, size); | |
32 | else | |
33 | release_region((unsigned long) base, size); | |
3ca9fab4 DM |
34 | } |
35 | EXPORT_SYMBOL(of_iounmap); | |
36 | ||
2b1e5978 DM |
37 | static int node_match(struct device *dev, void *data) |
38 | { | |
39 | struct of_device *op = to_of_device(dev); | |
40 | struct device_node *dp = data; | |
41 | ||
42 | return (op->node == dp); | |
43 | } | |
44 | ||
45 | struct of_device *of_find_device_by_node(struct device_node *dp) | |
46 | { | |
37b7754a | 47 | struct device *dev = bus_find_device(&of_platform_bus_type, NULL, |
2b1e5978 DM |
48 | dp, node_match); |
49 | ||
50 | if (dev) | |
51 | return to_of_device(dev); | |
52 | ||
53 | return NULL; | |
54 | } | |
55 | EXPORT_SYMBOL(of_find_device_by_node); | |
56 | ||
a2bd4fd1 | 57 | #ifdef CONFIG_PCI |
3f23de10 | 58 | struct bus_type isa_bus_type; |
69853918 | 59 | EXPORT_SYMBOL(isa_bus_type); |
a2bd4fd1 | 60 | |
3f23de10 | 61 | struct bus_type ebus_bus_type; |
69853918 | 62 | EXPORT_SYMBOL(ebus_bus_type); |
a2bd4fd1 DM |
63 | #endif |
64 | ||
65 | #ifdef CONFIG_SBUS | |
3f23de10 | 66 | struct bus_type sbus_bus_type; |
69853918 | 67 | EXPORT_SYMBOL(sbus_bus_type); |
a2bd4fd1 DM |
68 | #endif |
69 | ||
3f23de10 | 70 | struct bus_type of_platform_bus_type; |
37b7754a | 71 | EXPORT_SYMBOL(of_platform_bus_type); |
cf44bbc2 | 72 | |
a83f9823 | 73 | static inline u64 of_read_addr(const u32 *cell, int size) |
cf44bbc2 DM |
74 | { |
75 | u64 r = 0; | |
76 | while (size--) | |
77 | r = (r << 32) | *(cell++); | |
78 | return r; | |
79 | } | |
80 | ||
81 | static void __init get_cells(struct device_node *dp, | |
82 | int *addrc, int *sizec) | |
83 | { | |
84 | if (addrc) | |
85 | *addrc = of_n_addr_cells(dp); | |
86 | if (sizec) | |
87 | *sizec = of_n_size_cells(dp); | |
88 | } | |
89 | ||
90 | /* Max address size we deal with */ | |
91 | #define OF_MAX_ADDR_CELLS 4 | |
92 | ||
93 | struct of_bus { | |
94 | const char *name; | |
95 | const char *addr_prop_name; | |
96 | int (*match)(struct device_node *parent); | |
97 | void (*count_cells)(struct device_node *child, | |
98 | int *addrc, int *sizec); | |
a83f9823 DM |
99 | int (*map)(u32 *addr, const u32 *range, |
100 | int na, int ns, int pna); | |
6a23acf3 | 101 | unsigned int (*get_flags)(const u32 *addr); |
cf44bbc2 DM |
102 | }; |
103 | ||
104 | /* | |
105 | * Default translator (generic bus) | |
106 | */ | |
107 | ||
108 | static void of_bus_default_count_cells(struct device_node *dev, | |
109 | int *addrc, int *sizec) | |
110 | { | |
111 | get_cells(dev, addrc, sizec); | |
112 | } | |
113 | ||
a83f9823 DM |
114 | /* Make sure the least significant 64-bits are in-range. Even |
115 | * for 3 or 4 cell values it is a good enough approximation. | |
116 | */ | |
117 | static int of_out_of_range(const u32 *addr, const u32 *base, | |
118 | const u32 *size, int na, int ns) | |
cf44bbc2 | 119 | { |
a83f9823 DM |
120 | u64 a = of_read_addr(addr, na); |
121 | u64 b = of_read_addr(base, na); | |
cf44bbc2 | 122 | |
a83f9823 DM |
123 | if (a < b) |
124 | return 1; | |
cf44bbc2 | 125 | |
a83f9823 DM |
126 | b += of_read_addr(size, ns); |
127 | if (a >= b) | |
128 | return 1; | |
129 | ||
130 | return 0; | |
cf44bbc2 DM |
131 | } |
132 | ||
a83f9823 DM |
133 | static int of_bus_default_map(u32 *addr, const u32 *range, |
134 | int na, int ns, int pna) | |
cf44bbc2 | 135 | { |
a83f9823 DM |
136 | u32 result[OF_MAX_ADDR_CELLS]; |
137 | int i; | |
138 | ||
139 | if (ns > 2) { | |
140 | printk("of_device: Cannot handle size cells (%d) > 2.", ns); | |
141 | return -EINVAL; | |
142 | } | |
143 | ||
144 | if (of_out_of_range(addr, range, range + na + pna, na, ns)) | |
145 | return -EINVAL; | |
146 | ||
147 | /* Start with the parent range base. */ | |
148 | memcpy(result, range + na, pna * 4); | |
149 | ||
150 | /* Add in the child address offset. */ | |
151 | for (i = 0; i < na; i++) | |
152 | result[pna - 1 - i] += | |
153 | (addr[na - 1 - i] - | |
154 | range[na - 1 - i]); | |
155 | ||
156 | memcpy(addr, result, pna * 4); | |
cf44bbc2 DM |
157 | |
158 | return 0; | |
159 | } | |
160 | ||
6a23acf3 | 161 | static unsigned int of_bus_default_get_flags(const u32 *addr) |
cf44bbc2 DM |
162 | { |
163 | return IORESOURCE_MEM; | |
164 | } | |
165 | ||
cf44bbc2 DM |
166 | /* |
167 | * PCI bus specific translator | |
168 | */ | |
169 | ||
170 | static int of_bus_pci_match(struct device_node *np) | |
171 | { | |
a83f9823 | 172 | if (!strcmp(np->type, "pci") || !strcmp(np->type, "pciex")) { |
a165b420 | 173 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
174 | |
175 | if (model && !strcmp(model, "SUNW,simba")) | |
176 | return 0; | |
177 | ||
a83f9823 DM |
178 | /* Do not do PCI specific frobbing if the |
179 | * PCI bridge lacks a ranges property. We | |
180 | * want to pass it through up to the next | |
181 | * parent as-is, not with the PCI translate | |
182 | * method which chops off the top address cell. | |
183 | */ | |
184 | if (!of_find_property(np, "ranges", NULL)) | |
185 | return 0; | |
186 | ||
187 | return 1; | |
188 | } | |
189 | ||
190 | return 0; | |
cf44bbc2 DM |
191 | } |
192 | ||
01f94c4a DM |
193 | static int of_bus_simba_match(struct device_node *np) |
194 | { | |
a165b420 | 195 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
196 | |
197 | if (model && !strcmp(model, "SUNW,simba")) | |
198 | return 1; | |
8c2786cf DM |
199 | |
200 | /* Treat PCI busses lacking ranges property just like | |
201 | * simba. | |
202 | */ | |
203 | if (!strcmp(np->type, "pci") || !strcmp(np->type, "pciex")) { | |
204 | if (!of_find_property(np, "ranges", NULL)) | |
205 | return 1; | |
206 | } | |
207 | ||
01f94c4a DM |
208 | return 0; |
209 | } | |
210 | ||
211 | static int of_bus_simba_map(u32 *addr, const u32 *range, | |
212 | int na, int ns, int pna) | |
213 | { | |
214 | return 0; | |
215 | } | |
216 | ||
cf44bbc2 DM |
217 | static void of_bus_pci_count_cells(struct device_node *np, |
218 | int *addrc, int *sizec) | |
219 | { | |
220 | if (addrc) | |
221 | *addrc = 3; | |
222 | if (sizec) | |
223 | *sizec = 2; | |
224 | } | |
225 | ||
a83f9823 DM |
226 | static int of_bus_pci_map(u32 *addr, const u32 *range, |
227 | int na, int ns, int pna) | |
cf44bbc2 | 228 | { |
a83f9823 DM |
229 | u32 result[OF_MAX_ADDR_CELLS]; |
230 | int i; | |
cf44bbc2 DM |
231 | |
232 | /* Check address type match */ | |
233 | if ((addr[0] ^ range[0]) & 0x03000000) | |
a83f9823 | 234 | return -EINVAL; |
cf44bbc2 | 235 | |
a83f9823 DM |
236 | if (of_out_of_range(addr + 1, range + 1, range + na + pna, |
237 | na - 1, ns)) | |
238 | return -EINVAL; | |
cf44bbc2 | 239 | |
a83f9823 DM |
240 | /* Start with the parent range base. */ |
241 | memcpy(result, range + na, pna * 4); | |
cf44bbc2 | 242 | |
a83f9823 DM |
243 | /* Add in the child address offset, skipping high cell. */ |
244 | for (i = 0; i < na - 1; i++) | |
245 | result[pna - 1 - i] += | |
246 | (addr[na - 1 - i] - | |
247 | range[na - 1 - i]); | |
248 | ||
249 | memcpy(addr, result, pna * 4); | |
250 | ||
251 | return 0; | |
cf44bbc2 DM |
252 | } |
253 | ||
6a23acf3 | 254 | static unsigned int of_bus_pci_get_flags(const u32 *addr) |
cf44bbc2 DM |
255 | { |
256 | unsigned int flags = 0; | |
257 | u32 w = addr[0]; | |
258 | ||
259 | switch((w >> 24) & 0x03) { | |
260 | case 0x01: | |
261 | flags |= IORESOURCE_IO; | |
262 | case 0x02: /* 32 bits */ | |
263 | case 0x03: /* 64 bits */ | |
264 | flags |= IORESOURCE_MEM; | |
265 | } | |
266 | if (w & 0x40000000) | |
267 | flags |= IORESOURCE_PREFETCH; | |
268 | return flags; | |
269 | } | |
270 | ||
cf44bbc2 DM |
271 | /* |
272 | * SBUS bus specific translator | |
273 | */ | |
274 | ||
275 | static int of_bus_sbus_match(struct device_node *np) | |
276 | { | |
277 | return !strcmp(np->name, "sbus") || | |
278 | !strcmp(np->name, "sbi"); | |
279 | } | |
280 | ||
281 | static void of_bus_sbus_count_cells(struct device_node *child, | |
282 | int *addrc, int *sizec) | |
283 | { | |
284 | if (addrc) | |
285 | *addrc = 2; | |
286 | if (sizec) | |
287 | *sizec = 1; | |
288 | } | |
289 | ||
4130a4b2 DM |
290 | /* |
291 | * FHC/Central bus specific translator. | |
292 | * | |
293 | * This is just needed to hard-code the address and size cell | |
294 | * counts. 'fhc' and 'central' nodes lack the #address-cells and | |
295 | * #size-cells properties, and if you walk to the root on such | |
296 | * Enterprise boxes all you'll get is a #size-cells of 2 which is | |
297 | * not what we want to use. | |
298 | */ | |
299 | static int of_bus_fhc_match(struct device_node *np) | |
cf44bbc2 | 300 | { |
4130a4b2 DM |
301 | return !strcmp(np->name, "fhc") || |
302 | !strcmp(np->name, "central"); | |
cf44bbc2 DM |
303 | } |
304 | ||
4130a4b2 | 305 | #define of_bus_fhc_count_cells of_bus_sbus_count_cells |
cf44bbc2 DM |
306 | |
307 | /* | |
308 | * Array of bus specific translators | |
309 | */ | |
310 | ||
311 | static struct of_bus of_busses[] = { | |
312 | /* PCI */ | |
313 | { | |
314 | .name = "pci", | |
315 | .addr_prop_name = "assigned-addresses", | |
316 | .match = of_bus_pci_match, | |
317 | .count_cells = of_bus_pci_count_cells, | |
318 | .map = of_bus_pci_map, | |
cf44bbc2 DM |
319 | .get_flags = of_bus_pci_get_flags, |
320 | }, | |
01f94c4a DM |
321 | /* SIMBA */ |
322 | { | |
323 | .name = "simba", | |
324 | .addr_prop_name = "assigned-addresses", | |
325 | .match = of_bus_simba_match, | |
326 | .count_cells = of_bus_pci_count_cells, | |
327 | .map = of_bus_simba_map, | |
328 | .get_flags = of_bus_pci_get_flags, | |
329 | }, | |
cf44bbc2 DM |
330 | /* SBUS */ |
331 | { | |
332 | .name = "sbus", | |
333 | .addr_prop_name = "reg", | |
334 | .match = of_bus_sbus_match, | |
335 | .count_cells = of_bus_sbus_count_cells, | |
4130a4b2 DM |
336 | .map = of_bus_default_map, |
337 | .get_flags = of_bus_default_get_flags, | |
338 | }, | |
339 | /* FHC */ | |
340 | { | |
341 | .name = "fhc", | |
342 | .addr_prop_name = "reg", | |
343 | .match = of_bus_fhc_match, | |
344 | .count_cells = of_bus_fhc_count_cells, | |
345 | .map = of_bus_default_map, | |
346 | .get_flags = of_bus_default_get_flags, | |
cf44bbc2 DM |
347 | }, |
348 | /* Default */ | |
349 | { | |
350 | .name = "default", | |
351 | .addr_prop_name = "reg", | |
352 | .match = NULL, | |
353 | .count_cells = of_bus_default_count_cells, | |
354 | .map = of_bus_default_map, | |
cf44bbc2 DM |
355 | .get_flags = of_bus_default_get_flags, |
356 | }, | |
357 | }; | |
358 | ||
359 | static struct of_bus *of_match_bus(struct device_node *np) | |
360 | { | |
361 | int i; | |
362 | ||
363 | for (i = 0; i < ARRAY_SIZE(of_busses); i ++) | |
364 | if (!of_busses[i].match || of_busses[i].match(np)) | |
365 | return &of_busses[i]; | |
366 | BUG(); | |
367 | return NULL; | |
368 | } | |
369 | ||
370 | static int __init build_one_resource(struct device_node *parent, | |
371 | struct of_bus *bus, | |
372 | struct of_bus *pbus, | |
373 | u32 *addr, | |
374 | int na, int ns, int pna) | |
375 | { | |
6a23acf3 | 376 | const u32 *ranges; |
cf44bbc2 DM |
377 | unsigned int rlen; |
378 | int rone; | |
cf44bbc2 DM |
379 | |
380 | ranges = of_get_property(parent, "ranges", &rlen); | |
381 | if (ranges == NULL || rlen == 0) { | |
a83f9823 DM |
382 | u32 result[OF_MAX_ADDR_CELLS]; |
383 | int i; | |
384 | ||
385 | memset(result, 0, pna * 4); | |
386 | for (i = 0; i < na; i++) | |
387 | result[pna - 1 - i] = | |
388 | addr[na - 1 - i]; | |
389 | ||
390 | memcpy(addr, result, pna * 4); | |
391 | return 0; | |
cf44bbc2 DM |
392 | } |
393 | ||
394 | /* Now walk through the ranges */ | |
395 | rlen /= 4; | |
396 | rone = na + pna + ns; | |
397 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
a83f9823 DM |
398 | if (!bus->map(addr, ranges, na, ns, pna)) |
399 | return 0; | |
cf44bbc2 | 400 | } |
a83f9823 | 401 | |
49d23cfc DM |
402 | /* When we miss an I/O space match on PCI, just pass it up |
403 | * to the next PCI bridge and/or controller. | |
404 | */ | |
405 | if (!strcmp(bus->name, "pci") && | |
406 | (addr[0] & 0x03000000) == 0x01000000) | |
407 | return 0; | |
408 | ||
a83f9823 DM |
409 | return 1; |
410 | } | |
411 | ||
412 | static int __init use_1to1_mapping(struct device_node *pp) | |
413 | { | |
a83f9823 DM |
414 | /* If this is on the PMU bus, don't try to translate it even |
415 | * if a ranges property exists. | |
416 | */ | |
417 | if (!strcmp(pp->name, "pmu")) | |
cf44bbc2 DM |
418 | return 1; |
419 | ||
a83f9823 DM |
420 | /* If we have a ranges property in the parent, use it. */ |
421 | if (of_find_property(pp, "ranges", NULL) != NULL) | |
422 | return 0; | |
cf44bbc2 | 423 | |
a83f9823 DM |
424 | /* If the parent is the dma node of an ISA bus, pass |
425 | * the translation up to the root. | |
426 | */ | |
427 | if (!strcmp(pp->name, "dma")) | |
428 | return 0; | |
429 | ||
8c2786cf DM |
430 | /* Similarly for all PCI bridges, if we get this far |
431 | * it lacks a ranges property, and this will include | |
432 | * cases like Simba. | |
433 | */ | |
434 | if (!strcmp(pp->type, "pci") || !strcmp(pp->type, "pciex")) | |
a83f9823 DM |
435 | return 0; |
436 | ||
437 | return 1; | |
cf44bbc2 DM |
438 | } |
439 | ||
a83f9823 DM |
440 | static int of_resource_verbose; |
441 | ||
cf44bbc2 DM |
442 | static void __init build_device_resources(struct of_device *op, |
443 | struct device *parent) | |
444 | { | |
445 | struct of_device *p_op; | |
446 | struct of_bus *bus; | |
447 | int na, ns; | |
448 | int index, num_reg; | |
6a23acf3 | 449 | const void *preg; |
cf44bbc2 DM |
450 | |
451 | if (!parent) | |
452 | return; | |
453 | ||
454 | p_op = to_of_device(parent); | |
455 | bus = of_match_bus(p_op->node); | |
456 | bus->count_cells(op->node, &na, &ns); | |
457 | ||
458 | preg = of_get_property(op->node, bus->addr_prop_name, &num_reg); | |
459 | if (!preg || num_reg == 0) | |
460 | return; | |
461 | ||
462 | /* Convert to num-cells. */ | |
463 | num_reg /= 4; | |
464 | ||
46ba6d7d | 465 | /* Convert to num-entries. */ |
cf44bbc2 DM |
466 | num_reg /= na + ns; |
467 | ||
e5dd42e4 | 468 | /* Prevent overrunning the op->resources[] array. */ |
46ba6d7d DM |
469 | if (num_reg > PROMREG_MAX) { |
470 | printk(KERN_WARNING "%s: Too many regs (%d), " | |
471 | "limiting to %d.\n", | |
472 | op->node->full_name, num_reg, PROMREG_MAX); | |
473 | num_reg = PROMREG_MAX; | |
474 | } | |
475 | ||
cf44bbc2 DM |
476 | for (index = 0; index < num_reg; index++) { |
477 | struct resource *r = &op->resource[index]; | |
478 | u32 addr[OF_MAX_ADDR_CELLS]; | |
6a23acf3 | 479 | const u32 *reg = (preg + (index * ((na + ns) * 4))); |
cf44bbc2 DM |
480 | struct device_node *dp = op->node; |
481 | struct device_node *pp = p_op->node; | |
b85cdd49 | 482 | struct of_bus *pbus, *dbus; |
cf44bbc2 DM |
483 | u64 size, result = OF_BAD_ADDR; |
484 | unsigned long flags; | |
485 | int dna, dns; | |
486 | int pna, pns; | |
487 | ||
488 | size = of_read_addr(reg + na, ns); | |
489 | flags = bus->get_flags(reg); | |
490 | ||
491 | memcpy(addr, reg, na * 4); | |
492 | ||
a83f9823 | 493 | if (use_1to1_mapping(pp)) { |
cf44bbc2 DM |
494 | result = of_read_addr(addr, na); |
495 | goto build_res; | |
496 | } | |
497 | ||
498 | dna = na; | |
499 | dns = ns; | |
b85cdd49 | 500 | dbus = bus; |
cf44bbc2 DM |
501 | |
502 | while (1) { | |
503 | dp = pp; | |
504 | pp = dp->parent; | |
505 | if (!pp) { | |
506 | result = of_read_addr(addr, dna); | |
507 | break; | |
508 | } | |
509 | ||
510 | pbus = of_match_bus(pp); | |
511 | pbus->count_cells(dp, &pna, &pns); | |
512 | ||
b85cdd49 | 513 | if (build_one_resource(dp, dbus, pbus, addr, |
a83f9823 | 514 | dna, dns, pna)) |
cf44bbc2 DM |
515 | break; |
516 | ||
517 | dna = pna; | |
518 | dns = pns; | |
b85cdd49 | 519 | dbus = pbus; |
cf44bbc2 DM |
520 | } |
521 | ||
522 | build_res: | |
523 | memset(r, 0, sizeof(*r)); | |
a83f9823 DM |
524 | |
525 | if (of_resource_verbose) | |
526 | printk("%s reg[%d] -> %lx\n", | |
527 | op->node->full_name, index, | |
528 | result); | |
529 | ||
cf44bbc2 | 530 | if (result != OF_BAD_ADDR) { |
1815aed5 DM |
531 | if (tlb_type == hypervisor) |
532 | result &= 0x0fffffffffffffffUL; | |
533 | ||
cf44bbc2 DM |
534 | r->start = result; |
535 | r->end = result + size - 1; | |
536 | r->flags = flags; | |
cf44bbc2 DM |
537 | } |
538 | r->name = op->node->name; | |
539 | } | |
540 | } | |
541 | ||
2b1e5978 DM |
542 | static struct device_node * __init |
543 | apply_interrupt_map(struct device_node *dp, struct device_node *pp, | |
6a23acf3 | 544 | const u32 *imap, int imlen, const u32 *imask, |
2b1e5978 DM |
545 | unsigned int *irq_p) |
546 | { | |
547 | struct device_node *cp; | |
548 | unsigned int irq = *irq_p; | |
549 | struct of_bus *bus; | |
550 | phandle handle; | |
6a23acf3 | 551 | const u32 *reg; |
2b1e5978 DM |
552 | int na, num_reg, i; |
553 | ||
554 | bus = of_match_bus(pp); | |
555 | bus->count_cells(dp, &na, NULL); | |
556 | ||
557 | reg = of_get_property(dp, "reg", &num_reg); | |
558 | if (!reg || !num_reg) | |
559 | return NULL; | |
560 | ||
561 | imlen /= ((na + 3) * 4); | |
562 | handle = 0; | |
563 | for (i = 0; i < imlen; i++) { | |
564 | int j; | |
565 | ||
566 | for (j = 0; j < na; j++) { | |
567 | if ((reg[j] & imask[j]) != imap[j]) | |
568 | goto next; | |
569 | } | |
570 | if (imap[na] == irq) { | |
571 | handle = imap[na + 1]; | |
572 | irq = imap[na + 2]; | |
573 | break; | |
574 | } | |
575 | ||
576 | next: | |
577 | imap += (na + 3); | |
578 | } | |
46ba6d7d DM |
579 | if (i == imlen) { |
580 | /* Psycho and Sabre PCI controllers can have 'interrupt-map' | |
581 | * properties that do not include the on-board device | |
582 | * interrupts. Instead, the device's 'interrupts' property | |
583 | * is already a fully specified INO value. | |
584 | * | |
585 | * Handle this by deciding that, if we didn't get a | |
586 | * match in the parent's 'interrupt-map', and the | |
587 | * parent is an IRQ translater, then use the parent as | |
588 | * our IRQ controller. | |
589 | */ | |
590 | if (pp->irq_trans) | |
591 | return pp; | |
592 | ||
2b1e5978 | 593 | return NULL; |
46ba6d7d | 594 | } |
2b1e5978 DM |
595 | |
596 | *irq_p = irq; | |
597 | cp = of_find_node_by_phandle(handle); | |
598 | ||
599 | return cp; | |
600 | } | |
601 | ||
602 | static unsigned int __init pci_irq_swizzle(struct device_node *dp, | |
603 | struct device_node *pp, | |
604 | unsigned int irq) | |
605 | { | |
6a23acf3 | 606 | const struct linux_prom_pci_registers *regs; |
bb4c18cb | 607 | unsigned int bus, devfn, slot, ret; |
2b1e5978 DM |
608 | |
609 | if (irq < 1 || irq > 4) | |
610 | return irq; | |
611 | ||
612 | regs = of_get_property(dp, "reg", NULL); | |
613 | if (!regs) | |
614 | return irq; | |
615 | ||
bb4c18cb | 616 | bus = (regs->phys_hi >> 16) & 0xff; |
2b1e5978 DM |
617 | devfn = (regs->phys_hi >> 8) & 0xff; |
618 | slot = (devfn >> 3) & 0x1f; | |
619 | ||
bb4c18cb DM |
620 | if (pp->irq_trans) { |
621 | /* Derived from Table 8-3, U2P User's Manual. This branch | |
622 | * is handling a PCI controller that lacks a proper set of | |
623 | * interrupt-map and interrupt-map-mask properties. The | |
624 | * Ultra-E450 is one example. | |
625 | * | |
626 | * The bit layout is BSSLL, where: | |
627 | * B: 0 on bus A, 1 on bus B | |
628 | * D: 2-bit slot number, derived from PCI device number as | |
629 | * (dev - 1) for bus A, or (dev - 2) for bus B | |
630 | * L: 2-bit line number | |
bb4c18cb DM |
631 | */ |
632 | if (bus & 0x80) { | |
633 | /* PBM-A */ | |
634 | bus = 0x00; | |
635 | slot = (slot - 1) << 2; | |
636 | } else { | |
637 | /* PBM-B */ | |
638 | bus = 0x10; | |
639 | slot = (slot - 2) << 2; | |
640 | } | |
641 | irq -= 1; | |
642 | ||
643 | ret = (bus | slot | irq); | |
644 | } else { | |
645 | /* Going through a PCI-PCI bridge that lacks a set of | |
646 | * interrupt-map and interrupt-map-mask properties. | |
647 | */ | |
648 | ret = ((irq - 1 + (slot & 3)) & 3) + 1; | |
649 | } | |
2b1e5978 DM |
650 | |
651 | return ret; | |
652 | } | |
653 | ||
a83f9823 DM |
654 | static int of_irq_verbose; |
655 | ||
2b1e5978 DM |
656 | static unsigned int __init build_one_device_irq(struct of_device *op, |
657 | struct device *parent, | |
658 | unsigned int irq) | |
659 | { | |
660 | struct device_node *dp = op->node; | |
661 | struct device_node *pp, *ip; | |
662 | unsigned int orig_irq = irq; | |
663 | ||
664 | if (irq == 0xffffffff) | |
665 | return irq; | |
666 | ||
667 | if (dp->irq_trans) { | |
668 | irq = dp->irq_trans->irq_build(dp, irq, | |
669 | dp->irq_trans->data); | |
a83f9823 DM |
670 | |
671 | if (of_irq_verbose) | |
672 | printk("%s: direct translate %x --> %x\n", | |
673 | dp->full_name, orig_irq, irq); | |
674 | ||
2b1e5978 DM |
675 | return irq; |
676 | } | |
677 | ||
678 | /* Something more complicated. Walk up to the root, applying | |
679 | * interrupt-map or bus specific translations, until we hit | |
680 | * an IRQ translator. | |
681 | * | |
682 | * If we hit a bus type or situation we cannot handle, we | |
683 | * stop and assume that the original IRQ number was in a | |
684 | * format which has special meaning to it's immediate parent. | |
685 | */ | |
686 | pp = dp->parent; | |
687 | ip = NULL; | |
688 | while (pp) { | |
6a23acf3 | 689 | const void *imap, *imsk; |
2b1e5978 DM |
690 | int imlen; |
691 | ||
692 | imap = of_get_property(pp, "interrupt-map", &imlen); | |
693 | imsk = of_get_property(pp, "interrupt-map-mask", NULL); | |
694 | if (imap && imsk) { | |
695 | struct device_node *iret; | |
696 | int this_orig_irq = irq; | |
697 | ||
698 | iret = apply_interrupt_map(dp, pp, | |
699 | imap, imlen, imsk, | |
700 | &irq); | |
a83f9823 DM |
701 | |
702 | if (of_irq_verbose) | |
703 | printk("%s: Apply [%s:%x] imap --> [%s:%x]\n", | |
704 | op->node->full_name, | |
705 | pp->full_name, this_orig_irq, | |
706 | (iret ? iret->full_name : "NULL"), irq); | |
707 | ||
2b1e5978 DM |
708 | if (!iret) |
709 | break; | |
710 | ||
711 | if (iret->irq_trans) { | |
712 | ip = iret; | |
713 | break; | |
714 | } | |
715 | } else { | |
716 | if (!strcmp(pp->type, "pci") || | |
717 | !strcmp(pp->type, "pciex")) { | |
718 | unsigned int this_orig_irq = irq; | |
719 | ||
720 | irq = pci_irq_swizzle(dp, pp, irq); | |
a83f9823 DM |
721 | if (of_irq_verbose) |
722 | printk("%s: PCI swizzle [%s] " | |
723 | "%x --> %x\n", | |
724 | op->node->full_name, | |
725 | pp->full_name, this_orig_irq, | |
726 | irq); | |
727 | ||
2b1e5978 DM |
728 | } |
729 | ||
730 | if (pp->irq_trans) { | |
731 | ip = pp; | |
732 | break; | |
733 | } | |
734 | } | |
735 | dp = pp; | |
736 | pp = pp->parent; | |
737 | } | |
738 | if (!ip) | |
739 | return orig_irq; | |
740 | ||
741 | irq = ip->irq_trans->irq_build(op->node, irq, | |
742 | ip->irq_trans->data); | |
a83f9823 DM |
743 | if (of_irq_verbose) |
744 | printk("%s: Apply IRQ trans [%s] %x --> %x\n", | |
745 | op->node->full_name, ip->full_name, orig_irq, irq); | |
2b1e5978 DM |
746 | |
747 | return irq; | |
748 | } | |
749 | ||
cf44bbc2 DM |
750 | static struct of_device * __init scan_one_device(struct device_node *dp, |
751 | struct device *parent) | |
752 | { | |
753 | struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL); | |
6a23acf3 | 754 | const unsigned int *irq; |
3d6e4702 | 755 | struct dev_archdata *sd; |
2b1e5978 | 756 | int len, i; |
cf44bbc2 DM |
757 | |
758 | if (!op) | |
759 | return NULL; | |
760 | ||
3d6e4702 DM |
761 | sd = &op->dev.archdata; |
762 | sd->prom_node = dp; | |
763 | sd->op = op; | |
764 | ||
cf44bbc2 DM |
765 | op->node = dp; |
766 | ||
767 | op->clock_freq = of_getintprop_default(dp, "clock-frequency", | |
768 | (25*1000*1000)); | |
769 | op->portid = of_getintprop_default(dp, "upa-portid", -1); | |
770 | if (op->portid == -1) | |
771 | op->portid = of_getintprop_default(dp, "portid", -1); | |
772 | ||
773 | irq = of_get_property(dp, "interrupts", &len); | |
2b1e5978 DM |
774 | if (irq) { |
775 | memcpy(op->irqs, irq, len); | |
776 | op->num_irqs = len / 4; | |
777 | } else { | |
778 | op->num_irqs = 0; | |
779 | } | |
cf44bbc2 | 780 | |
e5dd42e4 | 781 | /* Prevent overrunning the op->irqs[] array. */ |
46ba6d7d DM |
782 | if (op->num_irqs > PROMINTR_MAX) { |
783 | printk(KERN_WARNING "%s: Too many irqs (%d), " | |
784 | "limiting to %d.\n", | |
785 | dp->full_name, op->num_irqs, PROMINTR_MAX); | |
786 | op->num_irqs = PROMINTR_MAX; | |
787 | } | |
788 | ||
cf44bbc2 | 789 | build_device_resources(op, parent); |
2b1e5978 DM |
790 | for (i = 0; i < op->num_irqs; i++) |
791 | op->irqs[i] = build_one_device_irq(op, parent, op->irqs[i]); | |
cf44bbc2 DM |
792 | |
793 | op->dev.parent = parent; | |
37b7754a | 794 | op->dev.bus = &of_platform_bus_type; |
cf44bbc2 DM |
795 | if (!parent) |
796 | strcpy(op->dev.bus_id, "root"); | |
797 | else | |
f5ef9d11 | 798 | sprintf(op->dev.bus_id, "%08x", dp->node); |
cf44bbc2 DM |
799 | |
800 | if (of_device_register(op)) { | |
801 | printk("%s: Could not register of device.\n", | |
802 | dp->full_name); | |
803 | kfree(op); | |
804 | op = NULL; | |
805 | } | |
806 | ||
807 | return op; | |
808 | } | |
809 | ||
810 | static void __init scan_tree(struct device_node *dp, struct device *parent) | |
811 | { | |
812 | while (dp) { | |
813 | struct of_device *op = scan_one_device(dp, parent); | |
814 | ||
815 | if (op) | |
816 | scan_tree(dp->child, &op->dev); | |
817 | ||
818 | dp = dp->sibling; | |
819 | } | |
820 | } | |
821 | ||
822 | static void __init scan_of_devices(void) | |
823 | { | |
824 | struct device_node *root = of_find_node_by_path("/"); | |
825 | struct of_device *parent; | |
826 | ||
827 | parent = scan_one_device(root, NULL); | |
828 | if (!parent) | |
829 | return; | |
830 | ||
831 | scan_tree(root->child, &parent->dev); | |
832 | } | |
833 | ||
a2bd4fd1 DM |
834 | static int __init of_bus_driver_init(void) |
835 | { | |
cf44bbc2 | 836 | int err; |
a2bd4fd1 | 837 | |
3f23de10 | 838 | err = of_bus_type_init(&of_platform_bus_type, "of"); |
a2bd4fd1 DM |
839 | #ifdef CONFIG_PCI |
840 | if (!err) | |
3f23de10 | 841 | err = of_bus_type_init(&isa_bus_type, "isa"); |
a2bd4fd1 | 842 | if (!err) |
3f23de10 | 843 | err = of_bus_type_init(&ebus_bus_type, "ebus"); |
a2bd4fd1 DM |
844 | #endif |
845 | #ifdef CONFIG_SBUS | |
846 | if (!err) | |
3f23de10 | 847 | err = of_bus_type_init(&sbus_bus_type, "sbus"); |
a2bd4fd1 | 848 | #endif |
cf44bbc2 DM |
849 | |
850 | if (!err) | |
851 | scan_of_devices(); | |
852 | ||
853 | return err; | |
a2bd4fd1 DM |
854 | } |
855 | ||
856 | postcore_initcall(of_bus_driver_init); | |
857 | ||
a83f9823 DM |
858 | static int __init of_debug(char *str) |
859 | { | |
860 | int val = 0; | |
861 | ||
862 | get_option(&str, &val); | |
863 | if (val & 1) | |
864 | of_resource_verbose = 1; | |
865 | if (val & 2) | |
866 | of_irq_verbose = 1; | |
867 | return 1; | |
868 | } | |
869 | ||
870 | __setup("of_debug=", of_debug); |