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tile/time: Set ->min_delta_ticks and ->max_delta_ticks
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1/*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 *
14 * Support the cycle counter clocksource and tile timer clock event device.
15 */
16
17#include <linux/time.h>
18#include <linux/timex.h>
19#include <linux/clocksource.h>
20#include <linux/clockchips.h>
21#include <linux/hardirq.h>
22#include <linux/sched.h>
e6017571 23#include <linux/sched/clock.h>
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24#include <linux/smp.h>
25#include <linux/delay.h>
28d71741 26#include <linux/module.h>
4a556f4f 27#include <linux/timekeeper_internal.h>
867e359b 28#include <asm/irq_regs.h>
0707ad30 29#include <asm/traps.h>
4a556f4f 30#include <asm/vdso.h>
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31#include <hv/hypervisor.h>
32#include <arch/interrupts.h>
33#include <arch/spr_def.h>
34
35
36/*
37 * Define the cycle counter clock source.
38 */
39
40/* How many cycles per second we are running at. */
14e73e78 41static cycles_t cycles_per_sec __ro_after_init;
867e359b 42
0707ad30 43cycles_t get_clock_rate(void)
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44{
45 return cycles_per_sec;
46}
47
48#if CHIP_HAS_SPLIT_CYCLE()
0707ad30 49cycles_t get_cycles(void)
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50{
51 unsigned int high = __insn_mfspr(SPR_CYCLE_HIGH);
52 unsigned int low = __insn_mfspr(SPR_CYCLE_LOW);
53 unsigned int high2 = __insn_mfspr(SPR_CYCLE_HIGH);
54
55 while (unlikely(high != high2)) {
56 low = __insn_mfspr(SPR_CYCLE_LOW);
57 high = high2;
58 high2 = __insn_mfspr(SPR_CYCLE_HIGH);
59 }
60
61 return (((cycles_t)high) << 32) | low;
62}
28d71741 63EXPORT_SYMBOL(get_cycles);
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64#endif
65
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66/*
67 * We use a relatively small shift value so that sched_clock()
68 * won't wrap around very often.
69 */
70#define SCHED_CLOCK_SHIFT 10
71
14e73e78 72static unsigned long sched_clock_mult __ro_after_init;
749dc6f2 73
0707ad30 74static cycles_t clocksource_get_cycles(struct clocksource *cs)
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75{
76 return get_cycles();
77}
78
79static struct clocksource cycle_counter_cs = {
80 .name = "cycle counter",
81 .rating = 300,
82 .read = clocksource_get_cycles,
83 .mask = CLOCKSOURCE_MASK(64),
84 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
85};
86
87/*
88 * Called very early from setup_arch() to set cycles_per_sec.
89 * We initialize it early so we can use it to set up loops_per_jiffy.
90 */
91void __init setup_clock(void)
92{
93 cycles_per_sec = hv_sysconf(HV_SYSCONF_CPU_SPEED);
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94 sched_clock_mult =
95 clocksource_hz2mult(cycles_per_sec, SCHED_CLOCK_SHIFT);
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96}
97
98void __init calibrate_delay(void)
99{
100 loops_per_jiffy = get_clock_rate() / HZ;
101 pr_info("Clock rate yields %lu.%02lu BogoMIPS (lpj=%lu)\n",
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102 loops_per_jiffy / (500000 / HZ),
103 (loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy);
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104}
105
106/* Called fairly late in init/main.c, but before we go smp. */
107void __init time_init(void)
108{
109 /* Initialize and register the clock source. */
9f14517b 110 clocksource_register_hz(&cycle_counter_cs, cycles_per_sec);
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111
112 /* Start up the tile-timer interrupt source on the boot cpu. */
113 setup_tile_timer();
114}
115
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116/*
117 * Define the tile timer clock event device. The timer is driven by
118 * the TILE_TIMER_CONTROL register, which consists of a 31-bit down
119 * counter, plus bit 31, which signifies that the counter has wrapped
120 * from zero to (2**31) - 1. The INT_TILE_TIMER interrupt will be
121 * raised as long as bit 31 is set.
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122 *
123 * The TILE_MINSEC value represents the largest range of real-time
124 * we can possibly cover with the timer, based on MAX_TICK combined
125 * with the slowest reasonable clock rate we might run at.
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126 */
127
128#define MAX_TICK 0x7fffffff /* we have 31 bits of countdown timer */
749dc6f2 129#define TILE_MINSEC 5 /* timer covers no more than 5 seconds */
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130
131static int tile_timer_set_next_event(unsigned long ticks,
132 struct clock_event_device *evt)
133{
134 BUG_ON(ticks > MAX_TICK);
135 __insn_mtspr(SPR_TILE_TIMER_CONTROL, ticks);
5d966115 136 arch_local_irq_unmask_now(INT_TILE_TIMER);
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137 return 0;
138}
139
140/*
141 * Whenever anyone tries to change modes, we just mask interrupts
142 * and wait for the next event to get set.
143 */
38715df2 144static int tile_timer_shutdown(struct clock_event_device *evt)
867e359b 145{
5d966115 146 arch_local_irq_mask_now(INT_TILE_TIMER);
38715df2 147 return 0;
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148}
149
150/*
151 * Set min_delta_ns to 1 microsecond, since it takes about
152 * that long to fire the interrupt.
153 */
154static DEFINE_PER_CPU(struct clock_event_device, tile_timer) = {
155 .name = "tile timer",
156 .features = CLOCK_EVT_FEAT_ONESHOT,
157 .min_delta_ns = 1000,
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158 .min_delta_ticks = 1,
159 .max_delta_ticks = MAX_TICK,
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160 .rating = 100,
161 .irq = -1,
162 .set_next_event = tile_timer_set_next_event,
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163 .set_state_shutdown = tile_timer_shutdown,
164 .set_state_oneshot = tile_timer_shutdown,
165 .tick_resume = tile_timer_shutdown,
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166};
167
18f894c1 168void setup_tile_timer(void)
867e359b 169{
b4f50191 170 struct clock_event_device *evt = this_cpu_ptr(&tile_timer);
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171
172 /* Fill in fields that are speed-specific. */
173 clockevents_calc_mult_shift(evt, cycles_per_sec, TILE_MINSEC);
174 evt->max_delta_ns = clockevent_delta2ns(MAX_TICK, evt);
175
176 /* Mark as being for this cpu only. */
177 evt->cpumask = cpumask_of(smp_processor_id());
178
179 /* Start out with timer not firing. */
5d966115 180 arch_local_irq_mask_now(INT_TILE_TIMER);
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181
182 /* Register tile timer. */
183 clockevents_register_device(evt);
184}
185
186/* Called from the interrupt vector. */
187void do_timer_interrupt(struct pt_regs *regs, int fault_num)
188{
189 struct pt_regs *old_regs = set_irq_regs(regs);
b4f50191 190 struct clock_event_device *evt = this_cpu_ptr(&tile_timer);
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191
192 /*
193 * Mask the timer interrupt here, since we are a oneshot timer
194 * and there are now by definition no events pending.
195 */
5d966115 196 arch_local_irq_mask(INT_TILE_TIMER);
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197
198 /* Track time spent here in an interrupt context */
199 irq_enter();
200
201 /* Track interrupt count. */
b4f50191 202 __this_cpu_inc(irq_stat.irq_timer_count);
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203
204 /* Call the generic timer handler */
205 evt->event_handler(evt);
206
207 /*
208 * Track time spent against the current process again and
209 * process any softirqs if they are waiting.
210 */
211 irq_exit();
212
213 set_irq_regs(old_regs);
214}
215
216/*
217 * Scheduler clock - returns current time in nanosec units.
218 * Note that with LOCKDEP, this is called during lockdep_init(), and
219 * we will claim that sched_clock() is zero for a little while, until
220 * we run setup_clock(), above.
221 */
222unsigned long long sched_clock(void)
223{
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224 return mult_frac(get_cycles(),
225 sched_clock_mult, 1ULL << SCHED_CLOCK_SHIFT);
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226}
227
228int setup_profiling_timer(unsigned int multiplier)
229{
230 return -EINVAL;
231}
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232
233/*
234 * Use the tile timer to convert nsecs to core clock cycles, relying
235 * on it having the same frequency as SPR_CYCLE.
236 */
237cycles_t ns2cycles(unsigned long nsecs)
238{
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239 /*
240 * We do not have to disable preemption here as each core has the same
241 * clock frequency.
242 */
b4f50191 243 struct clock_event_device *dev = raw_cpu_ptr(&tile_timer);
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244
245 /*
246 * as in clocksource.h and x86's timer.h, we split the calculation
247 * into 2 parts to avoid unecessary overflow of the intermediate
248 * value. This will not lead to any loss of precision.
249 */
250 u64 quot = (u64)nsecs >> dev->shift;
251 u64 rem = (u64)nsecs & ((1ULL << dev->shift) - 1);
252 return quot * dev->mult + ((rem * dev->mult) >> dev->shift);
13371731 253}
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254
255void update_vsyscall_tz(void)
256{
94fb1afb 257 write_seqcount_begin(&vdso_data->tz_seq);
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258 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
259 vdso_data->tz_dsttime = sys_tz.tz_dsttime;
94fb1afb 260 write_seqcount_end(&vdso_data->tz_seq);
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261}
262
263void update_vsyscall(struct timekeeper *tk)
264{
876e7881 265 if (tk->tkr_mono.clock != &cycle_counter_cs)
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266 return;
267
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268 write_seqcount_begin(&vdso_data->tb_seq);
269
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270 vdso_data->cycle_last = tk->tkr_mono.cycle_last;
271 vdso_data->mask = tk->tkr_mono.mask;
272 vdso_data->mult = tk->tkr_mono.mult;
273 vdso_data->shift = tk->tkr_mono.shift;
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274
275 vdso_data->wall_time_sec = tk->xtime_sec;
876e7881 276 vdso_data->wall_time_snsec = tk->tkr_mono.xtime_nsec;
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277
278 vdso_data->monotonic_time_sec = tk->xtime_sec
279 + tk->wall_to_monotonic.tv_sec;
876e7881 280 vdso_data->monotonic_time_snsec = tk->tkr_mono.xtime_nsec
78410af5 281 + ((u64)tk->wall_to_monotonic.tv_nsec
876e7881 282 << tk->tkr_mono.shift);
78410af5 283 while (vdso_data->monotonic_time_snsec >=
876e7881 284 (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) {
78410af5 285 vdso_data->monotonic_time_snsec -=
876e7881 286 ((u64)NSEC_PER_SEC) << tk->tkr_mono.shift;
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287 vdso_data->monotonic_time_sec++;
288 }
289
290 vdso_data->wall_time_coarse_sec = tk->xtime_sec;
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291 vdso_data->wall_time_coarse_nsec = (long)(tk->tkr_mono.xtime_nsec >>
292 tk->tkr_mono.shift);
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293
294 vdso_data->monotonic_time_coarse_sec =
295 vdso_data->wall_time_coarse_sec + tk->wall_to_monotonic.tv_sec;
296 vdso_data->monotonic_time_coarse_nsec =
297 vdso_data->wall_time_coarse_nsec + tk->wall_to_monotonic.tv_nsec;
298
299 while (vdso_data->monotonic_time_coarse_nsec >= NSEC_PER_SEC) {
300 vdso_data->monotonic_time_coarse_nsec -= NSEC_PER_SEC;
301 vdso_data->monotonic_time_coarse_sec++;
302 }
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303
304 write_seqcount_end(&vdso_data->tb_seq);
4a556f4f 305}