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Commit | Line | Data |
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85977376 PBG |
1 | menu "Host processor type and features" |
2 | ||
7a78a172 | 3 | source "arch/x86/Kconfig.cpu" |
85977376 PBG |
4 | |
5 | endmenu | |
6 | ||
c45166be PBG |
7 | config UML_X86 |
8 | bool | |
9 | default y | |
10 | ||
54d67ee2 JD |
11 | config X86_32 |
12 | bool | |
13 | default y | |
14 | ||
15 | config RWSEM_XCHGADD_ALGORITHM | |
16 | def_bool y | |
17 | ||
c45166be | 18 | config 64BIT |
1da177e4 LT |
19 | bool |
20 | default n | |
21 | ||
1da177e4 | 22 | config 3_LEVEL_PGTABLES |
ce2d2aed | 23 | bool "Three-level pagetables (EXPERIMENTAL)" |
1da177e4 | 24 | default n |
ce2d2aed | 25 | depends on EXPERIMENTAL |
1da177e4 LT |
26 | help |
27 | Three-level pagetables will let UML have more than 4G of physical | |
28 | memory. All the memory that can't be mapped directly will be treated | |
29 | as high memory. | |
30 | ||
ce2d2aed PBG |
31 | However, this it experimental on 32-bit architectures, so if unsure say |
32 | N (on x86-64 it's automatically enabled, instead, as it's safe there). | |
33 | ||
1da177e4 LT |
34 | config ARCH_HAS_SC_SIGNALS |
35 | bool | |
36 | default y | |
37 | ||
38 | config ARCH_REUSE_HOST_VSYSCALL_AREA | |
39 | bool | |
40 | default y | |
f214ef3e AM |
41 | |
42 | config GENERIC_HWEIGHT | |
43 | bool | |
44 | default y | |
45 | ||
b0b933c0 DH |
46 | config ARCH_SUPPORTS_AOUT |
47 | def_bool y |