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d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
96cf5185 G |
2 | /* |
3 | * linux/arch/unicore32/include/asm/io.h | |
4 | * | |
5 | * Code specific to PKUnity SoC and UniCore ISA | |
6 | * | |
7 | * Copyright (C) 2001-2010 GUAN Xue-tao | |
96cf5185 G |
8 | */ |
9 | #ifndef __UNICORE_IO_H__ | |
10 | #define __UNICORE_IO_H__ | |
11 | ||
12 | #ifdef __KERNEL__ | |
13 | ||
14 | #include <asm/byteorder.h> | |
15 | #include <asm/memory.h> | |
96cf5185 | 16 | |
1cf46c42 | 17 | #define PCI_IOBASE PKUNITY_PCILIO_BASE |
96cf5185 G |
18 | #include <asm-generic/io.h> |
19 | ||
20 | /* | |
21 | * __uc32_ioremap and __uc32_ioremap_cached takes CPU physical address. | |
22 | */ | |
23 | extern void __iomem *__uc32_ioremap(unsigned long, size_t); | |
24 | extern void __iomem *__uc32_ioremap_cached(unsigned long, size_t); | |
25 | extern void __uc32_iounmap(volatile void __iomem *addr); | |
26 | ||
27 | /* | |
28 | * ioremap and friends. | |
29 | * | |
30 | * ioremap takes a PCI memory address, as specified in | |
395cf969 | 31 | * Documentation/io-mapping.txt. |
96cf5185 G |
32 | * |
33 | */ | |
34 | #define ioremap(cookie, size) __uc32_ioremap(cookie, size) | |
35 | #define ioremap_cached(cookie, size) __uc32_ioremap_cached(cookie, size) | |
a50e4213 | 36 | #define ioremap_nocache(cookie, size) __uc32_ioremap(cookie, size) |
96cf5185 G |
37 | #define iounmap(cookie) __uc32_iounmap(cookie) |
38 | ||
312c6df4 CG |
39 | #define readb_relaxed readb |
40 | #define readw_relaxed readw | |
41 | #define readl_relaxed readl | |
42 | ||
4fde87cb G |
43 | #define HAVE_ARCH_PIO_SIZE |
44 | #define PIO_OFFSET (unsigned int)(PCI_IOBASE) | |
45 | #define PIO_MASK (unsigned int)(IO_SPACE_LIMIT) | |
46 | #define PIO_RESERVED (PIO_OFFSET + PIO_MASK + 1) | |
47 | ||
8a016596 CG |
48 | #ifdef CONFIG_STRICT_DEVMEM |
49 | ||
50 | #include <linux/ioport.h> | |
51 | #include <linux/mm.h> | |
52 | ||
53 | /* | |
54 | * devmem_is_allowed() checks to see if /dev/mem access to a certain | |
55 | * address is valid. The argument is a physical page number. | |
56 | * We mimic x86 here by disallowing access to system RAM as well as | |
57 | * device-exclusive MMIO regions. This effectively disable read()/write() | |
58 | * on /dev/mem. | |
59 | */ | |
60 | static inline int devmem_is_allowed(unsigned long pfn) | |
61 | { | |
62 | if (iomem_is_exclusive(pfn << PAGE_SHIFT)) | |
63 | return 0; | |
64 | if (!page_is_ram(pfn)) | |
65 | return 1; | |
66 | return 0; | |
67 | } | |
68 | ||
69 | #endif /* CONFIG_STRICT_DEVMEM */ | |
70 | ||
96cf5185 G |
71 | #endif /* __KERNEL__ */ |
72 | #endif /* __UNICORE_IO_H__ */ |