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f73670e8 G |
1 | /* |
2 | * linux/arch/unicore32/kernel/process.c | |
3 | * | |
4 | * Code specific to PKUnity SoC and UniCore ISA | |
5 | * | |
6 | * Copyright (C) 2001-2010 GUAN Xue-tao | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | #include <stdarg.h> | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/sched.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/mm.h> | |
18 | #include <linux/stddef.h> | |
19 | #include <linux/unistd.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/reboot.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/kallsyms.h> | |
24 | #include <linux/init.h> | |
25 | #include <linux/cpu.h> | |
26 | #include <linux/elfcore.h> | |
27 | #include <linux/pm.h> | |
28 | #include <linux/tick.h> | |
29 | #include <linux/utsname.h> | |
30 | #include <linux/uaccess.h> | |
31 | #include <linux/random.h> | |
32 | #include <linux/gpio.h> | |
33 | #include <linux/stacktrace.h> | |
34 | ||
35 | #include <asm/cacheflush.h> | |
36 | #include <asm/processor.h> | |
f73670e8 G |
37 | #include <asm/stacktrace.h> |
38 | ||
39 | #include "setup.h" | |
40 | ||
41 | static const char * const processor_modes[] = { | |
42 | "UK00", "UK01", "UK02", "UK03", "UK04", "UK05", "UK06", "UK07", | |
43 | "UK08", "UK09", "UK0A", "UK0B", "UK0C", "UK0D", "UK0E", "UK0F", | |
44 | "USER", "REAL", "INTR", "PRIV", "UK14", "UK15", "UK16", "ABRT", | |
45 | "UK18", "UK19", "UK1A", "EXTN", "UK1C", "UK1D", "UK1E", "SUSR" | |
46 | }; | |
47 | ||
aba92c9e | 48 | void arch_cpu_idle(void) |
f73670e8 | 49 | { |
aba92c9e TG |
50 | cpu_do_idle(); |
51 | local_irq_enable(); | |
f73670e8 G |
52 | } |
53 | ||
f73670e8 G |
54 | void machine_halt(void) |
55 | { | |
56 | gpio_set_value(GPO_SOFT_OFF, 0); | |
57 | } | |
58 | ||
59 | /* | |
60 | * Function pointers to optional machine specific functions | |
61 | */ | |
62 | void (*pm_power_off)(void) = NULL; | |
3420d49d | 63 | EXPORT_SYMBOL(pm_power_off); |
f73670e8 G |
64 | |
65 | void machine_power_off(void) | |
66 | { | |
67 | if (pm_power_off) | |
68 | pm_power_off(); | |
69 | machine_halt(); | |
70 | } | |
71 | ||
72 | void machine_restart(char *cmd) | |
73 | { | |
74 | /* Disable interrupts first */ | |
75 | local_irq_disable(); | |
76 | ||
77 | /* | |
78 | * Tell the mm system that we are going to reboot - | |
79 | * we may need it to insert some 1:1 mappings so that | |
80 | * soft boot works. | |
81 | */ | |
c97a7008 | 82 | setup_mm_for_reboot(); |
f73670e8 G |
83 | |
84 | /* Clean and invalidate caches */ | |
85 | flush_cache_all(); | |
86 | ||
87 | /* Turn off caching */ | |
88 | cpu_proc_fin(); | |
89 | ||
90 | /* Push out any further dirty data, and ensure cache is empty */ | |
91 | flush_cache_all(); | |
92 | ||
93 | /* | |
94 | * Now handle reboot code. | |
95 | */ | |
c97a7008 | 96 | if (reboot_mode == REBOOT_SOFT) { |
f73670e8 G |
97 | /* Jump into ROM at address 0xffff0000 */ |
98 | cpu_reset(VECTORS_BASE); | |
99 | } else { | |
e5abf78b G |
100 | writel(0x00002001, PM_PLLSYSCFG); /* cpu clk = 250M */ |
101 | writel(0x00100800, PM_PLLDDRCFG); /* ddr clk = 44M */ | |
102 | writel(0x00002001, PM_PLLVGACFG); /* vga clk = 250M */ | |
f73670e8 G |
103 | |
104 | /* Use on-chip reset capability */ | |
105 | /* following instructions must be in one icache line */ | |
106 | __asm__ __volatile__( | |
107 | " .align 5\n\t" | |
108 | " stw %1, [%0]\n\t" | |
109 | "201: ldw r0, [%0]\n\t" | |
110 | " cmpsub.a r0, #0\n\t" | |
111 | " bne 201b\n\t" | |
112 | " stw %3, [%2]\n\t" | |
113 | " nop; nop; nop\n\t" | |
114 | /* prefetch 3 instructions at most */ | |
115 | : | |
e5abf78b | 116 | : "r" (PM_PMCR), |
f73670e8 G |
117 | "r" (PM_PMCR_CFBSYS | PM_PMCR_CFBDDR |
118 | | PM_PMCR_CFBVGA), | |
e5abf78b | 119 | "r" (RESETC_SWRR), |
f73670e8 G |
120 | "r" (RESETC_SWRR_SRB) |
121 | : "r0", "memory"); | |
122 | } | |
123 | ||
124 | /* | |
125 | * Whoops - the architecture was unable to reboot. | |
126 | * Tell the user! | |
127 | */ | |
128 | mdelay(1000); | |
129 | printk(KERN_EMERG "Reboot failed -- System halted\n"); | |
130 | do { } while (1); | |
131 | } | |
132 | ||
133 | void __show_regs(struct pt_regs *regs) | |
134 | { | |
135 | unsigned long flags; | |
136 | char buf[64]; | |
137 | ||
a43cb95d | 138 | show_regs_print_info(KERN_DEFAULT); |
f73670e8 G |
139 | print_symbol("PC is at %s\n", instruction_pointer(regs)); |
140 | print_symbol("LR is at %s\n", regs->UCreg_lr); | |
141 | printk(KERN_DEFAULT "pc : [<%08lx>] lr : [<%08lx>] psr: %08lx\n" | |
142 | "sp : %08lx ip : %08lx fp : %08lx\n", | |
143 | regs->UCreg_pc, regs->UCreg_lr, regs->UCreg_asr, | |
144 | regs->UCreg_sp, regs->UCreg_ip, regs->UCreg_fp); | |
145 | printk(KERN_DEFAULT "r26: %08lx r25: %08lx r24: %08lx\n", | |
146 | regs->UCreg_26, regs->UCreg_25, | |
147 | regs->UCreg_24); | |
148 | printk(KERN_DEFAULT "r23: %08lx r22: %08lx r21: %08lx r20: %08lx\n", | |
149 | regs->UCreg_23, regs->UCreg_22, | |
150 | regs->UCreg_21, regs->UCreg_20); | |
151 | printk(KERN_DEFAULT "r19: %08lx r18: %08lx r17: %08lx r16: %08lx\n", | |
152 | regs->UCreg_19, regs->UCreg_18, | |
153 | regs->UCreg_17, regs->UCreg_16); | |
154 | printk(KERN_DEFAULT "r15: %08lx r14: %08lx r13: %08lx r12: %08lx\n", | |
155 | regs->UCreg_15, regs->UCreg_14, | |
156 | regs->UCreg_13, regs->UCreg_12); | |
157 | printk(KERN_DEFAULT "r11: %08lx r10: %08lx r9 : %08lx r8 : %08lx\n", | |
158 | regs->UCreg_11, regs->UCreg_10, | |
159 | regs->UCreg_09, regs->UCreg_08); | |
160 | printk(KERN_DEFAULT "r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n", | |
161 | regs->UCreg_07, regs->UCreg_06, | |
162 | regs->UCreg_05, regs->UCreg_04); | |
163 | printk(KERN_DEFAULT "r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n", | |
164 | regs->UCreg_03, regs->UCreg_02, | |
165 | regs->UCreg_01, regs->UCreg_00); | |
166 | ||
167 | flags = regs->UCreg_asr; | |
168 | buf[0] = flags & PSR_S_BIT ? 'S' : 's'; | |
169 | buf[1] = flags & PSR_Z_BIT ? 'Z' : 'z'; | |
170 | buf[2] = flags & PSR_C_BIT ? 'C' : 'c'; | |
171 | buf[3] = flags & PSR_V_BIT ? 'V' : 'v'; | |
172 | buf[4] = '\0'; | |
173 | ||
174 | printk(KERN_DEFAULT "Flags: %s INTR o%s REAL o%s Mode %s Segment %s\n", | |
175 | buf, interrupts_enabled(regs) ? "n" : "ff", | |
176 | fast_interrupts_enabled(regs) ? "n" : "ff", | |
177 | processor_modes[processor_mode(regs)], | |
178 | segment_eq(get_fs(), get_ds()) ? "kernel" : "user"); | |
179 | { | |
180 | unsigned int ctrl; | |
181 | ||
182 | buf[0] = '\0'; | |
183 | { | |
184 | unsigned int transbase; | |
185 | asm("movc %0, p0.c2, #0\n" | |
186 | : "=r" (transbase)); | |
187 | snprintf(buf, sizeof(buf), " Table: %08x", transbase); | |
188 | } | |
189 | asm("movc %0, p0.c1, #0\n" : "=r" (ctrl)); | |
190 | ||
191 | printk(KERN_DEFAULT "Control: %08x%s\n", ctrl, buf); | |
192 | } | |
193 | } | |
194 | ||
195 | void show_regs(struct pt_regs *regs) | |
196 | { | |
197 | printk(KERN_DEFAULT "\n"); | |
198 | printk(KERN_DEFAULT "Pid: %d, comm: %20s\n", | |
199 | task_pid_nr(current), current->comm); | |
200 | __show_regs(regs); | |
201 | __backtrace(); | |
202 | } | |
203 | ||
f73670e8 G |
204 | void flush_thread(void) |
205 | { | |
206 | struct thread_info *thread = current_thread_info(); | |
207 | struct task_struct *tsk = current; | |
208 | ||
209 | memset(thread->used_cp, 0, sizeof(thread->used_cp)); | |
210 | memset(&tsk->thread.debug, 0, sizeof(struct debug_info)); | |
211 | #ifdef CONFIG_UNICORE_FPU_F64 | |
212 | memset(&thread->fpstate, 0, sizeof(struct fp_state)); | |
213 | #endif | |
214 | } | |
215 | ||
216 | void release_thread(struct task_struct *dead_task) | |
217 | { | |
218 | } | |
219 | ||
220 | asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); | |
38e99353 | 221 | asmlinkage void ret_from_kernel_thread(void) __asm__("ret_from_kernel_thread"); |
f73670e8 G |
222 | |
223 | int | |
224 | copy_thread(unsigned long clone_flags, unsigned long stack_start, | |
afa86fc4 | 225 | unsigned long stk_sz, struct task_struct *p) |
f73670e8 G |
226 | { |
227 | struct thread_info *thread = task_thread_info(p); | |
228 | struct pt_regs *childregs = task_pt_regs(p); | |
229 | ||
f73670e8 G |
230 | memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save)); |
231 | thread->cpu_context.sp = (unsigned long)childregs; | |
cb562173 | 232 | if (unlikely(p->flags & PF_KTHREAD)) { |
38e99353 AV |
233 | thread->cpu_context.pc = (unsigned long)ret_from_kernel_thread; |
234 | thread->cpu_context.r4 = stack_start; | |
235 | thread->cpu_context.r5 = stk_sz; | |
236 | memset(childregs, 0, sizeof(struct pt_regs)); | |
237 | } else { | |
238 | thread->cpu_context.pc = (unsigned long)ret_from_fork; | |
cb562173 | 239 | *childregs = *current_pt_regs(); |
38e99353 | 240 | childregs->UCreg_00 = 0; |
cb562173 AV |
241 | if (stack_start) |
242 | childregs->UCreg_sp = stack_start; | |
f73670e8 | 243 | |
38e99353 | 244 | if (clone_flags & CLONE_SETTLS) |
cb562173 | 245 | childregs->UCreg_16 = childregs->UCreg_03; |
38e99353 | 246 | } |
f73670e8 G |
247 | return 0; |
248 | } | |
249 | ||
250 | /* | |
251 | * Fill in the task's elfregs structure for a core dump. | |
252 | */ | |
253 | int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs) | |
254 | { | |
255 | elf_core_copy_regs(elfregs, task_pt_regs(t)); | |
256 | return 1; | |
257 | } | |
258 | ||
259 | /* | |
260 | * fill in the fpe structure for a core dump... | |
261 | */ | |
262 | int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fp) | |
263 | { | |
264 | struct thread_info *thread = current_thread_info(); | |
265 | int used_math = thread->used_cp[1] | thread->used_cp[2]; | |
266 | ||
267 | #ifdef CONFIG_UNICORE_FPU_F64 | |
268 | if (used_math) | |
269 | memcpy(fp, &thread->fpstate, sizeof(*fp)); | |
270 | #endif | |
271 | return used_math != 0; | |
272 | } | |
273 | EXPORT_SYMBOL(dump_fpu); | |
274 | ||
f73670e8 G |
275 | unsigned long get_wchan(struct task_struct *p) |
276 | { | |
277 | struct stackframe frame; | |
278 | int count = 0; | |
279 | if (!p || p == current || p->state == TASK_RUNNING) | |
280 | return 0; | |
281 | ||
282 | frame.fp = thread_saved_fp(p); | |
283 | frame.sp = thread_saved_sp(p); | |
284 | frame.lr = 0; /* recovered from the stack */ | |
285 | frame.pc = thread_saved_pc(p); | |
286 | do { | |
287 | int ret = unwind_frame(&frame); | |
288 | if (ret < 0) | |
289 | return 0; | |
290 | if (!in_sched_functions(frame.pc)) | |
291 | return frame.pc; | |
292 | } while ((count++) < 16); | |
293 | return 0; | |
294 | } | |
295 | ||
296 | unsigned long arch_randomize_brk(struct mm_struct *mm) | |
297 | { | |
298 | unsigned long range_end = mm->brk + 0x02000000; | |
299 | return randomize_range(mm->brk, range_end, 0) ? : mm->brk; | |
300 | } | |
301 | ||
302 | /* | |
303 | * The vectors page is always readable from user space for the | |
304 | * atomic helpers and the signal restart code. Let's declare a mapping | |
305 | * for it so it is visible through ptrace and /proc/<pid>/mem. | |
306 | */ | |
307 | ||
308 | int vectors_user_mapping(void) | |
309 | { | |
310 | struct mm_struct *mm = current->mm; | |
311 | return install_special_mapping(mm, 0xffff0000, PAGE_SIZE, | |
312 | VM_READ | VM_EXEC | | |
313 | VM_MAYREAD | VM_MAYEXEC | | |
314e51b9 | 314 | VM_DONTEXPAND | VM_DONTDUMP, |
f73670e8 G |
315 | NULL); |
316 | } | |
317 | ||
318 | const char *arch_vma_name(struct vm_area_struct *vma) | |
319 | { | |
320 | return (vma->vm_start == 0xffff0000) ? "[vectors]" : NULL; | |
321 | } |