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1da177e4 LT |
1 | /* |
2 | * arch/v850/kernel/rte_ma1_cb.c -- Midas labs RTE-V850E/MA1-CB board | |
3 | * | |
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | |
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General | |
8 | * Public License. See the file COPYING in the main directory of this | |
9 | * archive for more details. | |
10 | * | |
11 | * Written by Miles Bader <miles@gnu.org> | |
12 | */ | |
13 | ||
1da177e4 LT |
14 | #include <linux/kernel.h> |
15 | #include <linux/init.h> | |
16 | #include <linux/bootmem.h> | |
17 | ||
18 | #include <asm/atomic.h> | |
19 | #include <asm/page.h> | |
20 | #include <asm/ma1.h> | |
21 | #include <asm/rte_ma1_cb.h> | |
22 | #include <asm/v850e_timer_c.h> | |
23 | ||
24 | #include "mach.h" | |
25 | ||
26 | ||
27 | /* SRAM and SDRAM are almost contiguous (with a small hole in between; | |
28 | see mach_reserve_bootmem for details), so just use both as one big area. */ | |
29 | #define RAM_START SRAM_ADDR | |
30 | #define RAM_END (SDRAM_ADDR + SDRAM_SIZE) | |
31 | ||
32 | ||
33 | void __init mach_early_init (void) | |
34 | { | |
35 | rte_cb_early_init (); | |
36 | } | |
37 | ||
38 | void __init mach_get_physical_ram (unsigned long *ram_start, | |
39 | unsigned long *ram_len) | |
40 | { | |
41 | *ram_start = RAM_START; | |
42 | *ram_len = RAM_END - RAM_START; | |
43 | } | |
44 | ||
45 | void __init mach_reserve_bootmem () | |
46 | { | |
47 | #ifdef CONFIG_RTE_CB_MULTI | |
48 | /* Prevent the kernel from touching the monitor's scratch RAM. */ | |
49 | reserve_bootmem (MON_SCRATCH_ADDR, MON_SCRATCH_SIZE); | |
50 | #endif | |
51 | ||
52 | /* The space between SRAM and SDRAM is filled with duplicate | |
53 | images of SRAM. Prevent the kernel from using them. */ | |
54 | reserve_bootmem (SRAM_ADDR + SRAM_SIZE, | |
55 | SDRAM_ADDR - (SRAM_ADDR + SRAM_SIZE)); | |
56 | } | |
57 | ||
58 | void mach_gettimeofday (struct timespec *tv) | |
59 | { | |
60 | tv->tv_sec = 0; | |
61 | tv->tv_nsec = 0; | |
62 | } | |
63 | ||
64 | /* Called before configuring an on-chip UART. */ | |
65 | void rte_ma1_cb_uart_pre_configure (unsigned chan, | |
66 | unsigned cflags, unsigned baud) | |
67 | { | |
68 | /* The RTE-MA1-CB connects some general-purpose I/O pins on the | |
69 | CPU to the RTS/CTS lines of UART 0's serial connection. | |
70 | I/O pins P42 and P43 are RTS and CTS respectively. */ | |
71 | if (chan == 0) { | |
72 | /* Put P42 & P43 in I/O port mode. */ | |
73 | MA_PORT4_PMC &= ~0xC; | |
74 | /* Make P42 an output, and P43 an input. */ | |
75 | MA_PORT4_PM = (MA_PORT4_PM & ~0xC) | 0x8; | |
76 | } | |
77 | ||
78 | /* Do pre-configuration for the actual UART. */ | |
79 | ma_uart_pre_configure (chan, cflags, baud); | |
80 | } | |
81 | ||
82 | void __init mach_init_irqs (void) | |
83 | { | |
84 | unsigned tc; | |
85 | ||
86 | /* Initialize interrupts. */ | |
87 | ma_init_irqs (); | |
88 | rte_cb_init_irqs (); | |
89 | ||
90 | /* Use falling-edge-sensitivity for interrupts . */ | |
91 | V850E_TIMER_C_SESC (0) &= ~0xC; | |
92 | V850E_TIMER_C_SESC (1) &= ~0xF; | |
93 | ||
94 | /* INTP000-INTP011 are shared with `Timer C', so we have to set | |
95 | up Timer C to pass them through as raw interrupts. */ | |
96 | for (tc = 0; tc < 2; tc++) | |
97 | /* Turn on the timer. */ | |
98 | V850E_TIMER_C_TMCC0 (tc) |= V850E_TIMER_C_TMCC0_CAE; | |
99 | ||
100 | /* Make sure the relevant port0/port1 pins are assigned | |
101 | interrupt duty. We used INTP001-INTP011 (don't screw with | |
102 | INTP000 because the monitor uses it). */ | |
103 | MA_PORT0_PMC |= 0x4; /* P02 (INTP001) in IRQ mode. */ | |
104 | MA_PORT1_PMC |= 0x6; /* P11 (INTP010) & P12 (INTP011) in IRQ mode.*/ | |
105 | } |