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x86/entry/32: Switch INT80 to the new C syscall path
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1da177e4 1/*
a49976d1 2 * Copyright (C) 1991,1992 Linus Torvalds
1da177e4 3 *
a49976d1 4 * entry_32.S contains the system-call and low-level fault and trap handling routines.
1da177e4 5 *
39e8701f 6 * Stack layout while running C code:
a49976d1
IM
7 * ptrace needs to have all registers on the stack.
8 * If the order here is changed, it needs to be
9 * updated in fork.c:copy_process(), signal.c:do_signal(),
1da177e4
LT
10 * ptrace.c and ptrace.h
11 *
12 * 0(%esp) - %ebx
13 * 4(%esp) - %ecx
14 * 8(%esp) - %edx
9b47feb7 15 * C(%esp) - %esi
1da177e4
LT
16 * 10(%esp) - %edi
17 * 14(%esp) - %ebp
18 * 18(%esp) - %eax
19 * 1C(%esp) - %ds
20 * 20(%esp) - %es
464d1a78 21 * 24(%esp) - %fs
ccbeed3a
TH
22 * 28(%esp) - %gs saved iff !CONFIG_X86_32_LAZY_GS
23 * 2C(%esp) - orig_eax
24 * 30(%esp) - %eip
25 * 34(%esp) - %cs
26 * 38(%esp) - %eflags
27 * 3C(%esp) - %oldesp
28 * 40(%esp) - %oldss
1da177e4
LT
29 */
30
1da177e4 31#include <linux/linkage.h>
d7e7528b 32#include <linux/err.h>
1da177e4 33#include <asm/thread_info.h>
55f327fa 34#include <asm/irqflags.h>
1da177e4
LT
35#include <asm/errno.h>
36#include <asm/segment.h>
37#include <asm/smp.h>
0341c14d 38#include <asm/page_types.h>
be44d2aa 39#include <asm/percpu.h>
ab68ed98 40#include <asm/processor-flags.h>
395a59d0 41#include <asm/ftrace.h>
9b7dc567 42#include <asm/irq_vectors.h>
40d2e763 43#include <asm/cpufeature.h>
b4ca46e4 44#include <asm/alternative-asm.h>
6837a54d 45#include <asm/asm.h>
e59d1b0a 46#include <asm/smap.h>
1da177e4 47
ea714547
JO
48 .section .entry.text, "ax"
49
139ec7c4
RR
50/*
51 * We use macros for low-level operations which need to be overridden
52 * for paravirtualization. The following will never clobber any registers:
53 * INTERRUPT_RETURN (aka. "iret")
54 * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax")
d75cd22f 55 * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit").
139ec7c4
RR
56 *
57 * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must
58 * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY).
59 * Allowing a register to be clobbered can shrink the paravirt replacement
60 * enough to patch inline, increasing performance.
61 */
62
1da177e4 63#ifdef CONFIG_PREEMPT
a49976d1 64# define preempt_stop(clobbers) DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF
1da177e4 65#else
a49976d1
IM
66# define preempt_stop(clobbers)
67# define resume_kernel restore_all
1da177e4
LT
68#endif
69
55f327fa
IM
70.macro TRACE_IRQS_IRET
71#ifdef CONFIG_TRACE_IRQFLAGS
a49976d1
IM
72 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off?
73 jz 1f
55f327fa
IM
74 TRACE_IRQS_ON
751:
76#endif
77.endm
78
ccbeed3a
TH
79/*
80 * User gs save/restore
81 *
82 * %gs is used for userland TLS and kernel only uses it for stack
83 * canary which is required to be at %gs:20 by gcc. Read the comment
84 * at the top of stackprotector.h for more info.
85 *
86 * Local labels 98 and 99 are used.
87 */
88#ifdef CONFIG_X86_32_LAZY_GS
89
90 /* unfortunately push/pop can't be no-op */
91.macro PUSH_GS
a49976d1 92 pushl $0
ccbeed3a
TH
93.endm
94.macro POP_GS pop=0
a49976d1 95 addl $(4 + \pop), %esp
ccbeed3a
TH
96.endm
97.macro POP_GS_EX
98.endm
99
100 /* all the rest are no-op */
101.macro PTGS_TO_GS
102.endm
103.macro PTGS_TO_GS_EX
104.endm
105.macro GS_TO_REG reg
106.endm
107.macro REG_TO_PTGS reg
108.endm
109.macro SET_KERNEL_GS reg
110.endm
111
112#else /* CONFIG_X86_32_LAZY_GS */
113
114.macro PUSH_GS
a49976d1 115 pushl %gs
ccbeed3a
TH
116.endm
117
118.macro POP_GS pop=0
a49976d1 11998: popl %gs
ccbeed3a 120 .if \pop <> 0
9b47feb7 121 add $\pop, %esp
ccbeed3a
TH
122 .endif
123.endm
124.macro POP_GS_EX
125.pushsection .fixup, "ax"
a49976d1
IM
12699: movl $0, (%esp)
127 jmp 98b
ccbeed3a 128.popsection
a49976d1 129 _ASM_EXTABLE(98b, 99b)
ccbeed3a
TH
130.endm
131
132.macro PTGS_TO_GS
a49976d1 13398: mov PT_GS(%esp), %gs
ccbeed3a
TH
134.endm
135.macro PTGS_TO_GS_EX
136.pushsection .fixup, "ax"
a49976d1
IM
13799: movl $0, PT_GS(%esp)
138 jmp 98b
ccbeed3a 139.popsection
a49976d1 140 _ASM_EXTABLE(98b, 99b)
ccbeed3a
TH
141.endm
142
143.macro GS_TO_REG reg
a49976d1 144 movl %gs, \reg
ccbeed3a
TH
145.endm
146.macro REG_TO_PTGS reg
a49976d1 147 movl \reg, PT_GS(%esp)
ccbeed3a
TH
148.endm
149.macro SET_KERNEL_GS reg
a49976d1
IM
150 movl $(__KERNEL_STACK_CANARY), \reg
151 movl \reg, %gs
ccbeed3a
TH
152.endm
153
a49976d1 154#endif /* CONFIG_X86_32_LAZY_GS */
ccbeed3a 155
150ac78d 156.macro SAVE_ALL pt_regs_ax=%eax
f0d96110 157 cld
ccbeed3a 158 PUSH_GS
a49976d1
IM
159 pushl %fs
160 pushl %es
161 pushl %ds
150ac78d 162 pushl \pt_regs_ax
a49976d1
IM
163 pushl %ebp
164 pushl %edi
165 pushl %esi
166 pushl %edx
167 pushl %ecx
168 pushl %ebx
169 movl $(__USER_DS), %edx
170 movl %edx, %ds
171 movl %edx, %es
172 movl $(__KERNEL_PERCPU), %edx
173 movl %edx, %fs
ccbeed3a 174 SET_KERNEL_GS %edx
f0d96110 175.endm
1da177e4 176
f0d96110 177.macro RESTORE_INT_REGS
a49976d1
IM
178 popl %ebx
179 popl %ecx
180 popl %edx
181 popl %esi
182 popl %edi
183 popl %ebp
184 popl %eax
f0d96110 185.endm
1da177e4 186
ccbeed3a 187.macro RESTORE_REGS pop=0
f0d96110 188 RESTORE_INT_REGS
a49976d1
IM
1891: popl %ds
1902: popl %es
1913: popl %fs
ccbeed3a 192 POP_GS \pop
f0d96110 193.pushsection .fixup, "ax"
a49976d1
IM
1944: movl $0, (%esp)
195 jmp 1b
1965: movl $0, (%esp)
197 jmp 2b
1986: movl $0, (%esp)
199 jmp 3b
f95d47ca 200.popsection
a49976d1
IM
201 _ASM_EXTABLE(1b, 4b)
202 _ASM_EXTABLE(2b, 5b)
203 _ASM_EXTABLE(3b, 6b)
ccbeed3a 204 POP_GS_EX
f0d96110 205.endm
1da177e4 206
1da177e4 207ENTRY(ret_from_fork)
a49976d1
IM
208 pushl %eax
209 call schedule_tail
1da177e4 210 GET_THREAD_INFO(%ebp)
a49976d1
IM
211 popl %eax
212 pushl $0x0202 # Reset kernel eflags
131484c8 213 popfl
39e8701f
AL
214
215 /* When we fork, we trace the syscall return in the child, too. */
216 movl %esp, %eax
217 call syscall_return_slowpath
218 jmp restore_all
47a55cd7 219END(ret_from_fork)
1da177e4 220
22e2430d 221ENTRY(ret_from_kernel_thread)
a49976d1
IM
222 pushl %eax
223 call schedule_tail
6783eaa2 224 GET_THREAD_INFO(%ebp)
a49976d1
IM
225 popl %eax
226 pushl $0x0202 # Reset kernel eflags
131484c8 227 popfl
a49976d1
IM
228 movl PT_EBP(%esp), %eax
229 call *PT_EBX(%esp)
230 movl $0, PT_EAX(%esp)
39e8701f
AL
231
232 /*
233 * Kernel threads return to userspace as if returning from a syscall.
234 * We should check whether anything actually uses this path and, if so,
235 * consider switching it over to ret_from_fork.
236 */
237 movl %esp, %eax
238 call syscall_return_slowpath
239 jmp restore_all
22e2430d 240ENDPROC(ret_from_kernel_thread)
6783eaa2 241
1da177e4
LT
242/*
243 * Return to user mode is not as complex as all this looks,
244 * but we want the default path for a system call return to
245 * go as quickly as possible which is why some of this is
246 * less clear than it otherwise should be.
247 */
248
249 # userspace resumption stub bypassing syscall exit tracing
250 ALIGN
251ret_from_exception:
139ec7c4 252 preempt_stop(CLBR_ANY)
1da177e4
LT
253ret_from_intr:
254 GET_THREAD_INFO(%ebp)
29a2e283 255#ifdef CONFIG_VM86
a49976d1
IM
256 movl PT_EFLAGS(%esp), %eax # mix EFLAGS and CS
257 movb PT_CS(%esp), %al
258 andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax
29a2e283
DA
259#else
260 /*
6783eaa2 261 * We can be coming here from child spawned by kernel_thread().
29a2e283 262 */
a49976d1
IM
263 movl PT_CS(%esp), %eax
264 andl $SEGMENT_RPL_MASK, %eax
29a2e283 265#endif
a49976d1
IM
266 cmpl $USER_RPL, %eax
267 jb resume_kernel # not returning to v8086 or userspace
f95d47ca 268
1da177e4 269ENTRY(resume_userspace)
5d73fc70 270 DISABLE_INTERRUPTS(CLBR_ANY)
e32e58a9 271 TRACE_IRQS_OFF
5d73fc70
AL
272 movl %esp, %eax
273 call prepare_exit_to_usermode
a49976d1 274 jmp restore_all
47a55cd7 275END(ret_from_exception)
1da177e4
LT
276
277#ifdef CONFIG_PREEMPT
278ENTRY(resume_kernel)
139ec7c4 279 DISABLE_INTERRUPTS(CLBR_ANY)
1da177e4 280need_resched:
a49976d1
IM
281 cmpl $0, PER_CPU_VAR(__preempt_count)
282 jnz restore_all
283 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off (exception path) ?
284 jz restore_all
285 call preempt_schedule_irq
286 jmp need_resched
47a55cd7 287END(resume_kernel)
1da177e4
LT
288#endif
289
a49976d1
IM
290/*
291 * SYSENTER_RETURN points to after the SYSENTER instruction
292 * in the vsyscall page. See vsyscall-sysentry.S, which defines
293 * the symbol.
294 */
1da177e4 295
a49976d1 296 # SYSENTER call handler stub
4c8cd0c5 297ENTRY(entry_SYSENTER_32)
a49976d1 298 movl TSS_sysenter_sp0(%esp), %esp
1da177e4 299sysenter_past_esp:
55f327fa 300 /*
d93c870b
JF
301 * Interrupts are disabled here, but we can't trace it until
302 * enough kernel state to call TRACE_IRQS_OFF can be called - but
303 * we immediately enable interrupts at that point anyway.
55f327fa 304 */
a49976d1
IM
305 pushl $__USER_DS
306 pushl %ebp
131484c8 307 pushfl
a49976d1
IM
308 orl $X86_EFLAGS_IF, (%esp)
309 pushl $__USER_CS
e6e5494c
IM
310 /*
311 * Push current_thread_info()->sysenter_return to the stack.
ff8287f3
AL
312 * A tiny bit of offset fixup is necessary: TI_sysenter_return
313 * is relative to thread_info, which is at the bottom of the
314 * kernel stack page. 4*4 means the 4 words pushed above;
315 * TOP_OF_KERNEL_STACK_PADDING takes us to the top of the stack;
316 * and THREAD_SIZE takes us to the bottom.
e6e5494c 317 */
a49976d1 318 pushl ((TI_sysenter_return) - THREAD_SIZE + TOP_OF_KERNEL_STACK_PADDING + 4*4)(%esp)
1da177e4 319
a49976d1 320 pushl %eax
d93c870b
JF
321 SAVE_ALL
322 ENABLE_INTERRUPTS(CLBR_NONE)
323
1da177e4
LT
324/*
325 * Load the potential sixth argument from user stack.
326 * Careful about security.
327 */
a49976d1
IM
328 cmpl $__PAGE_OFFSET-3, %ebp
329 jae syscall_fault
e59d1b0a 330 ASM_STAC
a49976d1 3311: movl (%ebp), %ebp
e59d1b0a 332 ASM_CLAC
a49976d1
IM
333 movl %ebp, PT_EBP(%esp)
334 _ASM_EXTABLE(1b, syscall_fault)
1da177e4 335
1da177e4
LT
336 GET_THREAD_INFO(%ebp)
337
a49976d1 338 testl $_TIF_WORK_SYSCALL_ENTRY, TI_flags(%ebp)
c5f69fde 339 jnz syscall_trace_entry
af0575bb 340sysenter_do_call:
a49976d1
IM
341 cmpl $(NR_syscalls), %eax
342 jae sysenter_badsys
343 call *sys_call_table(, %eax, 4)
554086d8 344sysenter_after_call:
a49976d1 345 movl %eax, PT_EAX(%esp)
c7e872e7 346 LOCKDEP_SYS_EXIT
42c24fa2 347 DISABLE_INTERRUPTS(CLBR_ANY)
55f327fa 348 TRACE_IRQS_OFF
a49976d1
IM
349 movl TI_flags(%ebp), %ecx
350 testl $_TIF_ALLWORK_MASK, %ecx
5d73fc70 351 jnz syscall_exit_work_irqs_off
af0575bb 352sysenter_exit:
1da177e4 353/* if something modifies registers it must also disable sysexit */
a49976d1
IM
354 movl PT_EIP(%esp), %edx
355 movl PT_OLDESP(%esp), %ecx
356 xorl %ebp, %ebp
55f327fa 357 TRACE_IRQS_ON
a49976d1 3581: mov PT_FS(%esp), %fs
ccbeed3a 359 PTGS_TO_GS
d75cd22f 360 ENABLE_INTERRUPTS_SYSEXIT
af0575bb 361
a49976d1
IM
362.pushsection .fixup, "ax"
3632: movl $0, PT_FS(%esp)
364 jmp 1b
f95d47ca 365.popsection
a49976d1 366 _ASM_EXTABLE(1b, 2b)
ccbeed3a 367 PTGS_TO_GS_EX
4c8cd0c5 368ENDPROC(entry_SYSENTER_32)
1da177e4
LT
369
370 # system call handler stub
b2502b41 371ENTRY(entry_INT80_32)
e59d1b0a 372 ASM_CLAC
150ac78d
AL
373 pushl %eax /* pt_regs->orig_ax */
374 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest, load -ENOSYS into ax */
375
376 /*
377 * User mode is traced as though IRQs are on, and the interrupt gate
378 * turned them off.
379 */
380 TRACE_IRQS_OFF
381
382 movl %esp, %eax
383 call do_int80_syscall_32
1da177e4
LT
384
385restore_all:
2e04bc76
AH
386 TRACE_IRQS_IRET
387restore_all_notrace:
34273f41 388#ifdef CONFIG_X86_ESPFIX32
a49976d1
IM
389 movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS
390 /*
391 * Warning: PT_OLDSS(%esp) contains the wrong/random values if we
392 * are returning to the kernel.
393 * See comments in process.c:copy_thread() for details.
394 */
395 movb PT_OLDSS(%esp), %ah
396 movb PT_CS(%esp), %al
397 andl $(X86_EFLAGS_VM | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax
398 cmpl $((SEGMENT_LDT << 8) | USER_RPL), %eax
399 je ldt_ss # returning to user-space with LDT SS
34273f41 400#endif
1da177e4 401restore_nocheck:
a49976d1 402 RESTORE_REGS 4 # skip orig_eax/error_code
f7f3d791 403irq_return:
3701d863 404 INTERRUPT_RETURN
a49976d1
IM
405.section .fixup, "ax"
406ENTRY(iret_exc )
407 pushl $0 # no error code
408 pushl $do_iret_error
409 jmp error_code
1da177e4 410.previous
a49976d1 411 _ASM_EXTABLE(irq_return, iret_exc)
1da177e4 412
34273f41 413#ifdef CONFIG_X86_ESPFIX32
1da177e4 414ldt_ss:
d3561b7f
RR
415#ifdef CONFIG_PARAVIRT
416 /*
417 * The kernel can't run on a non-flat stack if paravirt mode
418 * is active. Rather than try to fixup the high bits of
419 * ESP, bypass this code entirely. This may break DOSemu
420 * and/or Wine support in a paravirt VM, although the option
421 * is still available to implement the setting of the high
422 * 16-bits in the INTERRUPT_RETURN paravirt-op.
423 */
a49976d1
IM
424 cmpl $0, pv_info+PARAVIRT_enabled
425 jne restore_nocheck
d3561b7f
RR
426#endif
427
dc4c2a0a
AH
428/*
429 * Setup and switch to ESPFIX stack
430 *
431 * We're returning to userspace with a 16 bit stack. The CPU will not
432 * restore the high word of ESP for us on executing iret... This is an
433 * "official" bug of all the x86-compatible CPUs, which we can work
434 * around to make dosemu and wine happy. We do this by preloading the
435 * high word of ESP with the high word of the userspace ESP while
436 * compensating for the offset by changing to the ESPFIX segment with
437 * a base address that matches for the difference.
438 */
72c511dd 439#define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + (GDT_ENTRY_ESPFIX_SS * 8)
a49976d1
IM
440 mov %esp, %edx /* load kernel esp */
441 mov PT_OLDESP(%esp), %eax /* load userspace esp */
442 mov %dx, %ax /* eax: new kernel esp */
9b47feb7
DV
443 sub %eax, %edx /* offset (low word is 0) */
444 shr $16, %edx
a49976d1
IM
445 mov %dl, GDT_ESPFIX_SS + 4 /* bits 16..23 */
446 mov %dh, GDT_ESPFIX_SS + 7 /* bits 24..31 */
447 pushl $__ESPFIX_SS
448 pushl %eax /* new kernel esp */
449 /*
450 * Disable interrupts, but do not irqtrace this section: we
2e04bc76 451 * will soon execute iret and the tracer was already set to
a49976d1
IM
452 * the irqstate after the IRET:
453 */
139ec7c4 454 DISABLE_INTERRUPTS(CLBR_EAX)
a49976d1
IM
455 lss (%esp), %esp /* switch to espfix segment */
456 jmp restore_nocheck
34273f41 457#endif
b2502b41 458ENDPROC(entry_INT80_32)
1da177e4 459
1da177e4
LT
460 # perform syscall exit tracing
461 ALIGN
462syscall_trace_entry:
a49976d1
IM
463 movl $-ENOSYS, PT_EAX(%esp)
464 movl %esp, %eax
465 call syscall_trace_enter
d4d67150 466 /* What it returned is what we'll actually use. */
a49976d1
IM
467 cmpl $(NR_syscalls), %eax
468 jnae syscall_call
469 jmp syscall_exit
47a55cd7 470END(syscall_trace_entry)
1da177e4
LT
471
472 # perform syscall exit tracing
473 ALIGN
5d73fc70 474syscall_exit_work_irqs_off:
55f327fa 475 TRACE_IRQS_ON
5d73fc70
AL
476 ENABLE_INTERRUPTS(CLBR_ANY)
477
478syscall_exit_work:
a49976d1 479 movl %esp, %eax
5d73fc70
AL
480 call syscall_return_slowpath
481 jmp restore_all
47a55cd7 482END(syscall_exit_work)
1da177e4 483
1da177e4 484syscall_fault:
e59d1b0a 485 ASM_CLAC
1da177e4 486 GET_THREAD_INFO(%ebp)
a49976d1
IM
487 movl $-EFAULT, PT_EAX(%esp)
488 jmp resume_userspace
47a55cd7 489END(syscall_fault)
1da177e4 490
554086d8 491sysenter_badsys:
a49976d1
IM
492 movl $-ENOSYS, %eax
493 jmp sysenter_after_call
fb21b84e 494END(sysenter_badsys)
1da177e4 495
f0d96110 496.macro FIXUP_ESPFIX_STACK
dc4c2a0a
AH
497/*
498 * Switch back for ESPFIX stack to the normal zerobased stack
499 *
500 * We can't call C functions using the ESPFIX stack. This code reads
501 * the high word of the segment base from the GDT and swiches to the
502 * normal stack and adjusts ESP with the matching offset.
503 */
34273f41 504#ifdef CONFIG_X86_ESPFIX32
dc4c2a0a 505 /* fixup the stack */
a49976d1
IM
506 mov GDT_ESPFIX_SS + 4, %al /* bits 16..23 */
507 mov GDT_ESPFIX_SS + 7, %ah /* bits 24..31 */
9b47feb7 508 shl $16, %eax
a49976d1
IM
509 addl %esp, %eax /* the adjusted stack pointer */
510 pushl $__KERNEL_DS
511 pushl %eax
512 lss (%esp), %esp /* switch to the normal stack segment */
34273f41 513#endif
f0d96110
TH
514.endm
515.macro UNWIND_ESPFIX_STACK
34273f41 516#ifdef CONFIG_X86_ESPFIX32
a49976d1 517 movl %ss, %eax
f0d96110 518 /* see if on espfix stack */
a49976d1
IM
519 cmpw $__ESPFIX_SS, %ax
520 jne 27f
521 movl $__KERNEL_DS, %eax
522 movl %eax, %ds
523 movl %eax, %es
f0d96110
TH
524 /* switch to normal stack */
525 FIXUP_ESPFIX_STACK
52627:
34273f41 527#endif
f0d96110 528.endm
1da177e4
LT
529
530/*
3304c9c3
DV
531 * Build the entry stubs with some assembler magic.
532 * We pack 1 stub into every 8-byte block.
1da177e4 533 */
3304c9c3 534 .align 8
1da177e4 535ENTRY(irq_entries_start)
3304c9c3
DV
536 vector=FIRST_EXTERNAL_VECTOR
537 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
a49976d1 538 pushl $(~vector+0x80) /* Note: always in signed byte range */
3304c9c3
DV
539 vector=vector+1
540 jmp common_interrupt
3304c9c3
DV
541 .align 8
542 .endr
47a55cd7
JB
543END(irq_entries_start)
544
55f327fa
IM
545/*
546 * the CPU automatically disables interrupts when executing an IRQ vector,
547 * so IRQ-flags tracing has to follow that:
548 */
b7c6244f 549 .p2align CONFIG_X86_L1_CACHE_SHIFT
1da177e4 550common_interrupt:
e59d1b0a 551 ASM_CLAC
a49976d1 552 addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */
1da177e4 553 SAVE_ALL
55f327fa 554 TRACE_IRQS_OFF
a49976d1
IM
555 movl %esp, %eax
556 call do_IRQ
557 jmp ret_from_intr
47a55cd7 558ENDPROC(common_interrupt)
1da177e4 559
02cf94c3 560#define BUILD_INTERRUPT3(name, nr, fn) \
1da177e4 561ENTRY(name) \
e59d1b0a 562 ASM_CLAC; \
a49976d1 563 pushl $~(nr); \
fe7cacc1 564 SAVE_ALL; \
55f327fa 565 TRACE_IRQS_OFF \
a49976d1
IM
566 movl %esp, %eax; \
567 call fn; \
568 jmp ret_from_intr; \
47a55cd7 569ENDPROC(name)
1da177e4 570
cf910e83
SA
571
572#ifdef CONFIG_TRACING
a49976d1 573# define TRACE_BUILD_INTERRUPT(name, nr) BUILD_INTERRUPT3(trace_##name, nr, smp_trace_##name)
cf910e83 574#else
a49976d1 575# define TRACE_BUILD_INTERRUPT(name, nr)
cf910e83
SA
576#endif
577
a49976d1
IM
578#define BUILD_INTERRUPT(name, nr) \
579 BUILD_INTERRUPT3(name, nr, smp_##name); \
cf910e83 580 TRACE_BUILD_INTERRUPT(name, nr)
02cf94c3 581
1da177e4 582/* The include is where all of the SMP etc. interrupts come from */
1164dd00 583#include <asm/entry_arch.h>
1da177e4 584
1da177e4 585ENTRY(coprocessor_error)
e59d1b0a 586 ASM_CLAC
a49976d1
IM
587 pushl $0
588 pushl $do_coprocessor_error
589 jmp error_code
47a55cd7 590END(coprocessor_error)
1da177e4
LT
591
592ENTRY(simd_coprocessor_error)
e59d1b0a 593 ASM_CLAC
a49976d1 594 pushl $0
40d2e763
BG
595#ifdef CONFIG_X86_INVD_BUG
596 /* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */
a49976d1
IM
597 ALTERNATIVE "pushl $do_general_protection", \
598 "pushl $do_simd_coprocessor_error", \
8e65f6e0 599 X86_FEATURE_XMM
40d2e763 600#else
a49976d1 601 pushl $do_simd_coprocessor_error
40d2e763 602#endif
a49976d1 603 jmp error_code
47a55cd7 604END(simd_coprocessor_error)
1da177e4
LT
605
606ENTRY(device_not_available)
e59d1b0a 607 ASM_CLAC
a49976d1
IM
608 pushl $-1 # mark this as an int
609 pushl $do_device_not_available
610 jmp error_code
47a55cd7 611END(device_not_available)
1da177e4 612
d3561b7f
RR
613#ifdef CONFIG_PARAVIRT
614ENTRY(native_iret)
3701d863 615 iret
6837a54d 616 _ASM_EXTABLE(native_iret, iret_exc)
47a55cd7 617END(native_iret)
d3561b7f 618
d75cd22f 619ENTRY(native_irq_enable_sysexit)
d3561b7f
RR
620 sti
621 sysexit
d75cd22f 622END(native_irq_enable_sysexit)
d3561b7f
RR
623#endif
624
1da177e4 625ENTRY(overflow)
e59d1b0a 626 ASM_CLAC
a49976d1
IM
627 pushl $0
628 pushl $do_overflow
629 jmp error_code
47a55cd7 630END(overflow)
1da177e4
LT
631
632ENTRY(bounds)
e59d1b0a 633 ASM_CLAC
a49976d1
IM
634 pushl $0
635 pushl $do_bounds
636 jmp error_code
47a55cd7 637END(bounds)
1da177e4
LT
638
639ENTRY(invalid_op)
e59d1b0a 640 ASM_CLAC
a49976d1
IM
641 pushl $0
642 pushl $do_invalid_op
643 jmp error_code
47a55cd7 644END(invalid_op)
1da177e4
LT
645
646ENTRY(coprocessor_segment_overrun)
e59d1b0a 647 ASM_CLAC
a49976d1
IM
648 pushl $0
649 pushl $do_coprocessor_segment_overrun
650 jmp error_code
47a55cd7 651END(coprocessor_segment_overrun)
1da177e4
LT
652
653ENTRY(invalid_TSS)
e59d1b0a 654 ASM_CLAC
a49976d1
IM
655 pushl $do_invalid_TSS
656 jmp error_code
47a55cd7 657END(invalid_TSS)
1da177e4
LT
658
659ENTRY(segment_not_present)
e59d1b0a 660 ASM_CLAC
a49976d1
IM
661 pushl $do_segment_not_present
662 jmp error_code
47a55cd7 663END(segment_not_present)
1da177e4
LT
664
665ENTRY(stack_segment)
e59d1b0a 666 ASM_CLAC
a49976d1
IM
667 pushl $do_stack_segment
668 jmp error_code
47a55cd7 669END(stack_segment)
1da177e4 670
1da177e4 671ENTRY(alignment_check)
e59d1b0a 672 ASM_CLAC
a49976d1
IM
673 pushl $do_alignment_check
674 jmp error_code
47a55cd7 675END(alignment_check)
1da177e4 676
d28c4393 677ENTRY(divide_error)
e59d1b0a 678 ASM_CLAC
a49976d1
IM
679 pushl $0 # no error code
680 pushl $do_divide_error
681 jmp error_code
47a55cd7 682END(divide_error)
1da177e4
LT
683
684#ifdef CONFIG_X86_MCE
685ENTRY(machine_check)
e59d1b0a 686 ASM_CLAC
a49976d1
IM
687 pushl $0
688 pushl machine_check_vector
689 jmp error_code
47a55cd7 690END(machine_check)
1da177e4
LT
691#endif
692
693ENTRY(spurious_interrupt_bug)
e59d1b0a 694 ASM_CLAC
a49976d1
IM
695 pushl $0
696 pushl $do_spurious_interrupt_bug
697 jmp error_code
47a55cd7 698END(spurious_interrupt_bug)
1da177e4 699
5ead97c8 700#ifdef CONFIG_XEN
a49976d1
IM
701/*
702 * Xen doesn't set %esp to be precisely what the normal SYSENTER
703 * entry point expects, so fix it up before using the normal path.
704 */
e2a81baf 705ENTRY(xen_sysenter_target)
a49976d1
IM
706 addl $5*4, %esp /* remove xen-provided frame */
707 jmp sysenter_past_esp
e2a81baf 708
5ead97c8 709ENTRY(xen_hypervisor_callback)
a49976d1 710 pushl $-1 /* orig_ax = -1 => not a system call */
5ead97c8
JF
711 SAVE_ALL
712 TRACE_IRQS_OFF
9ec2b804 713
a49976d1
IM
714 /*
715 * Check to see if we got the event in the critical
716 * region in xen_iret_direct, after we've reenabled
717 * events and checked for pending events. This simulates
718 * iret instruction's behaviour where it delivers a
719 * pending interrupt when enabling interrupts:
720 */
721 movl PT_EIP(%esp), %eax
722 cmpl $xen_iret_start_crit, %eax
723 jb 1f
724 cmpl $xen_iret_end_crit, %eax
725 jae 1f
9ec2b804 726
a49976d1 727 jmp xen_iret_crit_fixup
e2a81baf 728
e2a81baf 729ENTRY(xen_do_upcall)
a49976d1
IM
7301: mov %esp, %eax
731 call xen_evtchn_do_upcall
fdfd811d 732#ifndef CONFIG_PREEMPT
a49976d1 733 call xen_maybe_preempt_hcall
fdfd811d 734#endif
a49976d1 735 jmp ret_from_intr
5ead97c8
JF
736ENDPROC(xen_hypervisor_callback)
737
a49976d1
IM
738/*
739 * Hypervisor uses this for application faults while it executes.
740 * We get here for two reasons:
741 * 1. Fault while reloading DS, ES, FS or GS
742 * 2. Fault while executing IRET
743 * Category 1 we fix up by reattempting the load, and zeroing the segment
744 * register if the load fails.
745 * Category 2 we fix up by jumping to do_iret_error. We cannot use the
746 * normal Linux return path in this case because if we use the IRET hypercall
747 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
748 * We distinguish between categories by maintaining a status value in EAX.
749 */
5ead97c8 750ENTRY(xen_failsafe_callback)
a49976d1
IM
751 pushl %eax
752 movl $1, %eax
7531: mov 4(%esp), %ds
7542: mov 8(%esp), %es
7553: mov 12(%esp), %fs
7564: mov 16(%esp), %gs
a349e23d
DV
757 /* EAX == 0 => Category 1 (Bad segment)
758 EAX != 0 => Category 2 (Bad IRET) */
a49976d1
IM
759 testl %eax, %eax
760 popl %eax
761 lea 16(%esp), %esp
762 jz 5f
763 jmp iret_exc
7645: pushl $-1 /* orig_ax = -1 => not a system call */
5ead97c8 765 SAVE_ALL
a49976d1
IM
766 jmp ret_from_exception
767
768.section .fixup, "ax"
7696: xorl %eax, %eax
770 movl %eax, 4(%esp)
771 jmp 1b
7727: xorl %eax, %eax
773 movl %eax, 8(%esp)
774 jmp 2b
7758: xorl %eax, %eax
776 movl %eax, 12(%esp)
777 jmp 3b
7789: xorl %eax, %eax
779 movl %eax, 16(%esp)
780 jmp 4b
5ead97c8 781.previous
a49976d1
IM
782 _ASM_EXTABLE(1b, 6b)
783 _ASM_EXTABLE(2b, 7b)
784 _ASM_EXTABLE(3b, 8b)
785 _ASM_EXTABLE(4b, 9b)
5ead97c8
JF
786ENDPROC(xen_failsafe_callback)
787
bc2b0331 788BUILD_INTERRUPT3(xen_hvm_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
38e20b07
SY
789 xen_evtchn_do_upcall)
790
a49976d1 791#endif /* CONFIG_XEN */
bc2b0331
S
792
793#if IS_ENABLED(CONFIG_HYPERV)
794
795BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
796 hyperv_vector_handler)
797
798#endif /* CONFIG_HYPERV */
5ead97c8 799
606576ce 800#ifdef CONFIG_FUNCTION_TRACER
d61f82d0
SR
801#ifdef CONFIG_DYNAMIC_FTRACE
802
803ENTRY(mcount)
d61f82d0
SR
804 ret
805END(mcount)
806
807ENTRY(ftrace_caller)
a49976d1
IM
808 pushl %eax
809 pushl %ecx
810 pushl %edx
811 pushl $0 /* Pass NULL as regs pointer */
812 movl 4*4(%esp), %eax
813 movl 0x4(%ebp), %edx
814 movl function_trace_op, %ecx
815 subl $MCOUNT_INSN_SIZE, %eax
d61f82d0
SR
816
817.globl ftrace_call
818ftrace_call:
a49976d1 819 call ftrace_stub
d61f82d0 820
a49976d1
IM
821 addl $4, %esp /* skip NULL pointer */
822 popl %edx
823 popl %ecx
824 popl %eax
4de72395 825ftrace_ret:
5a45cfe1
SR
826#ifdef CONFIG_FUNCTION_GRAPH_TRACER
827.globl ftrace_graph_call
828ftrace_graph_call:
a49976d1 829 jmp ftrace_stub
5a45cfe1 830#endif
d61f82d0
SR
831
832.globl ftrace_stub
833ftrace_stub:
834 ret
835END(ftrace_caller)
836
4de72395
SR
837ENTRY(ftrace_regs_caller)
838 pushf /* push flags before compare (in cs location) */
4de72395
SR
839
840 /*
841 * i386 does not save SS and ESP when coming from kernel.
842 * Instead, to get sp, &regs->sp is used (see ptrace.h).
843 * Unfortunately, that means eflags must be at the same location
844 * as the current return ip is. We move the return ip into the
845 * ip location, and move flags into the return ip location.
846 */
a49976d1
IM
847 pushl 4(%esp) /* save return ip into ip slot */
848
849 pushl $0 /* Load 0 into orig_ax */
850 pushl %gs
851 pushl %fs
852 pushl %es
853 pushl %ds
854 pushl %eax
855 pushl %ebp
856 pushl %edi
857 pushl %esi
858 pushl %edx
859 pushl %ecx
860 pushl %ebx
861
862 movl 13*4(%esp), %eax /* Get the saved flags */
863 movl %eax, 14*4(%esp) /* Move saved flags into regs->flags location */
864 /* clobbering return ip */
865 movl $__KERNEL_CS, 13*4(%esp)
866
867 movl 12*4(%esp), %eax /* Load ip (1st parameter) */
868 subl $MCOUNT_INSN_SIZE, %eax /* Adjust ip */
869 movl 0x4(%ebp), %edx /* Load parent ip (2nd parameter) */
870 movl function_trace_op, %ecx /* Save ftrace_pos in 3rd parameter */
871 pushl %esp /* Save pt_regs as 4th parameter */
4de72395
SR
872
873GLOBAL(ftrace_regs_call)
a49976d1
IM
874 call ftrace_stub
875
876 addl $4, %esp /* Skip pt_regs */
877 movl 14*4(%esp), %eax /* Move flags back into cs */
878 movl %eax, 13*4(%esp) /* Needed to keep addl from modifying flags */
879 movl 12*4(%esp), %eax /* Get return ip from regs->ip */
880 movl %eax, 14*4(%esp) /* Put return ip back for ret */
881
882 popl %ebx
883 popl %ecx
884 popl %edx
885 popl %esi
886 popl %edi
887 popl %ebp
888 popl %eax
889 popl %ds
890 popl %es
891 popl %fs
892 popl %gs
893 addl $8, %esp /* Skip orig_ax and ip */
894 popf /* Pop flags at end (no addl to corrupt flags) */
895 jmp ftrace_ret
4de72395 896
4de72395 897 popf
a49976d1 898 jmp ftrace_stub
d61f82d0
SR
899#else /* ! CONFIG_DYNAMIC_FTRACE */
900
16444a8a 901ENTRY(mcount)
a49976d1
IM
902 cmpl $__PAGE_OFFSET, %esp
903 jb ftrace_stub /* Paging not enabled yet? */
af058ab0 904
a49976d1
IM
905 cmpl $ftrace_stub, ftrace_trace_function
906 jnz trace
fb52607a 907#ifdef CONFIG_FUNCTION_GRAPH_TRACER
a49976d1
IM
908 cmpl $ftrace_stub, ftrace_graph_return
909 jnz ftrace_graph_caller
e49dc19c 910
a49976d1
IM
911 cmpl $ftrace_graph_entry_stub, ftrace_graph_entry
912 jnz ftrace_graph_caller
caf4b323 913#endif
16444a8a
ACM
914.globl ftrace_stub
915ftrace_stub:
916 ret
917
918 /* taken from glibc */
919trace:
a49976d1
IM
920 pushl %eax
921 pushl %ecx
922 pushl %edx
923 movl 0xc(%esp), %eax
924 movl 0x4(%ebp), %edx
925 subl $MCOUNT_INSN_SIZE, %eax
926
927 call *ftrace_trace_function
928
929 popl %edx
930 popl %ecx
931 popl %eax
932 jmp ftrace_stub
16444a8a 933END(mcount)
d61f82d0 934#endif /* CONFIG_DYNAMIC_FTRACE */
606576ce 935#endif /* CONFIG_FUNCTION_TRACER */
16444a8a 936
fb52607a
FW
937#ifdef CONFIG_FUNCTION_GRAPH_TRACER
938ENTRY(ftrace_graph_caller)
a49976d1
IM
939 pushl %eax
940 pushl %ecx
941 pushl %edx
942 movl 0xc(%esp), %eax
943 lea 0x4(%ebp), %edx
944 movl (%ebp), %ecx
945 subl $MCOUNT_INSN_SIZE, %eax
946 call prepare_ftrace_return
947 popl %edx
948 popl %ecx
949 popl %eax
e7d3737e 950 ret
fb52607a 951END(ftrace_graph_caller)
caf4b323
FW
952
953.globl return_to_handler
954return_to_handler:
a49976d1
IM
955 pushl %eax
956 pushl %edx
957 movl %ebp, %eax
958 call ftrace_return_to_handler
959 movl %eax, %ecx
960 popl %edx
961 popl %eax
962 jmp *%ecx
e7d3737e 963#endif
16444a8a 964
25c74b10
SA
965#ifdef CONFIG_TRACING
966ENTRY(trace_page_fault)
25c74b10 967 ASM_CLAC
a49976d1
IM
968 pushl $trace_do_page_fault
969 jmp error_code
25c74b10
SA
970END(trace_page_fault)
971#endif
972
d211af05 973ENTRY(page_fault)
e59d1b0a 974 ASM_CLAC
a49976d1 975 pushl $do_page_fault
d211af05
AH
976 ALIGN
977error_code:
ccbeed3a 978 /* the function address is in %gs's slot on the stack */
a49976d1
IM
979 pushl %fs
980 pushl %es
981 pushl %ds
982 pushl %eax
983 pushl %ebp
984 pushl %edi
985 pushl %esi
986 pushl %edx
987 pushl %ecx
988 pushl %ebx
d211af05 989 cld
a49976d1
IM
990 movl $(__KERNEL_PERCPU), %ecx
991 movl %ecx, %fs
d211af05 992 UNWIND_ESPFIX_STACK
ccbeed3a 993 GS_TO_REG %ecx
a49976d1
IM
994 movl PT_GS(%esp), %edi # get the function address
995 movl PT_ORIG_EAX(%esp), %edx # get the error code
996 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart
ccbeed3a
TH
997 REG_TO_PTGS %ecx
998 SET_KERNEL_GS %ecx
a49976d1
IM
999 movl $(__USER_DS), %ecx
1000 movl %ecx, %ds
1001 movl %ecx, %es
d211af05 1002 TRACE_IRQS_OFF
a49976d1
IM
1003 movl %esp, %eax # pt_regs pointer
1004 call *%edi
1005 jmp ret_from_exception
d211af05
AH
1006END(page_fault)
1007
1008/*
1009 * Debug traps and NMI can happen at the one SYSENTER instruction
1010 * that sets up the real kernel stack. Check here, since we can't
1011 * allow the wrong stack to be used.
1012 *
1013 * "TSS_sysenter_sp0+12" is because the NMI/debug handler will have
1014 * already pushed 3 words if it hits on the sysenter instruction:
1015 * eflags, cs and eip.
1016 *
1017 * We just load the right stack, and push the three (known) values
1018 * by hand onto the new stack - while updating the return eip past
1019 * the instruction that would have done it for sysenter.
1020 */
f0d96110 1021.macro FIX_STACK offset ok label
a49976d1
IM
1022 cmpw $__KERNEL_CS, 4(%esp)
1023 jne \ok
f0d96110 1024\label:
a49976d1 1025 movl TSS_sysenter_sp0 + \offset(%esp), %esp
131484c8 1026 pushfl
a49976d1
IM
1027 pushl $__KERNEL_CS
1028 pushl $sysenter_past_esp
f0d96110 1029.endm
d211af05
AH
1030
1031ENTRY(debug)
e59d1b0a 1032 ASM_CLAC
a49976d1
IM
1033 cmpl $entry_SYSENTER_32, (%esp)
1034 jne debug_stack_correct
f0d96110 1035 FIX_STACK 12, debug_stack_correct, debug_esp_fix_insn
d211af05 1036debug_stack_correct:
a49976d1 1037 pushl $-1 # mark this as an int
d211af05
AH
1038 SAVE_ALL
1039 TRACE_IRQS_OFF
a49976d1
IM
1040 xorl %edx, %edx # error code 0
1041 movl %esp, %eax # pt_regs pointer
1042 call do_debug
1043 jmp ret_from_exception
d211af05
AH
1044END(debug)
1045
1046/*
1047 * NMI is doubly nasty. It can happen _while_ we're handling
1048 * a debug fault, and the debug fault hasn't yet been able to
1049 * clear up the stack. So we first check whether we got an
1050 * NMI on the sysenter entry path, but after that we need to
1051 * check whether we got an NMI on the debug path where the debug
1052 * fault happened on the sysenter path.
1053 */
1054ENTRY(nmi)
e59d1b0a 1055 ASM_CLAC
34273f41 1056#ifdef CONFIG_X86_ESPFIX32
a49976d1
IM
1057 pushl %eax
1058 movl %ss, %eax
1059 cmpw $__ESPFIX_SS, %ax
1060 popl %eax
1061 je nmi_espfix_stack
34273f41 1062#endif
a49976d1
IM
1063 cmpl $entry_SYSENTER_32, (%esp)
1064 je nmi_stack_fixup
1065 pushl %eax
1066 movl %esp, %eax
1067 /*
1068 * Do not access memory above the end of our stack page,
d211af05
AH
1069 * it might not exist.
1070 */
a49976d1
IM
1071 andl $(THREAD_SIZE-1), %eax
1072 cmpl $(THREAD_SIZE-20), %eax
1073 popl %eax
1074 jae nmi_stack_correct
1075 cmpl $entry_SYSENTER_32, 12(%esp)
1076 je nmi_debug_stack_check
d211af05 1077nmi_stack_correct:
a49976d1 1078 pushl %eax
d211af05 1079 SAVE_ALL
a49976d1
IM
1080 xorl %edx, %edx # zero error code
1081 movl %esp, %eax # pt_regs pointer
1082 call do_nmi
1083 jmp restore_all_notrace
d211af05
AH
1084
1085nmi_stack_fixup:
f0d96110 1086 FIX_STACK 12, nmi_stack_correct, 1
a49976d1 1087 jmp nmi_stack_correct
d211af05
AH
1088
1089nmi_debug_stack_check:
a49976d1
IM
1090 cmpw $__KERNEL_CS, 16(%esp)
1091 jne nmi_stack_correct
1092 cmpl $debug, (%esp)
1093 jb nmi_stack_correct
1094 cmpl $debug_esp_fix_insn, (%esp)
1095 ja nmi_stack_correct
f0d96110 1096 FIX_STACK 24, nmi_stack_correct, 1
a49976d1 1097 jmp nmi_stack_correct
d211af05 1098
34273f41 1099#ifdef CONFIG_X86_ESPFIX32
d211af05 1100nmi_espfix_stack:
131484c8 1101 /*
d211af05
AH
1102 * create the pointer to lss back
1103 */
a49976d1
IM
1104 pushl %ss
1105 pushl %esp
1106 addl $4, (%esp)
d211af05
AH
1107 /* copy the iret frame of 12 bytes */
1108 .rept 3
a49976d1 1109 pushl 16(%esp)
d211af05 1110 .endr
a49976d1 1111 pushl %eax
d211af05 1112 SAVE_ALL
a49976d1
IM
1113 FIXUP_ESPFIX_STACK # %eax == %esp
1114 xorl %edx, %edx # zero error code
1115 call do_nmi
d211af05 1116 RESTORE_REGS
a49976d1
IM
1117 lss 12+4(%esp), %esp # back to espfix stack
1118 jmp irq_return
34273f41 1119#endif
d211af05
AH
1120END(nmi)
1121
1122ENTRY(int3)
e59d1b0a 1123 ASM_CLAC
a49976d1 1124 pushl $-1 # mark this as an int
d211af05
AH
1125 SAVE_ALL
1126 TRACE_IRQS_OFF
a49976d1
IM
1127 xorl %edx, %edx # zero error code
1128 movl %esp, %eax # pt_regs pointer
1129 call do_int3
1130 jmp ret_from_exception
d211af05
AH
1131END(int3)
1132
1133ENTRY(general_protection)
a49976d1
IM
1134 pushl $do_general_protection
1135 jmp error_code
d211af05
AH
1136END(general_protection)
1137
631bc487
GN
1138#ifdef CONFIG_KVM_GUEST
1139ENTRY(async_page_fault)
e59d1b0a 1140 ASM_CLAC
a49976d1
IM
1141 pushl $do_async_page_fault
1142 jmp error_code
2ae9d293 1143END(async_page_fault)
631bc487 1144#endif