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Commit | Line | Data |
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1da177e4 | 1 | /* |
a49976d1 | 2 | * Copyright (C) 1991,1992 Linus Torvalds |
1da177e4 | 3 | * |
a49976d1 | 4 | * entry_32.S contains the system-call and low-level fault and trap handling routines. |
1da177e4 | 5 | * |
39e8701f | 6 | * Stack layout while running C code: |
a49976d1 IM |
7 | * ptrace needs to have all registers on the stack. |
8 | * If the order here is changed, it needs to be | |
9 | * updated in fork.c:copy_process(), signal.c:do_signal(), | |
1da177e4 LT |
10 | * ptrace.c and ptrace.h |
11 | * | |
12 | * 0(%esp) - %ebx | |
13 | * 4(%esp) - %ecx | |
14 | * 8(%esp) - %edx | |
9b47feb7 | 15 | * C(%esp) - %esi |
1da177e4 LT |
16 | * 10(%esp) - %edi |
17 | * 14(%esp) - %ebp | |
18 | * 18(%esp) - %eax | |
19 | * 1C(%esp) - %ds | |
20 | * 20(%esp) - %es | |
464d1a78 | 21 | * 24(%esp) - %fs |
ccbeed3a TH |
22 | * 28(%esp) - %gs saved iff !CONFIG_X86_32_LAZY_GS |
23 | * 2C(%esp) - orig_eax | |
24 | * 30(%esp) - %eip | |
25 | * 34(%esp) - %cs | |
26 | * 38(%esp) - %eflags | |
27 | * 3C(%esp) - %oldesp | |
28 | * 40(%esp) - %oldss | |
1da177e4 LT |
29 | */ |
30 | ||
1da177e4 | 31 | #include <linux/linkage.h> |
d7e7528b | 32 | #include <linux/err.h> |
1da177e4 | 33 | #include <asm/thread_info.h> |
55f327fa | 34 | #include <asm/irqflags.h> |
1da177e4 LT |
35 | #include <asm/errno.h> |
36 | #include <asm/segment.h> | |
37 | #include <asm/smp.h> | |
0341c14d | 38 | #include <asm/page_types.h> |
be44d2aa | 39 | #include <asm/percpu.h> |
ab68ed98 | 40 | #include <asm/processor-flags.h> |
395a59d0 | 41 | #include <asm/ftrace.h> |
9b7dc567 | 42 | #include <asm/irq_vectors.h> |
cd4d09ec | 43 | #include <asm/cpufeatures.h> |
b4ca46e4 | 44 | #include <asm/alternative-asm.h> |
6837a54d | 45 | #include <asm/asm.h> |
e59d1b0a | 46 | #include <asm/smap.h> |
1da177e4 | 47 | |
ea714547 JO |
48 | .section .entry.text, "ax" |
49 | ||
139ec7c4 RR |
50 | /* |
51 | * We use macros for low-level operations which need to be overridden | |
52 | * for paravirtualization. The following will never clobber any registers: | |
53 | * INTERRUPT_RETURN (aka. "iret") | |
54 | * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax") | |
d75cd22f | 55 | * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit"). |
139ec7c4 RR |
56 | * |
57 | * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must | |
58 | * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY). | |
59 | * Allowing a register to be clobbered can shrink the paravirt replacement | |
60 | * enough to patch inline, increasing performance. | |
61 | */ | |
62 | ||
1da177e4 | 63 | #ifdef CONFIG_PREEMPT |
a49976d1 | 64 | # define preempt_stop(clobbers) DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF |
1da177e4 | 65 | #else |
a49976d1 IM |
66 | # define preempt_stop(clobbers) |
67 | # define resume_kernel restore_all | |
1da177e4 LT |
68 | #endif |
69 | ||
55f327fa IM |
70 | .macro TRACE_IRQS_IRET |
71 | #ifdef CONFIG_TRACE_IRQFLAGS | |
a49976d1 IM |
72 | testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off? |
73 | jz 1f | |
55f327fa IM |
74 | TRACE_IRQS_ON |
75 | 1: | |
76 | #endif | |
77 | .endm | |
78 | ||
ccbeed3a TH |
79 | /* |
80 | * User gs save/restore | |
81 | * | |
82 | * %gs is used for userland TLS and kernel only uses it for stack | |
83 | * canary which is required to be at %gs:20 by gcc. Read the comment | |
84 | * at the top of stackprotector.h for more info. | |
85 | * | |
86 | * Local labels 98 and 99 are used. | |
87 | */ | |
88 | #ifdef CONFIG_X86_32_LAZY_GS | |
89 | ||
90 | /* unfortunately push/pop can't be no-op */ | |
91 | .macro PUSH_GS | |
a49976d1 | 92 | pushl $0 |
ccbeed3a TH |
93 | .endm |
94 | .macro POP_GS pop=0 | |
a49976d1 | 95 | addl $(4 + \pop), %esp |
ccbeed3a TH |
96 | .endm |
97 | .macro POP_GS_EX | |
98 | .endm | |
99 | ||
100 | /* all the rest are no-op */ | |
101 | .macro PTGS_TO_GS | |
102 | .endm | |
103 | .macro PTGS_TO_GS_EX | |
104 | .endm | |
105 | .macro GS_TO_REG reg | |
106 | .endm | |
107 | .macro REG_TO_PTGS reg | |
108 | .endm | |
109 | .macro SET_KERNEL_GS reg | |
110 | .endm | |
111 | ||
112 | #else /* CONFIG_X86_32_LAZY_GS */ | |
113 | ||
114 | .macro PUSH_GS | |
a49976d1 | 115 | pushl %gs |
ccbeed3a TH |
116 | .endm |
117 | ||
118 | .macro POP_GS pop=0 | |
a49976d1 | 119 | 98: popl %gs |
ccbeed3a | 120 | .if \pop <> 0 |
9b47feb7 | 121 | add $\pop, %esp |
ccbeed3a TH |
122 | .endif |
123 | .endm | |
124 | .macro POP_GS_EX | |
125 | .pushsection .fixup, "ax" | |
a49976d1 IM |
126 | 99: movl $0, (%esp) |
127 | jmp 98b | |
ccbeed3a | 128 | .popsection |
a49976d1 | 129 | _ASM_EXTABLE(98b, 99b) |
ccbeed3a TH |
130 | .endm |
131 | ||
132 | .macro PTGS_TO_GS | |
a49976d1 | 133 | 98: mov PT_GS(%esp), %gs |
ccbeed3a TH |
134 | .endm |
135 | .macro PTGS_TO_GS_EX | |
136 | .pushsection .fixup, "ax" | |
a49976d1 IM |
137 | 99: movl $0, PT_GS(%esp) |
138 | jmp 98b | |
ccbeed3a | 139 | .popsection |
a49976d1 | 140 | _ASM_EXTABLE(98b, 99b) |
ccbeed3a TH |
141 | .endm |
142 | ||
143 | .macro GS_TO_REG reg | |
a49976d1 | 144 | movl %gs, \reg |
ccbeed3a TH |
145 | .endm |
146 | .macro REG_TO_PTGS reg | |
a49976d1 | 147 | movl \reg, PT_GS(%esp) |
ccbeed3a TH |
148 | .endm |
149 | .macro SET_KERNEL_GS reg | |
a49976d1 IM |
150 | movl $(__KERNEL_STACK_CANARY), \reg |
151 | movl \reg, %gs | |
ccbeed3a TH |
152 | .endm |
153 | ||
a49976d1 | 154 | #endif /* CONFIG_X86_32_LAZY_GS */ |
ccbeed3a | 155 | |
150ac78d | 156 | .macro SAVE_ALL pt_regs_ax=%eax |
f0d96110 | 157 | cld |
ccbeed3a | 158 | PUSH_GS |
a49976d1 IM |
159 | pushl %fs |
160 | pushl %es | |
161 | pushl %ds | |
150ac78d | 162 | pushl \pt_regs_ax |
a49976d1 IM |
163 | pushl %ebp |
164 | pushl %edi | |
165 | pushl %esi | |
166 | pushl %edx | |
167 | pushl %ecx | |
168 | pushl %ebx | |
169 | movl $(__USER_DS), %edx | |
170 | movl %edx, %ds | |
171 | movl %edx, %es | |
172 | movl $(__KERNEL_PERCPU), %edx | |
173 | movl %edx, %fs | |
ccbeed3a | 174 | SET_KERNEL_GS %edx |
f0d96110 | 175 | .endm |
1da177e4 | 176 | |
f0d96110 | 177 | .macro RESTORE_INT_REGS |
a49976d1 IM |
178 | popl %ebx |
179 | popl %ecx | |
180 | popl %edx | |
181 | popl %esi | |
182 | popl %edi | |
183 | popl %ebp | |
184 | popl %eax | |
f0d96110 | 185 | .endm |
1da177e4 | 186 | |
ccbeed3a | 187 | .macro RESTORE_REGS pop=0 |
f0d96110 | 188 | RESTORE_INT_REGS |
a49976d1 IM |
189 | 1: popl %ds |
190 | 2: popl %es | |
191 | 3: popl %fs | |
ccbeed3a | 192 | POP_GS \pop |
f0d96110 | 193 | .pushsection .fixup, "ax" |
a49976d1 IM |
194 | 4: movl $0, (%esp) |
195 | jmp 1b | |
196 | 5: movl $0, (%esp) | |
197 | jmp 2b | |
198 | 6: movl $0, (%esp) | |
199 | jmp 3b | |
f95d47ca | 200 | .popsection |
a49976d1 IM |
201 | _ASM_EXTABLE(1b, 4b) |
202 | _ASM_EXTABLE(2b, 5b) | |
203 | _ASM_EXTABLE(3b, 6b) | |
ccbeed3a | 204 | POP_GS_EX |
f0d96110 | 205 | .endm |
1da177e4 | 206 | |
1da177e4 | 207 | ENTRY(ret_from_fork) |
a49976d1 IM |
208 | pushl %eax |
209 | call schedule_tail | |
1da177e4 | 210 | GET_THREAD_INFO(%ebp) |
a49976d1 IM |
211 | popl %eax |
212 | pushl $0x0202 # Reset kernel eflags | |
131484c8 | 213 | popfl |
39e8701f AL |
214 | |
215 | /* When we fork, we trace the syscall return in the child, too. */ | |
216 | movl %esp, %eax | |
217 | call syscall_return_slowpath | |
218 | jmp restore_all | |
47a55cd7 | 219 | END(ret_from_fork) |
1da177e4 | 220 | |
22e2430d | 221 | ENTRY(ret_from_kernel_thread) |
a49976d1 IM |
222 | pushl %eax |
223 | call schedule_tail | |
6783eaa2 | 224 | GET_THREAD_INFO(%ebp) |
a49976d1 IM |
225 | popl %eax |
226 | pushl $0x0202 # Reset kernel eflags | |
131484c8 | 227 | popfl |
a49976d1 IM |
228 | movl PT_EBP(%esp), %eax |
229 | call *PT_EBX(%esp) | |
230 | movl $0, PT_EAX(%esp) | |
39e8701f AL |
231 | |
232 | /* | |
233 | * Kernel threads return to userspace as if returning from a syscall. | |
234 | * We should check whether anything actually uses this path and, if so, | |
235 | * consider switching it over to ret_from_fork. | |
236 | */ | |
237 | movl %esp, %eax | |
238 | call syscall_return_slowpath | |
239 | jmp restore_all | |
22e2430d | 240 | ENDPROC(ret_from_kernel_thread) |
6783eaa2 | 241 | |
1da177e4 LT |
242 | /* |
243 | * Return to user mode is not as complex as all this looks, | |
244 | * but we want the default path for a system call return to | |
245 | * go as quickly as possible which is why some of this is | |
246 | * less clear than it otherwise should be. | |
247 | */ | |
248 | ||
249 | # userspace resumption stub bypassing syscall exit tracing | |
250 | ALIGN | |
251 | ret_from_exception: | |
139ec7c4 | 252 | preempt_stop(CLBR_ANY) |
1da177e4 LT |
253 | ret_from_intr: |
254 | GET_THREAD_INFO(%ebp) | |
29a2e283 | 255 | #ifdef CONFIG_VM86 |
a49976d1 IM |
256 | movl PT_EFLAGS(%esp), %eax # mix EFLAGS and CS |
257 | movb PT_CS(%esp), %al | |
258 | andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax | |
29a2e283 DA |
259 | #else |
260 | /* | |
6783eaa2 | 261 | * We can be coming here from child spawned by kernel_thread(). |
29a2e283 | 262 | */ |
a49976d1 IM |
263 | movl PT_CS(%esp), %eax |
264 | andl $SEGMENT_RPL_MASK, %eax | |
29a2e283 | 265 | #endif |
a49976d1 IM |
266 | cmpl $USER_RPL, %eax |
267 | jb resume_kernel # not returning to v8086 or userspace | |
f95d47ca | 268 | |
1da177e4 | 269 | ENTRY(resume_userspace) |
5d73fc70 | 270 | DISABLE_INTERRUPTS(CLBR_ANY) |
e32e58a9 | 271 | TRACE_IRQS_OFF |
5d73fc70 AL |
272 | movl %esp, %eax |
273 | call prepare_exit_to_usermode | |
a49976d1 | 274 | jmp restore_all |
47a55cd7 | 275 | END(ret_from_exception) |
1da177e4 LT |
276 | |
277 | #ifdef CONFIG_PREEMPT | |
278 | ENTRY(resume_kernel) | |
139ec7c4 | 279 | DISABLE_INTERRUPTS(CLBR_ANY) |
1da177e4 | 280 | need_resched: |
a49976d1 IM |
281 | cmpl $0, PER_CPU_VAR(__preempt_count) |
282 | jnz restore_all | |
283 | testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off (exception path) ? | |
284 | jz restore_all | |
285 | call preempt_schedule_irq | |
286 | jmp need_resched | |
47a55cd7 | 287 | END(resume_kernel) |
1da177e4 LT |
288 | #endif |
289 | ||
a49976d1 | 290 | # SYSENTER call handler stub |
4c8cd0c5 | 291 | ENTRY(entry_SYSENTER_32) |
a49976d1 | 292 | movl TSS_sysenter_sp0(%esp), %esp |
1da177e4 | 293 | sysenter_past_esp: |
5f310f73 | 294 | pushl $__USER_DS /* pt_regs->ss */ |
30bfa7b3 | 295 | pushl %ebp /* pt_regs->sp (stashed in bp) */ |
5f310f73 | 296 | pushfl /* pt_regs->flags (except IF = 0) */ |
04d1d281 | 297 | ASM_CLAC /* Clear AC after saving FLAGS */ |
5f310f73 AL |
298 | orl $X86_EFLAGS_IF, (%esp) /* Fix IF */ |
299 | pushl $__USER_CS /* pt_regs->cs */ | |
300 | pushl $0 /* pt_regs->ip = 0 (placeholder) */ | |
301 | pushl %eax /* pt_regs->orig_ax */ | |
302 | SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */ | |
303 | ||
55f327fa | 304 | /* |
5f310f73 AL |
305 | * User mode is traced as though IRQs are on, and SYSENTER |
306 | * turned them off. | |
e6e5494c | 307 | */ |
55f327fa | 308 | TRACE_IRQS_OFF |
5f310f73 AL |
309 | |
310 | movl %esp, %eax | |
311 | call do_fast_syscall_32 | |
91e2eea9 BO |
312 | /* XEN PV guests always use IRET path */ |
313 | ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \ | |
314 | "jmp .Lsyscall_32_done", X86_FEATURE_XENPV | |
5f310f73 AL |
315 | |
316 | /* Opportunistic SYSEXIT */ | |
317 | TRACE_IRQS_ON /* User mode traces as IRQs on. */ | |
318 | movl PT_EIP(%esp), %edx /* pt_regs->ip */ | |
319 | movl PT_OLDESP(%esp), %ecx /* pt_regs->sp */ | |
3bd29515 AL |
320 | 1: mov PT_FS(%esp), %fs |
321 | PTGS_TO_GS | |
5f310f73 AL |
322 | popl %ebx /* pt_regs->bx */ |
323 | addl $2*4, %esp /* skip pt_regs->cx and pt_regs->dx */ | |
324 | popl %esi /* pt_regs->si */ | |
325 | popl %edi /* pt_regs->di */ | |
326 | popl %ebp /* pt_regs->bp */ | |
327 | popl %eax /* pt_regs->ax */ | |
5f310f73 AL |
328 | |
329 | /* | |
330 | * Return back to the vDSO, which will pop ecx and edx. | |
331 | * Don't bother with DS and ES (they already contain __USER_DS). | |
332 | */ | |
88c15ec9 BO |
333 | sti |
334 | sysexit | |
af0575bb | 335 | |
a49976d1 IM |
336 | .pushsection .fixup, "ax" |
337 | 2: movl $0, PT_FS(%esp) | |
338 | jmp 1b | |
f95d47ca | 339 | .popsection |
a49976d1 | 340 | _ASM_EXTABLE(1b, 2b) |
ccbeed3a | 341 | PTGS_TO_GS_EX |
4c8cd0c5 | 342 | ENDPROC(entry_SYSENTER_32) |
1da177e4 LT |
343 | |
344 | # system call handler stub | |
b2502b41 | 345 | ENTRY(entry_INT80_32) |
e59d1b0a | 346 | ASM_CLAC |
150ac78d | 347 | pushl %eax /* pt_regs->orig_ax */ |
5f310f73 | 348 | SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */ |
150ac78d AL |
349 | |
350 | /* | |
657c1eea AL |
351 | * User mode is traced as though IRQs are on. Unlike the 64-bit |
352 | * case, INT80 is a trap gate on 32-bit kernels, so interrupts | |
353 | * are already on (unless user code is messing around with iopl). | |
150ac78d | 354 | */ |
150ac78d AL |
355 | |
356 | movl %esp, %eax | |
657c1eea | 357 | call do_syscall_32_irqs_on |
5f310f73 | 358 | .Lsyscall_32_done: |
1da177e4 LT |
359 | |
360 | restore_all: | |
2e04bc76 AH |
361 | TRACE_IRQS_IRET |
362 | restore_all_notrace: | |
34273f41 | 363 | #ifdef CONFIG_X86_ESPFIX32 |
58a5aac5 AL |
364 | ALTERNATIVE "jmp restore_nocheck", "", X86_BUG_ESPFIX |
365 | ||
a49976d1 IM |
366 | movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS |
367 | /* | |
368 | * Warning: PT_OLDSS(%esp) contains the wrong/random values if we | |
369 | * are returning to the kernel. | |
370 | * See comments in process.c:copy_thread() for details. | |
371 | */ | |
372 | movb PT_OLDSS(%esp), %ah | |
373 | movb PT_CS(%esp), %al | |
374 | andl $(X86_EFLAGS_VM | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax | |
375 | cmpl $((SEGMENT_LDT << 8) | USER_RPL), %eax | |
376 | je ldt_ss # returning to user-space with LDT SS | |
34273f41 | 377 | #endif |
1da177e4 | 378 | restore_nocheck: |
a49976d1 | 379 | RESTORE_REGS 4 # skip orig_eax/error_code |
f7f3d791 | 380 | irq_return: |
3701d863 | 381 | INTERRUPT_RETURN |
a49976d1 IM |
382 | .section .fixup, "ax" |
383 | ENTRY(iret_exc ) | |
384 | pushl $0 # no error code | |
385 | pushl $do_iret_error | |
386 | jmp error_code | |
1da177e4 | 387 | .previous |
a49976d1 | 388 | _ASM_EXTABLE(irq_return, iret_exc) |
1da177e4 | 389 | |
34273f41 | 390 | #ifdef CONFIG_X86_ESPFIX32 |
1da177e4 | 391 | ldt_ss: |
dc4c2a0a AH |
392 | /* |
393 | * Setup and switch to ESPFIX stack | |
394 | * | |
395 | * We're returning to userspace with a 16 bit stack. The CPU will not | |
396 | * restore the high word of ESP for us on executing iret... This is an | |
397 | * "official" bug of all the x86-compatible CPUs, which we can work | |
398 | * around to make dosemu and wine happy. We do this by preloading the | |
399 | * high word of ESP with the high word of the userspace ESP while | |
400 | * compensating for the offset by changing to the ESPFIX segment with | |
401 | * a base address that matches for the difference. | |
402 | */ | |
72c511dd | 403 | #define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + (GDT_ENTRY_ESPFIX_SS * 8) |
a49976d1 IM |
404 | mov %esp, %edx /* load kernel esp */ |
405 | mov PT_OLDESP(%esp), %eax /* load userspace esp */ | |
406 | mov %dx, %ax /* eax: new kernel esp */ | |
9b47feb7 DV |
407 | sub %eax, %edx /* offset (low word is 0) */ |
408 | shr $16, %edx | |
a49976d1 IM |
409 | mov %dl, GDT_ESPFIX_SS + 4 /* bits 16..23 */ |
410 | mov %dh, GDT_ESPFIX_SS + 7 /* bits 24..31 */ | |
411 | pushl $__ESPFIX_SS | |
412 | pushl %eax /* new kernel esp */ | |
413 | /* | |
414 | * Disable interrupts, but do not irqtrace this section: we | |
2e04bc76 | 415 | * will soon execute iret and the tracer was already set to |
a49976d1 IM |
416 | * the irqstate after the IRET: |
417 | */ | |
139ec7c4 | 418 | DISABLE_INTERRUPTS(CLBR_EAX) |
a49976d1 IM |
419 | lss (%esp), %esp /* switch to espfix segment */ |
420 | jmp restore_nocheck | |
34273f41 | 421 | #endif |
b2502b41 | 422 | ENDPROC(entry_INT80_32) |
1da177e4 | 423 | |
f0d96110 | 424 | .macro FIXUP_ESPFIX_STACK |
dc4c2a0a AH |
425 | /* |
426 | * Switch back for ESPFIX stack to the normal zerobased stack | |
427 | * | |
428 | * We can't call C functions using the ESPFIX stack. This code reads | |
429 | * the high word of the segment base from the GDT and swiches to the | |
430 | * normal stack and adjusts ESP with the matching offset. | |
431 | */ | |
34273f41 | 432 | #ifdef CONFIG_X86_ESPFIX32 |
dc4c2a0a | 433 | /* fixup the stack */ |
a49976d1 IM |
434 | mov GDT_ESPFIX_SS + 4, %al /* bits 16..23 */ |
435 | mov GDT_ESPFIX_SS + 7, %ah /* bits 24..31 */ | |
9b47feb7 | 436 | shl $16, %eax |
a49976d1 IM |
437 | addl %esp, %eax /* the adjusted stack pointer */ |
438 | pushl $__KERNEL_DS | |
439 | pushl %eax | |
440 | lss (%esp), %esp /* switch to the normal stack segment */ | |
34273f41 | 441 | #endif |
f0d96110 TH |
442 | .endm |
443 | .macro UNWIND_ESPFIX_STACK | |
34273f41 | 444 | #ifdef CONFIG_X86_ESPFIX32 |
a49976d1 | 445 | movl %ss, %eax |
f0d96110 | 446 | /* see if on espfix stack */ |
a49976d1 IM |
447 | cmpw $__ESPFIX_SS, %ax |
448 | jne 27f | |
449 | movl $__KERNEL_DS, %eax | |
450 | movl %eax, %ds | |
451 | movl %eax, %es | |
f0d96110 TH |
452 | /* switch to normal stack */ |
453 | FIXUP_ESPFIX_STACK | |
454 | 27: | |
34273f41 | 455 | #endif |
f0d96110 | 456 | .endm |
1da177e4 LT |
457 | |
458 | /* | |
3304c9c3 DV |
459 | * Build the entry stubs with some assembler magic. |
460 | * We pack 1 stub into every 8-byte block. | |
1da177e4 | 461 | */ |
3304c9c3 | 462 | .align 8 |
1da177e4 | 463 | ENTRY(irq_entries_start) |
3304c9c3 DV |
464 | vector=FIRST_EXTERNAL_VECTOR |
465 | .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR) | |
a49976d1 | 466 | pushl $(~vector+0x80) /* Note: always in signed byte range */ |
3304c9c3 DV |
467 | vector=vector+1 |
468 | jmp common_interrupt | |
3304c9c3 DV |
469 | .align 8 |
470 | .endr | |
47a55cd7 JB |
471 | END(irq_entries_start) |
472 | ||
55f327fa IM |
473 | /* |
474 | * the CPU automatically disables interrupts when executing an IRQ vector, | |
475 | * so IRQ-flags tracing has to follow that: | |
476 | */ | |
b7c6244f | 477 | .p2align CONFIG_X86_L1_CACHE_SHIFT |
1da177e4 | 478 | common_interrupt: |
e59d1b0a | 479 | ASM_CLAC |
a49976d1 | 480 | addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */ |
1da177e4 | 481 | SAVE_ALL |
55f327fa | 482 | TRACE_IRQS_OFF |
a49976d1 IM |
483 | movl %esp, %eax |
484 | call do_IRQ | |
485 | jmp ret_from_intr | |
47a55cd7 | 486 | ENDPROC(common_interrupt) |
1da177e4 | 487 | |
02cf94c3 | 488 | #define BUILD_INTERRUPT3(name, nr, fn) \ |
1da177e4 | 489 | ENTRY(name) \ |
e59d1b0a | 490 | ASM_CLAC; \ |
a49976d1 | 491 | pushl $~(nr); \ |
fe7cacc1 | 492 | SAVE_ALL; \ |
55f327fa | 493 | TRACE_IRQS_OFF \ |
a49976d1 IM |
494 | movl %esp, %eax; \ |
495 | call fn; \ | |
496 | jmp ret_from_intr; \ | |
47a55cd7 | 497 | ENDPROC(name) |
1da177e4 | 498 | |
cf910e83 SA |
499 | |
500 | #ifdef CONFIG_TRACING | |
a49976d1 | 501 | # define TRACE_BUILD_INTERRUPT(name, nr) BUILD_INTERRUPT3(trace_##name, nr, smp_trace_##name) |
cf910e83 | 502 | #else |
a49976d1 | 503 | # define TRACE_BUILD_INTERRUPT(name, nr) |
cf910e83 SA |
504 | #endif |
505 | ||
a49976d1 IM |
506 | #define BUILD_INTERRUPT(name, nr) \ |
507 | BUILD_INTERRUPT3(name, nr, smp_##name); \ | |
cf910e83 | 508 | TRACE_BUILD_INTERRUPT(name, nr) |
02cf94c3 | 509 | |
1da177e4 | 510 | /* The include is where all of the SMP etc. interrupts come from */ |
1164dd00 | 511 | #include <asm/entry_arch.h> |
1da177e4 | 512 | |
1da177e4 | 513 | ENTRY(coprocessor_error) |
e59d1b0a | 514 | ASM_CLAC |
a49976d1 IM |
515 | pushl $0 |
516 | pushl $do_coprocessor_error | |
517 | jmp error_code | |
47a55cd7 | 518 | END(coprocessor_error) |
1da177e4 LT |
519 | |
520 | ENTRY(simd_coprocessor_error) | |
e59d1b0a | 521 | ASM_CLAC |
a49976d1 | 522 | pushl $0 |
40d2e763 BG |
523 | #ifdef CONFIG_X86_INVD_BUG |
524 | /* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */ | |
a49976d1 IM |
525 | ALTERNATIVE "pushl $do_general_protection", \ |
526 | "pushl $do_simd_coprocessor_error", \ | |
8e65f6e0 | 527 | X86_FEATURE_XMM |
40d2e763 | 528 | #else |
a49976d1 | 529 | pushl $do_simd_coprocessor_error |
40d2e763 | 530 | #endif |
a49976d1 | 531 | jmp error_code |
47a55cd7 | 532 | END(simd_coprocessor_error) |
1da177e4 LT |
533 | |
534 | ENTRY(device_not_available) | |
e59d1b0a | 535 | ASM_CLAC |
a49976d1 IM |
536 | pushl $-1 # mark this as an int |
537 | pushl $do_device_not_available | |
538 | jmp error_code | |
47a55cd7 | 539 | END(device_not_available) |
1da177e4 | 540 | |
d3561b7f RR |
541 | #ifdef CONFIG_PARAVIRT |
542 | ENTRY(native_iret) | |
3701d863 | 543 | iret |
6837a54d | 544 | _ASM_EXTABLE(native_iret, iret_exc) |
47a55cd7 | 545 | END(native_iret) |
d3561b7f RR |
546 | #endif |
547 | ||
1da177e4 | 548 | ENTRY(overflow) |
e59d1b0a | 549 | ASM_CLAC |
a49976d1 IM |
550 | pushl $0 |
551 | pushl $do_overflow | |
552 | jmp error_code | |
47a55cd7 | 553 | END(overflow) |
1da177e4 LT |
554 | |
555 | ENTRY(bounds) | |
e59d1b0a | 556 | ASM_CLAC |
a49976d1 IM |
557 | pushl $0 |
558 | pushl $do_bounds | |
559 | jmp error_code | |
47a55cd7 | 560 | END(bounds) |
1da177e4 LT |
561 | |
562 | ENTRY(invalid_op) | |
e59d1b0a | 563 | ASM_CLAC |
a49976d1 IM |
564 | pushl $0 |
565 | pushl $do_invalid_op | |
566 | jmp error_code | |
47a55cd7 | 567 | END(invalid_op) |
1da177e4 LT |
568 | |
569 | ENTRY(coprocessor_segment_overrun) | |
e59d1b0a | 570 | ASM_CLAC |
a49976d1 IM |
571 | pushl $0 |
572 | pushl $do_coprocessor_segment_overrun | |
573 | jmp error_code | |
47a55cd7 | 574 | END(coprocessor_segment_overrun) |
1da177e4 LT |
575 | |
576 | ENTRY(invalid_TSS) | |
e59d1b0a | 577 | ASM_CLAC |
a49976d1 IM |
578 | pushl $do_invalid_TSS |
579 | jmp error_code | |
47a55cd7 | 580 | END(invalid_TSS) |
1da177e4 LT |
581 | |
582 | ENTRY(segment_not_present) | |
e59d1b0a | 583 | ASM_CLAC |
a49976d1 IM |
584 | pushl $do_segment_not_present |
585 | jmp error_code | |
47a55cd7 | 586 | END(segment_not_present) |
1da177e4 LT |
587 | |
588 | ENTRY(stack_segment) | |
e59d1b0a | 589 | ASM_CLAC |
a49976d1 IM |
590 | pushl $do_stack_segment |
591 | jmp error_code | |
47a55cd7 | 592 | END(stack_segment) |
1da177e4 | 593 | |
1da177e4 | 594 | ENTRY(alignment_check) |
e59d1b0a | 595 | ASM_CLAC |
a49976d1 IM |
596 | pushl $do_alignment_check |
597 | jmp error_code | |
47a55cd7 | 598 | END(alignment_check) |
1da177e4 | 599 | |
d28c4393 | 600 | ENTRY(divide_error) |
e59d1b0a | 601 | ASM_CLAC |
a49976d1 IM |
602 | pushl $0 # no error code |
603 | pushl $do_divide_error | |
604 | jmp error_code | |
47a55cd7 | 605 | END(divide_error) |
1da177e4 LT |
606 | |
607 | #ifdef CONFIG_X86_MCE | |
608 | ENTRY(machine_check) | |
e59d1b0a | 609 | ASM_CLAC |
a49976d1 IM |
610 | pushl $0 |
611 | pushl machine_check_vector | |
612 | jmp error_code | |
47a55cd7 | 613 | END(machine_check) |
1da177e4 LT |
614 | #endif |
615 | ||
616 | ENTRY(spurious_interrupt_bug) | |
e59d1b0a | 617 | ASM_CLAC |
a49976d1 IM |
618 | pushl $0 |
619 | pushl $do_spurious_interrupt_bug | |
620 | jmp error_code | |
47a55cd7 | 621 | END(spurious_interrupt_bug) |
1da177e4 | 622 | |
5ead97c8 | 623 | #ifdef CONFIG_XEN |
a49976d1 IM |
624 | /* |
625 | * Xen doesn't set %esp to be precisely what the normal SYSENTER | |
626 | * entry point expects, so fix it up before using the normal path. | |
627 | */ | |
e2a81baf | 628 | ENTRY(xen_sysenter_target) |
a49976d1 IM |
629 | addl $5*4, %esp /* remove xen-provided frame */ |
630 | jmp sysenter_past_esp | |
e2a81baf | 631 | |
5ead97c8 | 632 | ENTRY(xen_hypervisor_callback) |
a49976d1 | 633 | pushl $-1 /* orig_ax = -1 => not a system call */ |
5ead97c8 JF |
634 | SAVE_ALL |
635 | TRACE_IRQS_OFF | |
9ec2b804 | 636 | |
a49976d1 IM |
637 | /* |
638 | * Check to see if we got the event in the critical | |
639 | * region in xen_iret_direct, after we've reenabled | |
640 | * events and checked for pending events. This simulates | |
641 | * iret instruction's behaviour where it delivers a | |
642 | * pending interrupt when enabling interrupts: | |
643 | */ | |
644 | movl PT_EIP(%esp), %eax | |
645 | cmpl $xen_iret_start_crit, %eax | |
646 | jb 1f | |
647 | cmpl $xen_iret_end_crit, %eax | |
648 | jae 1f | |
9ec2b804 | 649 | |
a49976d1 | 650 | jmp xen_iret_crit_fixup |
e2a81baf | 651 | |
e2a81baf | 652 | ENTRY(xen_do_upcall) |
a49976d1 IM |
653 | 1: mov %esp, %eax |
654 | call xen_evtchn_do_upcall | |
fdfd811d | 655 | #ifndef CONFIG_PREEMPT |
a49976d1 | 656 | call xen_maybe_preempt_hcall |
fdfd811d | 657 | #endif |
a49976d1 | 658 | jmp ret_from_intr |
5ead97c8 JF |
659 | ENDPROC(xen_hypervisor_callback) |
660 | ||
a49976d1 IM |
661 | /* |
662 | * Hypervisor uses this for application faults while it executes. | |
663 | * We get here for two reasons: | |
664 | * 1. Fault while reloading DS, ES, FS or GS | |
665 | * 2. Fault while executing IRET | |
666 | * Category 1 we fix up by reattempting the load, and zeroing the segment | |
667 | * register if the load fails. | |
668 | * Category 2 we fix up by jumping to do_iret_error. We cannot use the | |
669 | * normal Linux return path in this case because if we use the IRET hypercall | |
670 | * to pop the stack frame we end up in an infinite loop of failsafe callbacks. | |
671 | * We distinguish between categories by maintaining a status value in EAX. | |
672 | */ | |
5ead97c8 | 673 | ENTRY(xen_failsafe_callback) |
a49976d1 IM |
674 | pushl %eax |
675 | movl $1, %eax | |
676 | 1: mov 4(%esp), %ds | |
677 | 2: mov 8(%esp), %es | |
678 | 3: mov 12(%esp), %fs | |
679 | 4: mov 16(%esp), %gs | |
a349e23d DV |
680 | /* EAX == 0 => Category 1 (Bad segment) |
681 | EAX != 0 => Category 2 (Bad IRET) */ | |
a49976d1 IM |
682 | testl %eax, %eax |
683 | popl %eax | |
684 | lea 16(%esp), %esp | |
685 | jz 5f | |
686 | jmp iret_exc | |
687 | 5: pushl $-1 /* orig_ax = -1 => not a system call */ | |
5ead97c8 | 688 | SAVE_ALL |
a49976d1 IM |
689 | jmp ret_from_exception |
690 | ||
691 | .section .fixup, "ax" | |
692 | 6: xorl %eax, %eax | |
693 | movl %eax, 4(%esp) | |
694 | jmp 1b | |
695 | 7: xorl %eax, %eax | |
696 | movl %eax, 8(%esp) | |
697 | jmp 2b | |
698 | 8: xorl %eax, %eax | |
699 | movl %eax, 12(%esp) | |
700 | jmp 3b | |
701 | 9: xorl %eax, %eax | |
702 | movl %eax, 16(%esp) | |
703 | jmp 4b | |
5ead97c8 | 704 | .previous |
a49976d1 IM |
705 | _ASM_EXTABLE(1b, 6b) |
706 | _ASM_EXTABLE(2b, 7b) | |
707 | _ASM_EXTABLE(3b, 8b) | |
708 | _ASM_EXTABLE(4b, 9b) | |
5ead97c8 JF |
709 | ENDPROC(xen_failsafe_callback) |
710 | ||
bc2b0331 | 711 | BUILD_INTERRUPT3(xen_hvm_callback_vector, HYPERVISOR_CALLBACK_VECTOR, |
38e20b07 SY |
712 | xen_evtchn_do_upcall) |
713 | ||
a49976d1 | 714 | #endif /* CONFIG_XEN */ |
bc2b0331 S |
715 | |
716 | #if IS_ENABLED(CONFIG_HYPERV) | |
717 | ||
718 | BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR, | |
719 | hyperv_vector_handler) | |
720 | ||
721 | #endif /* CONFIG_HYPERV */ | |
5ead97c8 | 722 | |
606576ce | 723 | #ifdef CONFIG_FUNCTION_TRACER |
d61f82d0 SR |
724 | #ifdef CONFIG_DYNAMIC_FTRACE |
725 | ||
726 | ENTRY(mcount) | |
d61f82d0 SR |
727 | ret |
728 | END(mcount) | |
729 | ||
730 | ENTRY(ftrace_caller) | |
a49976d1 IM |
731 | pushl %eax |
732 | pushl %ecx | |
733 | pushl %edx | |
734 | pushl $0 /* Pass NULL as regs pointer */ | |
735 | movl 4*4(%esp), %eax | |
736 | movl 0x4(%ebp), %edx | |
737 | movl function_trace_op, %ecx | |
738 | subl $MCOUNT_INSN_SIZE, %eax | |
d61f82d0 SR |
739 | |
740 | .globl ftrace_call | |
741 | ftrace_call: | |
a49976d1 | 742 | call ftrace_stub |
d61f82d0 | 743 | |
a49976d1 IM |
744 | addl $4, %esp /* skip NULL pointer */ |
745 | popl %edx | |
746 | popl %ecx | |
747 | popl %eax | |
4de72395 | 748 | ftrace_ret: |
5a45cfe1 SR |
749 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
750 | .globl ftrace_graph_call | |
751 | ftrace_graph_call: | |
a49976d1 | 752 | jmp ftrace_stub |
5a45cfe1 | 753 | #endif |
d61f82d0 SR |
754 | |
755 | .globl ftrace_stub | |
756 | ftrace_stub: | |
757 | ret | |
758 | END(ftrace_caller) | |
759 | ||
4de72395 SR |
760 | ENTRY(ftrace_regs_caller) |
761 | pushf /* push flags before compare (in cs location) */ | |
4de72395 SR |
762 | |
763 | /* | |
764 | * i386 does not save SS and ESP when coming from kernel. | |
765 | * Instead, to get sp, ®s->sp is used (see ptrace.h). | |
766 | * Unfortunately, that means eflags must be at the same location | |
767 | * as the current return ip is. We move the return ip into the | |
768 | * ip location, and move flags into the return ip location. | |
769 | */ | |
a49976d1 IM |
770 | pushl 4(%esp) /* save return ip into ip slot */ |
771 | ||
772 | pushl $0 /* Load 0 into orig_ax */ | |
773 | pushl %gs | |
774 | pushl %fs | |
775 | pushl %es | |
776 | pushl %ds | |
777 | pushl %eax | |
778 | pushl %ebp | |
779 | pushl %edi | |
780 | pushl %esi | |
781 | pushl %edx | |
782 | pushl %ecx | |
783 | pushl %ebx | |
784 | ||
785 | movl 13*4(%esp), %eax /* Get the saved flags */ | |
786 | movl %eax, 14*4(%esp) /* Move saved flags into regs->flags location */ | |
787 | /* clobbering return ip */ | |
788 | movl $__KERNEL_CS, 13*4(%esp) | |
789 | ||
790 | movl 12*4(%esp), %eax /* Load ip (1st parameter) */ | |
791 | subl $MCOUNT_INSN_SIZE, %eax /* Adjust ip */ | |
792 | movl 0x4(%ebp), %edx /* Load parent ip (2nd parameter) */ | |
793 | movl function_trace_op, %ecx /* Save ftrace_pos in 3rd parameter */ | |
794 | pushl %esp /* Save pt_regs as 4th parameter */ | |
4de72395 SR |
795 | |
796 | GLOBAL(ftrace_regs_call) | |
a49976d1 IM |
797 | call ftrace_stub |
798 | ||
799 | addl $4, %esp /* Skip pt_regs */ | |
800 | movl 14*4(%esp), %eax /* Move flags back into cs */ | |
801 | movl %eax, 13*4(%esp) /* Needed to keep addl from modifying flags */ | |
802 | movl 12*4(%esp), %eax /* Get return ip from regs->ip */ | |
803 | movl %eax, 14*4(%esp) /* Put return ip back for ret */ | |
804 | ||
805 | popl %ebx | |
806 | popl %ecx | |
807 | popl %edx | |
808 | popl %esi | |
809 | popl %edi | |
810 | popl %ebp | |
811 | popl %eax | |
812 | popl %ds | |
813 | popl %es | |
814 | popl %fs | |
815 | popl %gs | |
816 | addl $8, %esp /* Skip orig_ax and ip */ | |
817 | popf /* Pop flags at end (no addl to corrupt flags) */ | |
818 | jmp ftrace_ret | |
4de72395 | 819 | |
4de72395 | 820 | popf |
a49976d1 | 821 | jmp ftrace_stub |
d61f82d0 SR |
822 | #else /* ! CONFIG_DYNAMIC_FTRACE */ |
823 | ||
16444a8a | 824 | ENTRY(mcount) |
a49976d1 IM |
825 | cmpl $__PAGE_OFFSET, %esp |
826 | jb ftrace_stub /* Paging not enabled yet? */ | |
af058ab0 | 827 | |
a49976d1 IM |
828 | cmpl $ftrace_stub, ftrace_trace_function |
829 | jnz trace | |
fb52607a | 830 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
a49976d1 IM |
831 | cmpl $ftrace_stub, ftrace_graph_return |
832 | jnz ftrace_graph_caller | |
e49dc19c | 833 | |
a49976d1 IM |
834 | cmpl $ftrace_graph_entry_stub, ftrace_graph_entry |
835 | jnz ftrace_graph_caller | |
caf4b323 | 836 | #endif |
16444a8a ACM |
837 | .globl ftrace_stub |
838 | ftrace_stub: | |
839 | ret | |
840 | ||
841 | /* taken from glibc */ | |
842 | trace: | |
a49976d1 IM |
843 | pushl %eax |
844 | pushl %ecx | |
845 | pushl %edx | |
846 | movl 0xc(%esp), %eax | |
847 | movl 0x4(%ebp), %edx | |
848 | subl $MCOUNT_INSN_SIZE, %eax | |
849 | ||
850 | call *ftrace_trace_function | |
851 | ||
852 | popl %edx | |
853 | popl %ecx | |
854 | popl %eax | |
855 | jmp ftrace_stub | |
16444a8a | 856 | END(mcount) |
d61f82d0 | 857 | #endif /* CONFIG_DYNAMIC_FTRACE */ |
606576ce | 858 | #endif /* CONFIG_FUNCTION_TRACER */ |
16444a8a | 859 | |
fb52607a FW |
860 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
861 | ENTRY(ftrace_graph_caller) | |
a49976d1 IM |
862 | pushl %eax |
863 | pushl %ecx | |
864 | pushl %edx | |
865 | movl 0xc(%esp), %eax | |
866 | lea 0x4(%ebp), %edx | |
867 | movl (%ebp), %ecx | |
868 | subl $MCOUNT_INSN_SIZE, %eax | |
869 | call prepare_ftrace_return | |
870 | popl %edx | |
871 | popl %ecx | |
872 | popl %eax | |
e7d3737e | 873 | ret |
fb52607a | 874 | END(ftrace_graph_caller) |
caf4b323 FW |
875 | |
876 | .globl return_to_handler | |
877 | return_to_handler: | |
a49976d1 IM |
878 | pushl %eax |
879 | pushl %edx | |
880 | movl %ebp, %eax | |
881 | call ftrace_return_to_handler | |
882 | movl %eax, %ecx | |
883 | popl %edx | |
884 | popl %eax | |
885 | jmp *%ecx | |
e7d3737e | 886 | #endif |
16444a8a | 887 | |
25c74b10 SA |
888 | #ifdef CONFIG_TRACING |
889 | ENTRY(trace_page_fault) | |
25c74b10 | 890 | ASM_CLAC |
a49976d1 IM |
891 | pushl $trace_do_page_fault |
892 | jmp error_code | |
25c74b10 SA |
893 | END(trace_page_fault) |
894 | #endif | |
895 | ||
d211af05 | 896 | ENTRY(page_fault) |
e59d1b0a | 897 | ASM_CLAC |
a49976d1 | 898 | pushl $do_page_fault |
d211af05 AH |
899 | ALIGN |
900 | error_code: | |
ccbeed3a | 901 | /* the function address is in %gs's slot on the stack */ |
a49976d1 IM |
902 | pushl %fs |
903 | pushl %es | |
904 | pushl %ds | |
905 | pushl %eax | |
906 | pushl %ebp | |
907 | pushl %edi | |
908 | pushl %esi | |
909 | pushl %edx | |
910 | pushl %ecx | |
911 | pushl %ebx | |
d211af05 | 912 | cld |
a49976d1 IM |
913 | movl $(__KERNEL_PERCPU), %ecx |
914 | movl %ecx, %fs | |
d211af05 | 915 | UNWIND_ESPFIX_STACK |
ccbeed3a | 916 | GS_TO_REG %ecx |
a49976d1 IM |
917 | movl PT_GS(%esp), %edi # get the function address |
918 | movl PT_ORIG_EAX(%esp), %edx # get the error code | |
919 | movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart | |
ccbeed3a TH |
920 | REG_TO_PTGS %ecx |
921 | SET_KERNEL_GS %ecx | |
a49976d1 IM |
922 | movl $(__USER_DS), %ecx |
923 | movl %ecx, %ds | |
924 | movl %ecx, %es | |
d211af05 | 925 | TRACE_IRQS_OFF |
a49976d1 IM |
926 | movl %esp, %eax # pt_regs pointer |
927 | call *%edi | |
928 | jmp ret_from_exception | |
d211af05 AH |
929 | END(page_fault) |
930 | ||
931 | /* | |
932 | * Debug traps and NMI can happen at the one SYSENTER instruction | |
933 | * that sets up the real kernel stack. Check here, since we can't | |
934 | * allow the wrong stack to be used. | |
935 | * | |
936 | * "TSS_sysenter_sp0+12" is because the NMI/debug handler will have | |
937 | * already pushed 3 words if it hits on the sysenter instruction: | |
938 | * eflags, cs and eip. | |
939 | * | |
940 | * We just load the right stack, and push the three (known) values | |
941 | * by hand onto the new stack - while updating the return eip past | |
942 | * the instruction that would have done it for sysenter. | |
943 | */ | |
f0d96110 | 944 | .macro FIX_STACK offset ok label |
a49976d1 IM |
945 | cmpw $__KERNEL_CS, 4(%esp) |
946 | jne \ok | |
f0d96110 | 947 | \label: |
a49976d1 | 948 | movl TSS_sysenter_sp0 + \offset(%esp), %esp |
131484c8 | 949 | pushfl |
a49976d1 IM |
950 | pushl $__KERNEL_CS |
951 | pushl $sysenter_past_esp | |
f0d96110 | 952 | .endm |
d211af05 AH |
953 | |
954 | ENTRY(debug) | |
e59d1b0a | 955 | ASM_CLAC |
a49976d1 IM |
956 | cmpl $entry_SYSENTER_32, (%esp) |
957 | jne debug_stack_correct | |
f0d96110 | 958 | FIX_STACK 12, debug_stack_correct, debug_esp_fix_insn |
d211af05 | 959 | debug_stack_correct: |
a49976d1 | 960 | pushl $-1 # mark this as an int |
d211af05 AH |
961 | SAVE_ALL |
962 | TRACE_IRQS_OFF | |
a49976d1 IM |
963 | xorl %edx, %edx # error code 0 |
964 | movl %esp, %eax # pt_regs pointer | |
965 | call do_debug | |
966 | jmp ret_from_exception | |
d211af05 AH |
967 | END(debug) |
968 | ||
969 | /* | |
970 | * NMI is doubly nasty. It can happen _while_ we're handling | |
971 | * a debug fault, and the debug fault hasn't yet been able to | |
972 | * clear up the stack. So we first check whether we got an | |
973 | * NMI on the sysenter entry path, but after that we need to | |
974 | * check whether we got an NMI on the debug path where the debug | |
975 | * fault happened on the sysenter path. | |
976 | */ | |
977 | ENTRY(nmi) | |
e59d1b0a | 978 | ASM_CLAC |
34273f41 | 979 | #ifdef CONFIG_X86_ESPFIX32 |
a49976d1 IM |
980 | pushl %eax |
981 | movl %ss, %eax | |
982 | cmpw $__ESPFIX_SS, %ax | |
983 | popl %eax | |
984 | je nmi_espfix_stack | |
34273f41 | 985 | #endif |
a49976d1 IM |
986 | cmpl $entry_SYSENTER_32, (%esp) |
987 | je nmi_stack_fixup | |
988 | pushl %eax | |
989 | movl %esp, %eax | |
990 | /* | |
991 | * Do not access memory above the end of our stack page, | |
d211af05 AH |
992 | * it might not exist. |
993 | */ | |
a49976d1 IM |
994 | andl $(THREAD_SIZE-1), %eax |
995 | cmpl $(THREAD_SIZE-20), %eax | |
996 | popl %eax | |
997 | jae nmi_stack_correct | |
998 | cmpl $entry_SYSENTER_32, 12(%esp) | |
999 | je nmi_debug_stack_check | |
d211af05 | 1000 | nmi_stack_correct: |
a49976d1 | 1001 | pushl %eax |
d211af05 | 1002 | SAVE_ALL |
a49976d1 IM |
1003 | xorl %edx, %edx # zero error code |
1004 | movl %esp, %eax # pt_regs pointer | |
1005 | call do_nmi | |
1006 | jmp restore_all_notrace | |
d211af05 AH |
1007 | |
1008 | nmi_stack_fixup: | |
f0d96110 | 1009 | FIX_STACK 12, nmi_stack_correct, 1 |
a49976d1 | 1010 | jmp nmi_stack_correct |
d211af05 AH |
1011 | |
1012 | nmi_debug_stack_check: | |
a49976d1 IM |
1013 | cmpw $__KERNEL_CS, 16(%esp) |
1014 | jne nmi_stack_correct | |
1015 | cmpl $debug, (%esp) | |
1016 | jb nmi_stack_correct | |
1017 | cmpl $debug_esp_fix_insn, (%esp) | |
1018 | ja nmi_stack_correct | |
f0d96110 | 1019 | FIX_STACK 24, nmi_stack_correct, 1 |
a49976d1 | 1020 | jmp nmi_stack_correct |
d211af05 | 1021 | |
34273f41 | 1022 | #ifdef CONFIG_X86_ESPFIX32 |
d211af05 | 1023 | nmi_espfix_stack: |
131484c8 | 1024 | /* |
d211af05 AH |
1025 | * create the pointer to lss back |
1026 | */ | |
a49976d1 IM |
1027 | pushl %ss |
1028 | pushl %esp | |
1029 | addl $4, (%esp) | |
d211af05 AH |
1030 | /* copy the iret frame of 12 bytes */ |
1031 | .rept 3 | |
a49976d1 | 1032 | pushl 16(%esp) |
d211af05 | 1033 | .endr |
a49976d1 | 1034 | pushl %eax |
d211af05 | 1035 | SAVE_ALL |
a49976d1 IM |
1036 | FIXUP_ESPFIX_STACK # %eax == %esp |
1037 | xorl %edx, %edx # zero error code | |
1038 | call do_nmi | |
d211af05 | 1039 | RESTORE_REGS |
a49976d1 IM |
1040 | lss 12+4(%esp), %esp # back to espfix stack |
1041 | jmp irq_return | |
34273f41 | 1042 | #endif |
d211af05 AH |
1043 | END(nmi) |
1044 | ||
1045 | ENTRY(int3) | |
e59d1b0a | 1046 | ASM_CLAC |
a49976d1 | 1047 | pushl $-1 # mark this as an int |
d211af05 AH |
1048 | SAVE_ALL |
1049 | TRACE_IRQS_OFF | |
a49976d1 IM |
1050 | xorl %edx, %edx # zero error code |
1051 | movl %esp, %eax # pt_regs pointer | |
1052 | call do_int3 | |
1053 | jmp ret_from_exception | |
d211af05 AH |
1054 | END(int3) |
1055 | ||
1056 | ENTRY(general_protection) | |
a49976d1 IM |
1057 | pushl $do_general_protection |
1058 | jmp error_code | |
d211af05 AH |
1059 | END(general_protection) |
1060 | ||
631bc487 GN |
1061 | #ifdef CONFIG_KVM_GUEST |
1062 | ENTRY(async_page_fault) | |
e59d1b0a | 1063 | ASM_CLAC |
a49976d1 IM |
1064 | pushl $do_async_page_fault |
1065 | jmp error_code | |
2ae9d293 | 1066 | END(async_page_fault) |
631bc487 | 1067 | #endif |